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8178362 Electronically scannable multiplexing device  
An electronically scannable multiplexing device is capable of addressing multiple bits within a volatile or non-volatile memory cell. The multiplexing device generates an electronically scannable...
8178399 Production method for semiconductor device  
An SGT production method includes forming a pillar-shaped first-conductive-type semiconductor layer and forming a second-conductive-type semiconductor layer underneath the first-conductive-type...
8174070 Dual channel trench LDMOS transistors and BCD process with deep trench isolation  
A dual channel trench LDMOS transistor includes a substrate of a first conductivity type; a semiconductor layer of a second conductivity type formed on the substrate; a first trench formed in the...
8169019 Metal-oxide-semiconductor chip and fabrication method thereof  
A metal-oxide-semiconductor chip having a semiconductor substrate, an epitaxial layer, at least a MOS cell, and a metal pattern layer is provided. The epitaxial layer is located on the...
8168495 Carbon nanotube high frequency transistor technology  
A technique of the invention reduces significantly the distance between the gate and single-walled carbon nanotubes to improve performance and efficiency of a carbon nanotube transistor device....
8163618 Power MOSFET device structure for high frequency applications  
This invention discloses a new switching device supported on a semiconductor that includes a drain disposed on a first surface and a source region disposed near a second surface of said...
8163605 Production method for semiconductor device  
It is intended to provide an SGT production method capable of obtaining a structure for reducing a resistance of a source, drain and gate, a desired gate length, desired source and drain...
8163616 Methods of manufacturing nonvolatile memory devices  
Nonvolatile memory devices and methods of manufacturing nonvolatile memory devices are provided. The method includes patterning a bulk substrate to form an active pillar; forming a charge storage...
8159024 High voltage (>100V) lateral trench power MOSFET with low specific-on-resistance  
In one aspect, a lateral MOS device is provided. The lateral MOS device includes a gate electrode disposed at least partially in a gate trench to apply a voltage to a channel region, and a drain...
8154077 Semiconductor device  
According to an embodiment, a semiconductor device includes a gate electrode formed on a semiconductor substrate via an insulating layer; a source region including an extension region, a drain...
8148222 Cross-point diode arrays and methods of manufacturing cross-point diode arrays  
Methods of forming an array of memory cells and memory cells that have pillars. Individual pillars can have a semiconductor post formed of a bulk semiconductor material and a sacrificial cap on the...
8148769 Nonvolatile semiconductor memory device and method of manufacturing the same  
A nonvolatile semiconductor memory device includes a plurality of memory strings, each of which has a plurality of electrically rewritable memory cells connected in series; and select transistors,...
8148773 Power semiconductor devices integrated with clamp diodes having separated gate metal pads to avoid breakdown voltage degradation  
A structure of power semiconductor device integrated with clamp diodes having separated gate metal pad is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame....
8148216 Nonvolatile semiconductor memory and process of producing the same  
A nonvolatile semiconductor memory of an aspect of the present invention comprises a semiconductor substrate, a pillar-shaped semiconductor layer extending in the vertical direction with respect to...
8143125 Structure and method for forming a salicide on the gate electrode of a trench-gate FET  
A method for forming a trench-gate FET includes the following steps. A plurality of trenches is formed extending into a semiconductor region. A gate dielectric is formed extending along opposing...
8143121 DRAM cell with double-gate fin-FET, DRAM cell array and fabrication method thereof  
A transistor structure includes a semiconductor substrate having a top surface and sidewalls extending downward from the top surface, wherein each of the sidewall comprises a vertical upper...
8138048 Semiconductor storage device  
It is intended to provide a semiconductor device having a reduced thickness of a silicon nitride film on an outer periphery of a gate electrode of an SGT. A semiconductor device of the present...
8138047 Super junction semiconductor device  
In the specification and drawing a super junction semiconductor device is disclosed. The super junction semiconductor device comprises a P-type layer, a N+ substrate, a N-type layer, a silicon...
8138046 Process for fabricating a nanowire-based vertical transistor structure  
The invention relates to a process for fabricating a vertical transistor structure. On a substrate (10), is a first conductive layer (11), providing the source or drain electrode function, and an...
8138039 Vertical wrap-around-gate field-effect-transistor for high density, low voltage logic and memory array  
A vertical transistor having a wrap-around-gate and a method of fabricating such a transistor. The wrap-around-gate (WAG) vertical transistors are fabricated by a process in which source, drain and...
8133784 Method of fabricating non-volatile memory device having vertical structure  
A method of fabricating a non-volatile memory device according to an example embodiment may include etching a plurality of sacrificial films and insulation films to form a plurality of first...
8129244 Method for fabricating semiconductor device  
A method for fabricating a semiconductor device includes forming a plurality of first trenches by etching a substrate, forming a plurality of buried bit lines in the first trenches, forming a...
8124478 Method for fabricating flash memory device having vertical floating gate  
A method for fabricating a flash memory device includes forming a control gate having a hollow donut shape over an insulation layer formed over a substrate. The method also includes forming an...
8124482 MOS transistor with gate trench adjacent to drain extension field insulation  
An integrated circuit containing an MOS transistor with a trenched gate abutting an isolation dielectric layer over a drift region. The body well and source diffused region overlap the bottom...
8124479 Diffusing impurity ions into pillars to form vertical transistors  
A method for manufacturing a semiconductor device that includes forming a pillar pattern including a sidewall contact over a semiconductor substrate; forming a silicon layer in a lower portion...
8124480 Methods of fabricating silicon carbide devices incorporating multiple floating guard ring edge terminations  
Edge termination for silicon carbide devices has a plurality of concentric floating guard rings in a silicon carbide layer that are adjacent and spaced apart from a silicon carbide-based...
8119484 DRAM with nanofin transistors  
One aspect of the present subject matter relates to a memory. A memory embodiment includes a nanofin transistor having a first source/drain region, a second source/drain region above the first...
8120096 Power semiconductor device and method of manufacturing the same  
A power semiconductor device capable of transmitting gate signals in all directions (e.g., up-/down-ward/right-/left-ward) on a plane and a method of manufacturing the same. The power semiconductor...
8119471 Semiconductor device and method for manufacturing the same  
A method for manufacturing a semiconductor device including a vertical double-diffusedmetal-oxide-semiconductor (VDMOS) transistor includes preparing a semiconductor substrate and injecting a first...
8114737 Methods of forming memory cells on pillars and memories with memory cells on pillars  
Methods of fabricating memory are disclosed. For example, a method includes fabricating rows of memory cells on pillars separated by isolation regions therebetween. Each pillar has a pair of memory...
8115250 Semiconductor device and manufacturing method of the same  
Disclosed herein is a semiconductor device including: a first conductivity type semiconductor base body; a first conductivity type pillar region; second conductivity type pillar regions; element...
8110466 Cross OD FinFET patterning  
A method of forming an integrated circuit structure includes providing a semiconductor substrate; providing a first lithography mask, a second lithography mask, and a third lithography mask;...
8106453 Semiconductor device having super junction structure  
A semiconductor device having a super junction structure includes: multiple first columns extending in a current flowing direction; and multiple second columns extending in the current flowing...
8105901 Method for double pattern density  
A method deposits an undoped silicon layer on a primary layer, deposits a cap layer on the undoped silicon layer, patterns a masking layer on the cap layer, and patterns the undoped silicon layer...
8101509 Semiconductor integrated circuit device  
A method of fabricating a semiconductor integrated circuit includes forming a first dielectric layer on a semiconductor substrate, patterning the first dielectric layer to form a first patterned...
8097914 Semiconductor device and manufacturing method of the same  
Disclosed herein is a semiconductor device including: a main body transistor region; and an electrostatic discharge protection element region, wherein the main body transistor region includes, a...
8097513 Vertical transistor of semiconductor device and method of forming the same  
A vertical transistor of a semiconductor device has a channel area formed in a vertical direction to a semiconductor substrate. After semiconductor poles corresponding to the length of...
8097945 Bi-directional, reverse blocking battery switch  
Embodiments of the present invention relate to an improved die layout for a bi-directional and reverse blocking battery switch. According to one embodiment, two switches are oriented side-by-side,...
8093127 Method for forming a vertical transistor having tensile layers  
A vertical transistor includes a semiconductor substrate provided with a pillar type active pattern over the surface thereof. A first tensile layer is formed over the semiconductor substrate and...
8093122 Method for fabricating vertical channel transistor  
A method for fabricating a vertical channel transistor includes forming a structure including a plurality of trimmed pillar patterns, forming a conductive layer for a gate electrode including a...
8084813 Short gate high power MOSFET and method of manufacture  
A short gate high power metal oxide semiconductor field effect transistor formed in a trench includes a short gate having gate length defined by spacers within the trench. The transistor further...
8080458 Semiconductor device and manufacturing method thereof  
A method of manufacturing a semiconductor device includes the steps of forming a first columnar semiconductor layer on a substrate forming a first flat semiconductor layer forming a first...
8076190 Sea-of-fins structure on a semiconductor substrate and method of fabrication  
A semiconductor device and a method of fabricating a semiconductor device is disclosed, the method comprises including: forming etching an oxide layer to form a pattern of parallel oxide bars on a...
8076724 Transistor structure having an active region and a dielectric platform region  
A semiconductor device is formed having lower gate-to-drain capacitance. The semiconductor device having an active region (1300) and a dielectric platform region (1310). A trench (80) is formed...
8076716 Electronic device including a trench and a conductive structure therein  
An electronic device can include a transistor. In an embodiment, the transistor can include a semiconductor layer having a primary surface and a conductive structure. The conductive structure can...
8076725 Semiconductor device and method for manufacturing the same  
An impurity buried layer constructed by two buried regions formed by impurities of identical type exist, a buried region formed by an impurity having a slow diffusion speed is provided on the...
8076198 Method of fabricating nonvolatile memory device  
A method of fabricating a nonvolatile memory device with a three-dimensional structure includes alternately stacking first and second material layers in two or more layers on a semiconductor...
8067299 Nanoelectronic structure and method of producing such  
The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than...
8063441 Vertical type semiconductor device  
A vertical pillar semiconductor device may include a substrate, a group of channel patterns, a gate insulation layer pattern and a gate electrode. The substrate may be divided into an active region...
8058683 Access device having vertical channel and related semiconductor device and a method of fabricating the access device  
An access device and a semiconductor device are disclosed. The access device includes a vertically oriented channel separating a lower source/drain region and an upper source/drain region, a gate...
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