Patents in Class 438/262

Matches 1 - 50 out of 237

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Match	Document	Document Title
1	7602007	Semiconductor device having controllable transistor threshold voltage A semiconductor device of this invention is a single-layer gate nonvolatile semiconductor memory in which a floating gate having a predetermined shape is formed on a semiconductor substrate. This...
2	7579237	Nonvolatile memory device and method of manufacturing the same A method of manufacturing a nonvolatile memory device includes forming a plurality of device isolation regions in a semiconductor substrate, forming a tunneling insulation layer on the...
3	7572697	Method of manufacturing flash memory device A method of manufacturing flash memory devices wherein, after gate lines are formed, an HDP oxide film having at least the same height as that of a floating gate is formed between the gate lines....
4	7544558	Method for integrating DMOS into sub-micron CMOS process This invention is forming the DMOS channel after CMOS active layer before gate poly layer to make the modular DMOS process step easily adding into the sub-micron CMOS or BiCMOS process. And DMOS...
5	7544569	Bidirectional split gate NAND flash memory structure and array, method of programming, erasing and reading thereof, and method of manufacturing A split gate NAND flash memory structure is formed on a semiconductor substrate of a first conductivity type. The NAND structure comprises a first region of a second conductivity type and a second...
6	7518176	Programmable nonvolatile memory and semiconductor integrated circuit device Distance λm between a floating gate and a drain contact of a floating gate transistor forming a memory cell is set to be greater than a distance λ determined based on a minimum design dimension...
7	7514318	Method for fabricating non-volatile memory cells A method for fabricating non-volatile memory cells is provided. The method includes providing a substrate, forming a first dopant region in the substrate, forming a second dopant region in the...
8	7501322	Methods of forming non-volatile memory devices having trenches A semiconductor memory device includes a semiconductor substrate having a trench therein. First and second gate patterns are formed on a surface of the substrate adjacent the trench, a respective...
9	7465632	Method for forming buried doped region A method for forming a buried doped region is provided. A first insulating layer is formed on a substrate and the first insulating layer is patterned to from an opening that extends in a first...
10	7439134	Method for process integration of non-volatile memory cell transistors with transistors of another type A method for making a semiconductor device having non-volatile memory cell transistors and transistors of another type is provided. In the method, a substrate is provided having an NVM region, a...
11	7439157	Isolation trenches for memory devices A method includes removing a portion of a substrate to define an isolation trench; forming a first dielectric layer on exposed surfaces of the substrate in the trench; forming a second dielectric...
12	7435647	NOR-type flash memory device and manufacturing method thereof A flash memory device that has a structure capable of preventing gate stack damage, and a method of manufacturing the same, is presented. The method includes forming a first photo resist pattern to...
13	7435649	Floating-gate non-volatile memory and method of fabricating the same A floating gate non-volatile memory is composed of a semiconductor substrate within which active regions and isolation dielectrics are alternately arranged in a first direction; a word line...
14	7429514	Use of selective oxidation to form asymmetrical oxide features during the manufacture of a semiconductor device A sidewall oxidation process for use during the formation of a transistor such as a flash memory cell allows for improved control of a gate oxide profile. The method comprises doping transistor...
15	7416944	Flash EEPROM device and method for fabricating the same In a flash EEPROM device, and method for fabricating the same, no bit line contact is made, thereby minimizing a design rule between a contact and a gate. Thus, cell size may be reduced. The flash...
16	7384847	Methods of forming DRAM arrays The invention includes memory arrays, and methods which can be utilized for forming memory arrays. A patterned etch stop can be used during memory array fabrication, with the etch stop covering...
17	7381617	Method of fabricating flash memory device A method of fabricating flash memory devices includes the steps of forming a stop nitride film and an oxide film on a semiconductor substrate having a predetermined structure formed therein,...
18	7374989	Flash memory and methods of fabricating the same Flash memory and methods of fabricating the same are disclosed. An illustrated example flash memory includes a first source formed within a semiconductor substrate; an epitaxial layer formed on an...
19	7371645	Method of manufacturing a field effect transistor device with recessed channel and corner gate device Fabrication of recessed channel array transistors (RCAT) with a corner gate device includes forming pockets between a semiconductor fin that includes a gate groove and neighboring shallow trench...
20	7368350	Memory cell arrays and methods for producing memory cell arrays A method for fabricating stacked non-volatile memory cells and non-volatile memory cell arrays are disclosed. A semiconductor wafer is provided having a charge-trapping layer and a conductive layer...
21	7354824	Fabrication method of non-volatile memory A method for fabricating a non-volatile memory is provided. A dielectric layer, a first conductive layer, and a mask layer are formed sequentially on a substrate and then patterned to form a number...
22	7335558	Method of manufacturing NAND flash memory device A method of manufacturing a NAND flash memory device, including the steps of providing a semiconductor substrate in which a cell region and a select transistor region are defined; simultaneously...
23	7323742	Non-volatile memory integrated circuit A nonvolatile memory integrated circuit arrayed in rows and columns is disclosed. Parallel lines of implant N-type regions are formed in a P-well of a semiconductor substrate, with lines of oxide...
24	7300842	Method of fabricating a mask ROM A mask ROM and fabrication method thereof are disclosed, in which a bit line is formed of a conductive material such as polysilicon, by which a device size can be minimized, and by which resistance...
25	7291881	Bit line structure and method of fabrication The invention relates to a bit line structure having a surface bit line (DLx) and a buried bit line (SLx), the buried bit line (SLx) being formed in a trench with a trench insulation layer ( 6 )...
26	7279384	Semiconductor memory and method for manufacturing the same A semiconductor memory has plural cell transistors that are arranged in a matrix. The cell transistor comprises a P type silicon substrate, a control gate CG and a pair of electrically isolated...
27	7273785	Method to control device threshold of SOI MOSFET's A method of forming a silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) device is provided in which an implanted back-gate is formed into a Si-containing layer...
28	7268046	Dual gate oxide high-voltage semiconductor device and method for forming the same A dual gate oxide high-voltage semiconductor device and method for forming the same are provided. Specifically, a device formed according to the present invention includes a semiconductor...
29	7238569	Formation method of an array source line in NAND flash memory Novel fabrication methods permit concurrently forming wordlines, select gates and array source lines in NAND Flash. One method forms oxide and nitride layers of an ONO stack, implants dopants into...
30	7235409	Methods of forming semiconductor constructions The invention includes a method of forming a semiconductor construction, such as an MRAM construction. A block is formed over a semiconductor substrate. First and second layers are formed over the...
31	7232724	Radical oxidation for bitline oxide of SONOS Methods are disclosed for fabricating multi-bit SONOS flash memory cells, comprising forming a first dielectric layer and a charge trapping layer over a substrate of a wafer and selectively etching...
32	7183160	Manufacturing process for a flash memory and flash memory thus produced The invention relates to a production process for a flash memory from a semi-conductor substrate fitted with at least two adjacent rows of precursor stacks of floating gate transistors, the...
33	7179709	Method of fabricating non-volatile memory device having local SONOS gate structure in methods of fabricating a non-volatile memory device having a local silicon-oxide-nitride-oxide-silicon (SONOS) gate structure, a semiconductor substrate having a cell transistor area, a high...
34	7176088	Bitline structure and method for production thereof The invention relates to a bit line structure having a surface bit line (DLx) and a buried bit line (SLx), the buried bit line (SLx) being formed in a trench with a trench insulation layer ( 6 )...
35	7176087	Methods of forming electrical connections In one aspect, the invention provides a method of forming an electrical connection in an integrated circuitry device. According to one preferred implementation, a diffusion region is formed in...
36	7153743	Methods of fabricating non-volatile memory devices Methods of fabricating non-volatile memory devices are disclosed. The resulting non-volatile memory devices include an additional protection film is formed on a control gate pattern to enable the...
37	7125772	Nonvolatile memory A nonvolatile memory cell that is highly scalable includes a cell formed in a triple well. A pair of sources for a pair of cells on adjacent word lines each acts as the emitter of a lateral bipolar...
38	7122432	Non-volatile semiconductor memory device and manufacturing method thereof A non-volatile semiconductor memory device with a small variation in capacitance-coupling to the stacked gate for memory miniaturization. The device has a memory cell array in which memory cells...
39	7118967	Protection of charge trapping dielectric flash memory devices from UV-induced charging in BEOL processing A method of protecting a charge trapping dielectric flash memory cell from UV-induced charging, including fabricating a charge trapping dielectric flash memory cell including a charge trapping...
40	7105409	Semiconductor integrated circuit device and process for producing the same A semiconductor integrated circuit device with third gates comprising second conduction type source/drain diffusion layer regions 205 formed first conduction type well 201 , floating gates 203...
41	7098105	Methods for forming semiconductor structures The invention includes a semiconductor structure having a gateline lattice surrounding vertical source/drain regions. In some aspects, the source/drain regions can be provided in pairs, with one of...
42	7091550	Non-volatile memory device and method of manufacturing the same A non-volatile memory device and method of manufacturing the same is provided. A substrate is provided and then a trench is formed in the substrate. Thereafter, a bottom oxide layer, a...
43	7074678	Method for fabricating a buried bit line for a semiconductor memory In a method for fabricating a buried bit line for a semiconductor memory, the buried bit line is produced as a diffusion region using a dopant source including polysilicon that has previously been...
44	7074718	Method of fabricating a semiconductor device having a buried and enlarged contact hole According to embodiments of the invention, a bit line interlayer insulating layer is placed over a semiconductor substrate. Two adjacent bit line patterns are placed in parallel on the bit line...
45	7064032	Method for forming non-volatile memory cell with low-temperature-formed dielectric between word and bit lines, and non-volatile memory array including such memory cells A method for forming a non-volatile memory cell includes depositing an oxide layer over a component stack including a dielectric layer over a first conductive layer. A portion of an upper section...
46	7052961	Method for forming wordlines having irregular spacing in a memory array According to one exemplary embodiment, a method of fabricating memory array includes forming a number of hard mask lines and at least one dummy hard mask line on a layer of polysilicon, where the...
47	7042066	Dual-trench isolated crosspoint memory array A memory array dual-trench isolation structure and a method for forming the same have been provided. The method comprises: forming a p-doped silicon (p-Si) substrate; forming an n-doped (n+) Si...
48	7026687	Non-volatile semiconductor memory and method of manufacturing the same A proposed non-volatile semiconductor memory and a method of manufacturing the same are directed to performing stable and highly reliable operations. First, grooves are formed in a p-type silicon...
49	7022573	Stack gate with tip vertical memory and method for fabricating the same A stacked gate vertical flash memory and a fabrication method thereof. The stacked gate vertical flash memory comprises a semiconductor substrate with a trench, a source conducting layer formed on...
50	7005354	Depletion drain-extended MOS transistors and methods for making the same Depletion drain-extended MOS transistor devices and fabrication methods for making the same are provided, in which a compensated channel region is provided with p and n type dopants to facilitate...

Matches 1 - 50 out of 237

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