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7625799 Method of forming a shielded gate field effect transistor  
A semiconductor region with an epitaxial layer extending over the semiconductor region is provided. A first silicon etch is performed to form an upper trench portion extending into and terminating...
7622351 Method of manufacturing semiconductor device and semiconductor device  
A method of manufacturing a semiconductor device, includes: forming a first and a second trench regions adjacent from each other in a first conductivity type semiconductor base; forming a second...
7622350 Method of manufacturing semiconductor device having cell transistor with recess channel structure  
A method of manufacturing a semiconductor device is provided. Device separation portions defining first, second and third regions are formed in a substrate. A recess is formed at the first region....
7615452 Method of fabrication of normally-off field-effect semiconductor device  
A normally-off HEMT is made by first providing a substrate having its surface partly covered with an antigrowth mask. Gallium nitride is grown by epitaxy on the masked surface of the substrate to...
7615451 Method for forming semiconductor device  
A method for forming a semiconductor device is provided. More specifically, a method for forming a bulb-shaped portion of a bulb-shaped recess gate is provided to overcome an etching process margin...
7615449 Semiconductor device having a recess channel transistor  
The semiconductor device having a recess channel transistor includes a device isolation structure formed in a semiconductor substrate to define an active region having a recess region at a lower...
7611947 Method of manufacturing semiconductor device  
A method of manufacturing a semiconductor device of the present invention consists of forming a trench in a trench-type cell transistor region; forming a gate insulating film and a gate material...
7608878 Semiconductor device manufactured with a double shallow trench isolation process  
A method for manufacturing a semiconductor device includes forming a device isolation film by a double Shallow Trench Isolation (STI) process, forming a first active region having a negative slope...
7608876 Merged MOS-bipolar capacitor memory cell  
A high density vertical merged MOS-bipolar-capacitor gain cell is realized for DRAM operation. The gain cell includes a vertical MOS transistor having a source region, a drain region, and a...
7608511 Fabrication method of trenched power MOSFET with low gate impedance  
A fabrication method of a trenched power MOSFET with low gate impedance is provided. The fabrication method comprising the steps of: forming a plurality of trenches in an epitaxial layer; forming a...
7608508 Method for manufacturing semiconductor device  
A method for manufacturing a semiconductor device includes forming a recess with a device separating film and a first hard mask layer so that a pad nitride film for defining a recess gate region...
7601592 Method for forming multi-gate non-volatile memory devices using a damascene process  
According to a nonvolatile memory device having a multi gate structure and a method for forming the same of the present invention, a gate electrode is formed using a damascene process. Therefore, a...
7598586 Semiconductor device and production method therefor  
A semiconductor device, including: a semiconductor substrate of a first conductivity; and a semiconductor layer provided on the semiconductor substrate and having a super junction structure...
7598563 Memory device and method for manufacturing the same  
A split gate (flash) EEPROM cell and a method for manufacturing the same is disclosed, in which a control gate and a floating gate are formed in a vertical structure, to minimize a size of the...
7598562 Semiconductor device and method of manufacturing the same  
A semiconductor device including a semiconductor substrate; an element isolation region having a trench filled with an insulating film defined on the semiconductor substrate; a memory cell...
7595238 Trench MOS type silicon carbide semiconductor device and method for manufacturing the same  
A trench MOS type SiC semiconductor device includes a first conductivity semiconductor substrate, a first conductivity drift layer on the substrate, a second conductivity base layer on the drift...
7592233 Method for forming a memory device with a recessed gate  
A method for forming a memory device with a recessed gate is disclosed. A substrate with a pad layer thereon is provided. The pad layer and the substrate are patterned to form at least two...
7592224 Method of fabricating a storage device including decontinuous storage elements within and between trenches  
A semiconductor storage cell includes a first source/drain region underlying a first trench defined in a semiconductor layer. A second source/drain region underlies a second trench in the...
7592222 Method of fabricating flash memory device  
The present invention relates to a method of fabricating a flash memory device. According to a method of fabricating a flash memory device in accordance with an aspect of the present invention, a...
7588984 Method to define a transistor gate of a DRAM and the transistor gate using same  
A method to determine the predetermined location of a transistor gate of a dynamic random access memory (DRAM). A trench capacitor is respectively provided in a silicon substrate at the two sides...
7588977 Method of fabricating a MOS field effect transistor having plurality of channels  
A method of fabricating a MOSFET provides a plurality of nanowire-shaped channels in a self-aligned manner. According to the method, a first material layer and a semiconductor layer are...
7585755 Method of fabricating non-volatile memory device  
A method of fabricating a non-volatile memory device according to example embodiments may include forming a semiconductor layer on a substrate. A plurality of lower charge storing layers may be...
7585727 Method for fabricating semiconductor device having bulb-shaped recess gate  
A method for fabricating a semiconductor device includes etching a portion of a substrate to form a recess. A polymer layer fills a lower portion of the recess. Sidewall spacers are formed over the...
7582532 Method for fabricating semiconductor device  
A method for fabricating a semiconductor device includes etching a predetermined portion of a substrate to form a first recess having a bottom middle portion roundly projected and bottom edge...
7582530 Managing floating gate-to-floating gate spacing to support scalability  
Formation techniques are utilized to increase the space or distance between floating gates of a memory array of floating gate transistors. In at least some embodiments, floating gates are first...
7579649 Trench field effect transistor and method of making it  
Consistent with an example embodiment, a trench FET has source regions arranged above insulated gates in trenches. A body region of opposite conductivity type is arranged between the trenches and a...
7579241 Semiconductor device and method of manufacture thereof  
A semiconductor device comprises a semiconductor substrate, an electrically rewritable semiconductor memory cell provided on the semiconductor substrate, the memory cell comprising an island...
7579240 Method of making vertical transistor with horizontal gate layers  
Vertical body transistors with adjacent horizontal gate layers are used to form a memory array in a high density flash electrically erasable and programmable read only memory (EEPROM) or a logic...
7579237 Nonvolatile memory device and method of manufacturing the same  
A method of manufacturing a nonvolatile memory device includes forming a plurality of device isolation regions in a semiconductor substrate, forming a tunneling insulation layer on the...
7575989 Method of manufacturing a transistor of a semiconductor device  
A method of manufacturing a transistor in which gate resistance is lowered and short channel effects are controlled by forming a trench-type gate. The threshold voltage can also be more tightly...
7575974 Method for fabricating semiconductor device including recess gate  
A method for fabricating a semiconductor device includes forming a hard mask pattern over a substrate having a field oxide layer, etching the substrate to form a recess by using the hard mask...
7575973 Method of making three dimensional NAND memory  
A method of making a monolithic, three dimensional NAND string including a first memory cell located over a second memory cell, includes growing a semiconductor active region of second memory cell,...
7572701 Recessed gate for a CMOS image sensor  
A novel CMOS image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate having an upper surface, a gate comprising a dielectric layer formed on the substrate...
7572699 Process of forming an electronic device including fins and discontinuous storage elements  
An electronic device can include a substrate including a fin lying between a first trench and a second trench, wherein the fin is no more than approximately 90 nm wide. The electronic device can...
7563686 Method for forming a memory device with a recessed gate  
A method for forming a memory device with a recessed gate is disclosed. A substrate with a pad layer thereon is provided. The pad layer and the substrate are patterned to form at least two...
7563677 Recessed gate electrode and method of forming the same and semiconductor device having the recessed gate electrode and method of manufacturing the same  
A recessed gate electrode structure includes a first recess and a second recess in communication with the first recess both formed in a substrate. The second recess is larger than the first recess....
7560723 Enhanced memory density resistance variable memory cells, arrays, devices and systems including the same, and methods of fabrication  
A resistance variable memory cell and method of forming the same. The memory cell includes a first electrode and at least one layer of resistance variable material in contact with the first...
7560340 Method of manufacturing flash memory device  
A method of manufacturing flash memory devices increases a coupling ratio by increasing the height of a floating gate externally projecting from an isolation layer. A portion of the isolation layer...
7560335 Memory device transistors  
Method and device embodiments are described for fabricating MOSFET transistors in a semiconductor also containing non-volatile floating gate transistors. MOSFET transistor gate dielectric smiling,...
7557002 Methods of forming transistor devices  
Some embodiments include formation of at least one cavity in a first semiconductor material, followed by epitaxially growing a second semiconductor material over the first semiconductor material...
7556992 Method for forming vertical structures in a semiconductor device  
A method is provided for making a semiconductor device, comprising (a) providing a semiconductor stack comprising a first semiconductor layer ( 407 ) having a <110> crystallographic...
7553717 Recess etch for epitaxial SiGe  
A PMOS transistor and a method for fabricating a PMOS transistor. The method may include providing a semiconductor wafer having a PMOS transistor gate stack, source/drain extension regions, and...
7550800 Method and apparatus transporting charges in semiconductor device and semiconductor memory device  
A conductor-filter system, a conductor-insulator system, and a charge-injection system are provided. The conductor-filter system provides band-pass filtering function, charge-filtering function,...
7547604 Method of forming a recessed gate structure on a substrate having insulating columns and removing said insulating columns after forming a conductive region of the gate structure  
Self-aligned recessed gate structures and method of formation are disclosed. Field oxide areas for isolation are first formed in a semiconductor substrate. A plurality of columns are defined in an...
7547603 Non-planar non-volatile memory cell with an erase gate, an array therefor, and a method of making same  
A memory cell has a trench formed into a surface of a semiconductor substrate, and spaced apart source and drain regions with a channel region formed therebetween. The source region is formed...
7547601 Low power electrically alterable nonvolatile memory cells and arrays  
A method of providing a memory cell includes providing a body of a semiconductor material having a first conductivity type, arranging a filter of a conductor-filter system in contact with a first...
7547600 Five channel fin transistor and method for fabricating the same  
A semiconductor device comprises a substrate defining a recessed active region and a fin active region connected to the recessed active region and extending above the recessed active region. The...
7544991 Non-volatile memory device and methods of manufacturing and operating the same  
A non-volatile memory device and methods of manufacturing and operating the same are provided. In a method of manufacturing a non-volatile memory device, a substrate having a stepped portion that...
7544989 High density stepped, non-planar flash memory  
A first plurality of memory cells is in a first plane in a first column of the array. A second plurality of memory cells is in a second plane in the same column. The second plurality of memory...
7544568 Semiconductor device and method of manufacturing the same  
A gate trench 13 is formed in a semiconductor substrate 10 . The gate trench 13 is provided with a gate electrode 16 formed over a gate insulating film 14 . A portion of the gate electrode ...