|
Match
|
Document |
Document Title |
|
|
7402490 |
Charge-trapping memory device and methods for operating and manufacturing the cell
To manufacture a memory device, a gate dielectric layer is formed over a semiconductor body and a gate electrode layer is formed over the gate dielectric layer. The gate electrode layer is...
|
|
|
7402482 |
Non-volatile transistor memory array incorporating read-only elements with single mask set
A memory array has memory elements of identical topology or footprint arranged in rows and columns. Some of the memory elements are EEPROM cells and other memory elements are read only memory cells...
|
|
|
7402861 |
Memory cells and select gates of NAND memory arrays
A select gate of a NAND memory array has a first dielectric layer formed on a semiconductor substrate. A first conductive layer is formed on the first dielectric layer. Conductive spacers are...
|
|
|
7402492 |
Method of manufacturing a memory device having improved erasing characteristics
In a method of manufacturing a memory device having improved erasing characteristics, the method includes sequentially forming a tunneling oxide layer, a charge storing layer, and a blocking oxide...
|
|
|
7402493 |
Method for forming non-volatile memory devices
According to a nonvolatile memory device having a multi gate structure and a method for forming the same of the present invention, a gate electrode is formed using a damascene process. Therefore, a...
|
|
|
7402491 |
Methods of manufacturing a semiconductor device including a dielectric layer including zirconium
A method of manufacturing a semiconductor device can include forming a tunnel oxide layer on a substrate, forming a floating gate on the tunnel oxide layer and forming a dielectric layer pattern on...
|
|
|
7399675 |
Electronic device including an array and process for forming the same
An electronic device can include an NVM array, wherein portions of word lines are formed within trenches. Insulating features are formed over heavily doped regions within the substrate. In one...
|
|
|
7399672 |
Methods of forming nonvolatile memory devices
Methods of forming a memory device include forming a device isolation layer in a semiconductor substrate including a cell array region and a resistor region, the device isolation layer extending...
|
|
|
7400010 |
Semiconductor device and method of manufacturing the same
A semiconductor device including a semiconductor substrate having trenches oriented in a predetermined direction; a gate insulating film overlaying the semiconductor substrate interposed between...
|
|
|
7396723 |
Method of manufacturing EEPROM device
A method of manufacturing an EEPROM device can reduce the cell area. The method of manufacturing an Electrically Erasable Programmable Read-Only Memory (EEPROM) includes forming a mask pattern over...
|
|
|
7396720 |
High coupling memory cell
A first dielectric layer is formed over a substrate. A single layer first conductive layer that acts as a floating gate is formed over the first dielectric layer. A trough is formed in the first...
|
|
|
7396722 |
Memory device with reduced cell area
The present invention provides for a memory device comprising a bulk substrate. A first lightly doped region is formed in the bulk substrate. A first active region is formed in the first lightly...
|
|
|
7396721 |
Method of fabricating a semiconductor device
According to the present invention, there is provided a semiconductor device fabrication method comprising:
forming a first insulating film on a semiconductor substrate; forming a first...
|
|
|
7396727 |
Transistor of semiconductor device and method for fabricating the same
A transistor which may effectively control the short channel effect with a vertical transistor structure. This structure may prevent the degradation of a transistor's performance caused by the hot...
|
|
|
7393746 |
Post-silicide spacer removal
A method forms a gate conductor over a substrate, forms spacers (e.g., nitride spacers) on sides of the gate conductor, and implants an impurity into exposed regions of the substrate not protected...
|
|
|
7393737 |
Semiconductor device and a method of manufacturing the same
A semiconductor device which, in spite of the existence of a dummy active region, eliminates the need for a larger chip area and improves the surface flatness of the semiconductor substrate. In the...
|
|
|
7393745 |
Method for fabricating self-aligned double layered silicon-metal nanocrystal memory element
A nanocrystal memory element and a method for fabricating the same are proposed. The fabricating method involves selectively oxidizing polysilicon not disposed beneath and not covered with a...
|
|
|
7393744 |
Method of manufacturing dielectric film of flash memory device
A method of manufacturing a dielectric film of a flash memory device, including the steps of providing a semiconductor substrate having floating gates formed therein, performing an oxidization...
|
|
|
7390718 |
SONOS embedded memory with CVD dielectric
An embedded semiconductor memory is fabricated by: forming diffusion bit line regions in a semiconductor substrate; then thermally oxidizing the upper surface of the substrate, thereby forming a...
|
|
|
7390714 |
Method of manufacturing semiconductor device having tungsten gates electrode
Disclosed herein is a method of manufacturing semiconductor devices. The method includes the steps of forming a gate oxide film, a polysilicon film and a nitride film on a semiconductor substrate,...
|
|
|
7391073 |
Non-volatile memory structure and method of fabricating non-volatile memory
A method of fabricating a non-volatile memory is described. A substrate having a tunneling layer and a floating gate layer thereon is provided. A mask layer is formed on the floating gate. The mask...
|
|
|
7390715 |
Method of fabricating active layer thin film by metal chalcogenide precursor solution
A method of fabricating an active layer thin film by a metal-chalcogenide precursor solution is provided, including the steps of: synthesizing a metal-chalcogenide precursor containing benzyl or...
|
|
|
7387933 |
EEPROM device and method of fabricating the same
A memory device comprises a semiconductor substrate of a first conductive type, a memory transistor, a select transistor, a floating junction region, a common source region, and a bit line junction...
|
|
|
7387935 |
Memory cell unit, nonvolatile semiconductor storage device including memory cell unit, and memory cell array driving method
A memory cell unit including: a semiconductor substrate having a source diffusion layer in at least a part of a surface thereof; a column-shaped semiconductor layer provided on the semiconductor...
|
|
|
7388250 |
Non-volatile memory cell and manufacturing method thereof
A non-volatile memory cell includes a substrate, a first isolation structure positioned in a first region on the substrate, a second isolation structure surrounding a second region on the...
|
|
|
7384844 |
Method of fabricating flash memory device
A method of fabricating a flash memory device includes defining a high voltage region and a low voltage region on a substrate. The high voltage region provides an area for one or more first...
|
|
|
7381615 |
Methods for self-aligned trench filling with grown dielectric for high coupling ratio in semiconductor devices
Methods for self-aligned trench filling to isolate active regions in high-density integrated circuits are provided. A deep, narrow trench is etched into a substrate between active regions. The...
|
|
|
7378316 |
Method for fabricating semiconductor vertical NROM memory cells
An NROM flash memory cell is implemented in an ultra-thin silicon-on-insulator structure. In a planar device, the channel between the source/drain areas is normally fully depleted. An oxide layer...
|
|
|
7378315 |
Method for fabricating semiconductor device
A method for fabricating a semiconductor device for a system on chip (SOC) for embodying a transistor for a logic device, an electrical erasable programmable read only memory (EEPROM) cell and a...
|
|
|
7375393 |
Non-volatile memory (NVM) retention improvement utilizing protective electrical shield
An electrical shield is provided in a non-volatile memory (NVM) cell structure to protect the cell's floating gate from any influence resulting from charge redistribution in the vicinity of the...
|
|
|
7375015 |
Manufacturing method which prevents abnormal gate oxidation
A method for manufacturing a gate electrode structure for preventing abnormal oxidation of a refractory metal due to an oxidation process, includes forming an insulating film on a surface of a...
|
|
|
7374995 |
Nonvolatile semiconductor memory device
A nonvolatile semiconductor memory device including a memory cell and a selection transistor, and the memory cell includes a floating gate formed on a semiconductor substrate via a first gate...
|
|
|
7374989 |
Flash memory and methods of fabricating the same
Flash memory and methods of fabricating the same are disclosed. An illustrated example flash memory includes a first source formed within a semiconductor substrate; an epitaxial layer formed on an...
|
|
|
7375018 |
Method of manufacturing semiconductor device
Etching is performed on an insulating layer 23 and a conductive layer 32 with a photoresist 41 as the mask, to form an opening 51 in the conductive layer 32 . After removing the...
|
|
|
7371639 |
Nonvolatile memory device and method for fabricating the same
A nonvolatile memory device and a method for fabricating the same decreases power consumption and prevents contamination of an insulating layer. The nonvolatile memory devices includes a...
|
|
|
7371638 |
Nonvolatile memory cells having high control gate coupling ratios using grooved floating gates and methods of forming same
A non-volatile memory cell includes a semiconductor substrate having a fin-shaped active region extending therefrom. A tunnel dielectric layer is provided, which extends on opposing sidewalls and...
|
|
|
7371643 |
Nonvolatile semiconductor memory device
A memory cell and a selection transistor for selecting the memory cell are provided. The memory cell includes a floating gate formed on a semiconductor substrate via a first gate insulation film, a...
|
|
|
7371640 |
Semiconductor device with floating trap type nonvolatile memory cell and method for manufacturing the same
The present invention discloses a semiconductor device having a floating trap type nonvolatile memory cell and a method for manufacturing the same. The method includes providing a semiconductor...
|
|
|
7371637 |
Oxide-nitride stack gate dielectric
A method of making a semiconductor structure comprises forming an oxide layer on a substrate; forming a silicon nitride layer on the oxide layer; annealing the layers in NO; and annealing the...
|
|
|
7368345 |
Flash memory devices and methods of fabricating the same
Flash memory devices and methods of fabricating the same are disclosed. A disclosed method comprises doping at least one active region of a substrate, and forming an etching mask layer on the...
|
|
|
7368338 |
Nonvolatile memory and manufacturing method thereof
Memory elements, switching elements, and peripheral circuits to constitute a nonvolatile memory are integrally formed on a substrate by using TFTs. Since semiconductor active layers of memory...
|
|
|
7368780 |
Semiconductor memory device and method of manufacturing the same
A semiconductor memory device includes a semiconductor substrate, an isolation insulation film filled in a plurality of trenches formed in the semiconductor substrate to define a plurality of...
|
|
|
7368349 |
Semiconductor memory device and method of manufacturing the same
A semiconductor memory device includes: a laminated body which has a floating-gate-forming groove and includes a semiconductor support layer, an impurity diffusion layer, an ion-implantation-damage...
|
|
|
7368346 |
Method for forming gate structure in flash memory device
Device isolation insulation layers passing through an insulation layer and a substrate, are formed, and a portion of them is removed. The insulation layer is removed. A gate oxide layer and a first...
|
|
|
7368352 |
Semiconductor devices having transistors with vertical channels and method of fabricating the same
In a semiconductor device and a method of fabricating the same, a vertical channel transistor has a cell occupation area of 4F 2 . The semiconductor device comprises: a cell array region having a...
|
|
|
7368347 |
Dual bit flash memory devices and methods for fabricating the same
Methods for fabricating dual bit flash memory devices are provided. Method steps include forming a charge trapping layer overlying a substrate and fabricating two insulating members overlying the...
|
|
|
7365015 |
Damascene replacement metal gate process with controlled gate profile and length using Si1-xGex as sacrificial material
A method of forming a metal gate in a wafer. PolySi 1-x Ge x and polysilicon are used to form a tapered groove. Gate oxide, PolySi 1-x Ge x , and polysilicon is deposited on a wafer. A resist...
|
|
|
RE40275 |
Method for producing a memory cell
A method for producing a memory cell includes masking a desired polysilicon structure with an oxidation-inhibiting layer, preferably a nitride layer. The polysilicon above source/drain regions and...
|
|
|
7361567 |
Non-volatile nanocrystal memory and method therefor
A nanocrystal non-volatile memory (NVM) has a dielectric between the control gate and the nanocrystals that has a nitrogen content sufficient to reduce the locations in the dielectric where...
|
|
|
7361551 |
Method for making an integrated circuit having an embedded non-volatile memory
A method for forming a portion of a semiconductor device includes: patterning gate stack layers overlying a substrate into a gate stack; implanting dopant ions to form shallow source/drain...
|