|
Match
|
Document |
Document Title |
|
|
7592271 |
Method of fabricating a flash memory device
A method of fabricating a flash memory device, in which a pre-metal dielectric layer, a hard mask layer, and a first etch mask pattern are sequentially formed over a semiconductor substrate; an...
|
|
|
7592221 |
Semiconductor memory device and manufacturing method thereof
Disclosed is a semiconductor memory device including a plurality of diffusion regions, select gates, word lines, and common diffusion regions. The plurality of diffusion regions are extended in the...
|
|
|
7592222 |
Method of fabricating flash memory device
The present invention relates to a method of fabricating a flash memory device. According to a method of fabricating a flash memory device in accordance with an aspect of the present invention, a...
|
|
|
7592226 |
Method for manufacturing non-volatile semiconductor memory device, and non-volatile semiconductor memory device
An isolation oxide film whose upper surface is higher than a surface of a substrate is formed in the substrate. A silicon oxide film is formed on the substrate between the isolation oxide films. A...
|
|
|
7589374 |
Semiconductor device and related fabrication method
Embodiments of the invention provide a semiconductor device and a related method of fabricating a semiconductor device. In one embodiment, the invention provides a semiconductor device comprising a...
|
|
|
7588982 |
Methods of forming semiconductor constructions and flash memory cells
Some embodiments include methods of forming flash memory cells and semiconductor constructions, and some embodiments include semiconductor constructions. Some embodiments may include a method in...
|
|
|
7589375 |
Non-volatile memory devices including etching protection layers and methods of forming the same
A non-volatile memory device includes a semiconductor substrate including a cell array region and a peripheral circuit region. A first cell unit is on the semiconductor substrate in the cell array...
|
|
|
7588986 |
Method of manufacturing a semiconductor device
According to an exemplary embodiment of the present invention, a method of manufacturing a semiconductor device having active regions including a SONOS device region, a high voltage device region,...
|
|
|
7588981 |
Semiconductor device and manufacturing method thereof
In a thin film transistor, a metallic element promoting crystallization of an amorphous silicon film is effectively removed and the productivity is improved. By using a silicon film containing an...
|
|
|
7588983 |
EEPROM cell and EEPROM device with high integration and low source resistance and method of manufacturing the same
Provided are an EEPROM cell, an EEPROM device, and methods of manufacturing the EEPROM cell and the EEPROM device. The EEPROM cell is formed on a substrate including a first region and a second...
|
|
|
7585724 |
FLASH memory device and method of manufacture
A FLASH memory device is provided including a plurality of first floating gates formed over a gate oxide layer formed over a substrate, the first group of floating gates being formed using a...
|
|
|
7585711 |
Semiconductor-on-insulator (SOI) strained active area transistor
A selectively strained MOS device such as selectively strained PMOS device making up an NMOS and PMOS device pair without affecting a strain in the NMOS device the method including providing a...
|
|
|
7585746 |
Process integration scheme of SONOS technology
In an non-limiting example, we provide a substrate having a cell region, and non-cell regions. We form a tunneling dielectric layer, a charge storing layer, a top insulating layer (e.g., ONO), over...
|
|
|
7585755 |
Method of fabricating non-volatile memory device
A method of fabricating a non-volatile memory device according to example embodiments may include forming a semiconductor layer on a substrate. A plurality of lower charge storing layers may be...
|
|
|
7585725 |
Use of dilute steam ambient for improvement of flash devices
The present invention provides a flash memory integrated circuit and a method for fabricating the same. The method includes etching a gate stack that includes an initial oxide layer directly in...
|
|
|
7585726 |
Nonvolatile semiconductor memory devices and the fabrication process of them
The present invention enables to avoid a reduction in coupling ratio in a nonvolatile semiconductor memory device. The reduction is coupling ratio is caused due to difficulties in batch forming of...
|
|
|
7582526 |
Method for manufacturing semiconductor device
A method for manufacturing a plurality of memory devices and a plurality of high voltage devices on a substrate are provided. The substrate has a memory region and a high voltage region. The method...
|
|
|
7582527 |
Method for fabricating semiconductor device
Method for fabricating a semiconductor device, including the steps of providing a first conductive type semiconductor substrate having a cell region and a logic region defined thereon, forming a...
|
|
|
7582930 |
Non-volatile memory and method for manufacturing non-volatile memory
A coupling oxide film is formed on a silicon substrate, a polysilicon film is further formed thereupon, and a low-temperature oxide film is deposited to a thickness of 10 nm, for example. Next, a...
|
|
|
7582530 |
Managing floating gate-to-floating gate spacing to support scalability
Formation techniques are utilized to increase the space or distance between floating gates of a memory array of floating gate transistors. In at least some embodiments, floating gates are first...
|
|
|
7579238 |
Method of forming a multi-bit nonvolatile memory device
In making a multi-bit memory cell, a first insulating layer is formed over a semiconductor substrate. A second insulating layer is formed over the first insulating layer. A layer of gate material...
|
|
|
7579237 |
Nonvolatile memory device and method of manufacturing the same
A method of manufacturing a nonvolatile memory device includes forming a plurality of device isolation regions in a semiconductor substrate, forming a tunneling insulation layer on the...
|
|
|
7579236 |
Nonvolatile memory device, method of fabricating and method of operating the same
A nonvolatile memory device may include a semiconductor substrate; first and second floating gate electrodes formed on the semiconductor substrate; a control gate electrode formed on the first and...
|
|
|
7575972 |
Method of manufacturing nonvolatile memory device
A method of manufacturing a nonvolatile memory device is disclosed. The method includes the steps of forming a tunnel oxide layer, a first conductive layer for a floating gate, and a hard mask...
|
|
|
7576384 |
Storage device with multi-level structure
Data storage device, comprising: a stack of layers formed by an alternation of first layers with a conductivity of less than approximately 0.01 (Ω·cm) −1 and second layers with a conductivity...
|
|
|
7572693 |
Methods for transistor formation using selective gate implantation
Methods are disclosed for semiconductor device fabrication in which dopants are selectively implanted into transistor gate structures to counteract or compensate for dopant depletion during...
|
|
|
7572700 |
EEPROM and method of manufacturing the same
An EEPROM includes a substrate, a first semiconductor layer and a second semiconductor layer formed on the substrate. The first semiconductor layer is isolated from the second semiconductor layer...
|
|
|
7572697 |
Method of manufacturing flash memory device
A method of manufacturing flash memory devices wherein, after gate lines are formed, an HDP oxide film having at least the same height as that of a floating gate is formed between the gate lines....
|
|
|
7572696 |
Method of forming a gate of a flash memory device
The present invention provides a method of forming a gate in a flash memory device. The method includes: forming a oxide layer on a semiconductor substrate; forming a stacked structure including a...
|
|
|
7572698 |
Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean
A ferroelectric memory device is fabricated while mitigating edge degradation. A bottom electrode is formed over one or more semiconductor layers. A ferroelectric layer is formed over the bottom...
|
|
|
7572699 |
Process of forming an electronic device including fins and discontinuous storage elements
An electronic device can include a substrate including a fin lying between a first trench and a second trench, wherein the fin is no more than approximately 90 nm wide. The electronic device can...
|
|
|
7569453 |
Contact structure
This invention relates to contact structures for use in integrated circuits and methods of fabricating contact structures. In one embodiment, a contact structure includes a conductive layer, one or...
|
|
|
7569465 |
Use of voids between elements in semiconductor structures for isolation
A flash EEPROM or other type of memory cell array having adjacent charge storage elements is formed with a gas filled void between them in order to reduce the level of capacitive coupling between...
|
|
|
7569445 |
Semiconductor device with constricted current passage
A semiconductor device including a gate located over a semiconductor substrate and a source/drain region located adjacent the gate. The source/drain region is bounded by an isolation structure that...
|
|
|
7569454 |
Semiconductor device manufacturing method using strip-like gate electrode hard masks for ion implantation
A method of manufacturing a semiconductor device, comprises forming a gate insulating film on a surface of a semiconductor substrate, forming a first group of at least one strip-like gate electrode...
|
|
|
7566926 |
Nonvolatile semiconductor memory
The present invention provides a nonvolatile semiconductor memory that allows simultaneous implementation of high performance transistors in a low-voltage circuit region and transistors with high...
|
|
|
7566615 |
Methods of fabricating scalable two transistor memory devices
A memory device includes a semiconductor substrate, a first gate insulator on a first portion of a semiconductor substrate, a storage node on the first gate insulator, a tunnel junction barrier on...
|
|
|
7563662 |
Processes for forming electronic devices including non-volatile memory
A process for forming an electronic device can be performed, such that as little as one gate electric layer may be formed within each region of the electronic device. In one embodiment, the...
|
|
|
7563674 |
Method of manufacturing NAND flash memory device
A method of manufacturing a NAND flash memory device, wherein isolation layers are formed in a semiconductor substrate, and an upper side of each of the isolation layers is made to have a negative...
|
|
|
7563673 |
Method of forming gate structure of semiconductor device
Disclosed herein is a method for forming a gate structure of a semiconductor device. The method comprises forming a plurality of gates including a first gate dielectric film, a first gate...
|
|
|
7563667 |
Method for fabricating semiconductor device
In a method for forming a semiconductor device, a device isolation layer is formed in a capacitor region of a silicon substrate, and a bottom electrode and a dielectric layer are formed on the...
|
|
|
7563675 |
Ladder poly etching back process for word line poly planarization
A method is disclosed for etching a polysilicon material in a manner that prevents formation of an abnormal polysilicon profile. The method includes providing a substrate with a word line and...
|
|
|
7563664 |
Semiconductor memory device equipped with memory transistor and peripheral transistor and method of manufacturing the same
A semiconductor memory device provided with a memory cell region having first gate electrodes and a peripheral circuit region having second gate electrodes includes first gate electrodes arranged a...
|
|
|
7560335 |
Memory device transistors
Method and device embodiments are described for fabricating MOSFET transistors in a semiconductor also containing non-volatile floating gate transistors. MOSFET transistor gate dielectric smiling,...
|
|
|
7560763 |
Semiconductor device and method for fabricating the same
A semiconductor device, includes a semiconductor substrate; a first insulating layer formed on the semiconductor substrate; a first electrode formed on the first insulating layer; an interlayer...
|
|
|
7560338 |
Manufacturing method of non-volatile memory
A nonvolatile memory consisting of a substrate, a dielectric layer, word lines, word gates, conductive spacers, electron trapping layer, insulation layer and buried bit lines is provided. The...
|
|
|
7560339 |
Nonvolatile memory cell comprising a reduced height vertical diode
A nonvolatile memory cell according to the present invention comprises a bottom conductor, a semiconductor pillar, and a top conductor. The semiconductor pillar comprises a junction diode,...
|
|
|
7560329 |
Semiconductor device and method for fabricating the same
The semiconductor device comprises a gate electrode 112 formed over a semiconductor substrate 10 , a sidewall spacer 116 formed on the side wall of the gate electrode 112 , a sidewall spacer ...
|
|
|
7560320 |
Nonvolatile semiconductor memory and a fabrication method for the same
A nonvolatile semiconductor memory includes a plurality of memory cell transistors configured with a first floating gate, a first control gate, and a first inter-gate insulating film each arranged...
|
|
|
7560341 |
Semiconductor device and manufacturing method therefor
The gate electrode of a high-voltage transistor having a high breakdown voltage is formed from a polysilicon layer having a larger average grain size, so that depletion of the gate electrode easily...
|