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7202096 Control TFT for OLED display  
The present invention discloses a control TFT structure (i.e. a driving TFT) for reducing leakage in an OLED display. A semiconductor layer, such as a polysilicon layer, is deposited on a...
7202128 Method of forming a memory device having improved erase speed  
A method of forming a memory device includes forming a memory stack on a substrate. The memory stack includes an alumina layer acting as an intergate dielectric layer. A transistor is formed on the...
7202521 Silicon-oxide-nitride-oxide-silicon (SONOS) memory device and methods of manufacturing and operating the same  
In a silicon-oxide-nitride-oxide-silicon (SONOS) memory device, and methods of manufacturing and operating the same, the SONOS memory device includes a semiconductor layer including source and...
7199008 Microelectronic device having floating gate protective layer and method of manufacture therefor  
A method of manufacturing a microelectronic device including forming a memory cell having a floating gate located over a substrate, a dielectric layer over the floating gate, and a control gate...
7198993 Method of fabricating a combined fully-depleted silicon-on-insulator (FD-SOI) and partially-depleted silicon-on-insulator (PD-SOI) devices  
A method ( 100 ) of forming fully-depleted ( 90 ) and partially-depleted ( 92 ) silicon-on-insulator (SOI) devices on a single die in an integrated circuit device ( 2 ) is disclosed using SOI...
7196370 Nonvolatile semiconductor memory device having trench-type isolation region, and method of fabricating the same  
A nonvolatile semiconductor memory device includes a memory cell array region including a plurality of NAND cells, each NAND cell having a plurality of memory cell transistors, and which are...
7192830 Method for fabricating a memory cell  
Silicon nanocrystals are applied as storage layer ( 6 ) and removed using spacer elements ( 11 ) laterally with respect to the gate electrode ( 5 ). By means of an implantation of dopant,...
7192832 Flash memory cell and fabricating method thereof  
A flash memory cell and a method for fabricating the same are described. The flash memory cell comprises a substrate, a select gate, a floating gate, a gate dielectric layer, a high-voltage doped...
7192829 Methods of forming floating gate transistors  
Floating gate transistors and methods of forming the same are described. In one implementation, a floating gate is formed over a substrate. The floating gate has an inner first portion and an outer...
7186615 Method of forming a floating gate for a split-gate flash memory device  
A new method to form a floating gate for a flash memory device is achieved. The method comprises forming a gate dielectric layer overlying a substrate. A first conductor layer is deposited...
7186616 Method of removing nanoclusters in a semiconductor device  
A method for removing nanoclusters from a semiconductor device includes etching a selected portion of an insulating layer, flowing a reducing gas over the semiconductor device at a temperature in a...
7186614 Method for manufacturing high density flash memory and high performance logic on a single die  
A method of forming high performance logic transistors and high density flash transistors on a single substrate is disclosed. In one embodiment, the method comprises: forming a logic gate stack in...
7183153 Method of manufacturing self aligned non-volatile memory cells  
A method of forming an array of non-volatile memory cells includes forming a plurality of floating gate structures and shaping the plurality of floating gate structures to reduce the width of upper...
7183174 Flash memory device and method of manufacturing the same  
A flash memory device and method of manufacturing the same. The flash memory device includes a semiconductor substrate in which a first region where a cell region is formed, a second region where a...
7183157 Nonvolatile memory devices  
Nonvolatile memory devices and methods for fabricating the same are provided. The device includes first and second base patterns disposed under floating and selection gates, respectively, at an...
7183143 Method for forming nitrided tunnel oxide layer  
A method for forming a nitrided tunnel oxide layer is described. A silicon oxide layer as a tunnel oxide layer is formed on a semiconductor substrate, and a plasma nitridation process is performed...
7183606 Flash memory cell and manufacturing method thereof  
A flash memory cell including a p-type substrate, an n-type deep well, a stacked gate structure, a source region, a drain region, a p-type pocket doped region, spacers, a p-type doped region and a...
7179709 Method of fabricating non-volatile memory device having local SONOS gate structure  
in methods of fabricating a non-volatile memory device having a local silicon-oxide-nitride-oxide-silicon (SONOS) gate structure, a semiconductor substrate having a cell transistor area, a high...
7179710 Method for fabricating NAND type dual bit nitride read only memory  
A NAND type dual bit nitride read only memory and a method for fabricating thereof are provided. Firstly, a plurality of isolation layers, which are spaced and parallel to each other are formed in...
7179707 Method of forming gate electrode in semiconductor device  
A method for forming a gate electrode in the semiconductor device is disclosed. The disclosed methods for forming a gate electrode in a semiconductor includes forming a polysilicon film and a metal...
7179708 Process for fabricating non-volatile memory by tilt-angle ion implantation  
A process for fabricating non-volatile memory by tilt-angle ion implantation comprises essentially the steps of implanting sideling within a nitride dielectric layer heterogeneous elements such as,...
7176519 Memory cell, memory cell arrangement and method for the production of a memory cell  
A memory cell, memory cell arrangement, and method for producing a memory cell arrangement is described where electric charge carriers can be introduced from a trench structure, which delivers...
7176072 Strained silicon devices transfer to glass for display applications  
A method of fabricating strained silicon devices for transfer to glass for display applications includes preparing a wafer having a silicon substrate thereon; forming a relaxed SiGe layer on the...
7176085 Method of manufacturing split gate type nonvolatile memory device  
A method of manufacturing a split gate type nonvolatile semiconductor memory device in which control gates are formed by a self aligning process.
7176084 Self-aligned conductive spacer process for sidewall control gate of high-speed random access memory  
A self-aligned conductive spacer process for fabricating sidewall control gates on both sides of a floating gate for high-speed RAM applications, which can well define dimensions and profiles of...
7176077 Methods of forming memory cells and arrays having underlying source-line connections  
Floating-gate memory cells having a trench source-line contact are suited for increased packing densities without a need for low-resistance ground straps placed at regular intervals across a memory...
7176078 Nonvolatile semiconductor memory device having strap region and fabricating method thereof  
In a nonvolatile semiconductor memory device having a memory cell array region and a strap region for providing voltage to the memory cell array region, in the memory cell array region, a plurality...
7173304 Method of manufacturing devices comprising conductive nano-dots, and devices comprising same  
A method is disclosed that may include forming a first layer of insulating material above a semiconducting substrate, forming an aluminum oxide layer above the first layer of insulating material,...
7172938 Method of manufacturing a semiconductor memory device  
A tunneling dielectric layer, a charge trapping layer, a first length defining layer, and a second length defining layer are sequentially deposited on a semiconductor substrate. These layers are...
7172939 Method and structure for fabricating non volatile memory arrays  
An MONOS integrated circuit device. The device has a semiconductor substrate comprising a silicon bearing material and a shallow trench isolation region formed within the substrate. A P-type well...
7172937 Method of manufacturing a non-volatile memory cell  
The present invention relates to a method of manufacturing a non-volatile memory cell. The method comprises forming an ONO stack and a mask formed on the ONO stack, providing a first etching...
7169621 Ferroelectric memory device  
A ferroelectric memory device of the present invention includes a memory cell array in which memory cells are arranged in a matrix having first signal electrodes, second signal electrodes arranged...
7170128 Multi-bit nanocrystal memory  
An improved memory cell having a pair of non-volatile memory transistors with each transistor using a nanocrystal gate structure, the transistor pair constructed between a pair of bit line...
7169666 Method of forming a device having a gate with a selected electron affinity  
A floating gate transistor has a reduced barrier energy at an interface with an adjacent gate insulator, allowing faster charge transfer across the gate insulator at lower voltages. Data is stored...
7169668 Method of manufacturing a split-gate flash memory device  
A method of manufacturing a split-gate flash memory device is disclosed. On a semiconductor substrate having a plurality of parallel conductive lines, a plurality of doped regions are formed by an...
7166509 Write once read only memory with large work function floating gates  
Structures and methods for write once read only memory employing floating gates are provided. The write once read only memory cell includes a floating gate transistor formed in a modified dynamic...
7166508 Method for forming nonvolatile memory device including insulating film containing nitrogen (nitride)  
A nonvolatile memory device has a plurality of nonvolatile memory cells in which a memory gate electrode is formed over a first semiconductor region with a gate insulating film and a gate nitride...
7166886 DRAM cells with repressed floating gate memory, low tunnel barrier interpoly insulators  
Structures and methods for memory cells having a volatile and a non-volatile component in a single memory cell are provided. The memory cell includes a first source/drain region and a second...
7166511 Method for fabricating split gate flash memory device  
A method for fabricating a split gate flash memory includes depositing a second conductive layer for forming a control gate on a semiconductor substrate having a first conductive layer, an...
7166479 Methods of forming magnetic shielding for a thin-film memory element  
A monolithically formed ferromagnetic thin-film memory is disclosed that has local shielding on at least two sides of selected magnetic storage elements. The local shielding preferably extends...
7163862 Semiconductor memory devices and methods for fabricating the same  
Methods and structures are provided for a dual-bit EEPROM semiconductor device. The dual-bit memory device comprises a semiconductor substrate, a tunnel oxide disposed on the semiconductor...
7163860 Method of formation of gate stack spacer and charge storage materials having reduced hydrogen content in charge trapping dielectric flash memory device  
The present invention, in one embodiment, relates to a process for fabricating a charge trapping dielectric flash memory device including steps of providing a semiconductor substrate having formed...
7163855 Method for manufacturing semiconductor devices  
A semiconductor device manufacturing method is provided including: forming a first impurity layer that becomes first wells in a high breakdown voltage transistor forming region in a semiconductor...
7163861 Semiconductor devices, methods of manufacturing semiconductor devices, circuit substrates and electronic devices  
Certain embodiments include a semiconductor device capable of preventing a retardation of signal transmission between the smallest units, a method for the manufacture thereof, a circuit substrate...
7163898 Method for manufacturing semiconductor integrated circuit structures  
A method for manufacturing circuit structures integrated in a semiconductor substrate that includes regions, in particular isolation regions, includes the steps of:—depositing a conductive layer...
7160773 Methods and apparatus for wordline protection in flash memory devices  
Methods and structures are presented for protecting flash memory wordlines and memory cells from process-related charging during fabrication. Undoped polysilicon is formed at the ends of doped...
7160775 Method of discharging a semiconductor device  
In one embodiment, a method for discharging a semiconductor device includes providing a semiconductor substrate, forming a hole blocking dielectric layer over the semiconductor substrate, forming...
7160774 Method of forming polysilicon layers in non-volatile memory  
In accordance with an embodiment of the present invention, a semiconductor structure includes an undoped polysilicon layer, a doped polysilicon layer in contact with the undoped polysilicon layer,...
7161206 Non-volatile memory devices  
According to a nonvolatile memory device having a multi gate structure and a method for forming the same of the present invention, a gate electrode is formed using a damascene process. Therefore, a...
7160776 Methods of forming a gate structure of a non-volatile memory device and apparatus for performing the same  
Methods of forming a gate structure of a non-volatile memory device include forming a gate pattern having a control gate on a semiconductor substrate. An oxidation-preventing layer is formed on the...
Matches 501 - 550 out of 1789 < 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 >