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5196364 |
Method of making a stacked capacitor dram cell
A stacked multi-fingered cell (SMFC) capacitor using a modified stacked capacitor storage cell fabrication process. The (SMFC) is made up of polysilicon structure, having a multi-fingered...
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5196365 |
Method of making semiconductor memory device having stacked capacitor
A semiconductor memory device includes a substrate, a transfer transistor formed on the substrate and including drain and source regions, and a charge storage capacitor electrically coupled to one...
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5180683 |
Method of manufacturing stacked capacitor type semiconductor memory device
A semiconductor memory device according to the present invention comprises a memory cell having one transistor and one stacked capacitor. The stacked capacitor is stacked on the surface of a...
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5175128 |
Process for fabricating an integrated circuit by a repetition of exposure of a semiconductor pattern
A method for fabricating a semiconductor device comprises the steps of defining a plurality of regions on a substrate, exposing a first pattern that extends over a plurality of such regions such...
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5164337 |
Method of fabricating a semiconductor device having a capacitor in a stacked memory cell
A method of fabricating a semiconductor device is disclosed. The method comprises the steps of: forming a multi-layer film comprising two or more kinds of layers; performing first etching for...
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5155057 |
Stacked v-cell capacitor using a disposable composite dielectric on top of a digit line
A stacked v-cell (SVC) capacitor using a modified stacked capacitor storage cell fabrication process. The SVC capacitor is made up of a polysilicon structure, having a v-shaped cross-section,...
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5145801 |
Method of increasing the surface area of a mini-stacked capacitor
A mini-stack capacitor process, developed for DRAM fabrication, is used to create a stacked capacitor by depositing multiple layers of dielectric over existing digit and word lines. The exposed top...
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5137842 |
Stacked H-cell capacitor and process to fabricate same
An existing stacked capacitor fabrication process is modified to construct a three-dimensional stacked capacitor, referred to as a Stacked H-Cell (SHC). The SHC design defines a capacitor storage...
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5128273 |
Method of making a dynamic random access memory cell with stacked capacitor
A DRAM device includes bit lines formed on an interlayer insulation film which covers gate electrodes on an insulation film on a semiconductor substrate. Each bit line is in contact with the...
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5108943 |
Mushroom double stacked capacitor
A mushroom double stacked capacitor (mushroom cell) using a modified stacked capacitor storage cell fabrication process. The mushroom cell is made up of polysilicon structure, having a mushroom...
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5100825 |
Method of making stacked surrounding reintrant wall capacitor
A stacked surrounding reintrant wall capacitor (SSRWC) using a modified stacked capacitor storage cell fabrication process. The SSRWC is made up of polysilicon structure, having an elongated...
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5071781 |
Method for manufacturing a semiconductor
A method for manufacturing a BOX structured stack type capacitor of a semiconductor device is disclosed. The method comprises the steps of: defining an active region by forming a field oxide film...
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5071783 |
Method of producing a dynamic random access memory device
A dynamic random access memory device includes a storage capacitor having a plurality of stacked conductive films which form a storage electrode. A gap is formed between elevationally adjacent...
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5049957 |
MOS type dynamic random access memory
In a semiconductor memory device, a storage node electrode having a cavity is provided such that the inner surface of a storage node electrode is used as a capacitor electrode. In a DRAM...
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5049517 |
Method for formation of a stacked capacitor
A method is disclosed for forming a capacitor on a semiconductor wafer which utilizes top and back sides of a capacitor node for capacitance maximization. First and second dielectric layers, having...
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5021357 |
Method of making a dram cell with stacked capacitor
A dynamic random access memory device includes a storage capacitor having a plurality of stacked conductive films which form a storage electrode. A gap is formed between elevationally adjacent...
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4742018 |
Process for producing memory cell having stacked capacitor
A process for producing a memory cell having a stacked capacitor. As the reduction in device size of memory cells progresses, it becomes difficult to obtain a satisfactorily large capacitance even...
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