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5733808 |
Method for fabricating a cylindrical capacitor for a semiconductor device
The present invention provides a method of manufacturing a cylindrical capacitor for a DRAM. A resist layer is first used to pattern a first conductive layer and an oxidation barrier layer into a...
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5728618 |
Method to fabricate large capacitance capacitor in a semiconductor circuit
A high capacitance stacked capacitor is defined using one optical mask for two masking steps where one masking step includes overexposing the resist layer. The method begins by forming a...
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5721152 |
Method of fabricating a stacked capacitor for a DRAM cell by plasma etching
A DRAM memory capacitor is formed by depositing a layer of polysilicon on FOX and device areas. Form gate structures and S/D structures by etching through the oxide layer, so openings extend over a...
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5716884 |
Process for fabricating a stacked capacitor
A method for fabricating a capacitor having a fin-shaped electrode on a dynamic random access memory (DRAM) cell having increased capacitance was achieved. The capacitor is fabricated on a silicon...
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5702989 |
Method for fabricating a tub structured stacked capacitor for a DRAM cell having a central column
The present invention provides a method of manufacturing a tub structured stacked capacitor having a central column for a dynamic random access memory (DRAM). The method uses only two photo masks...
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5700731 |
Method for manufacturing crown-shaped storage capacitors on dynamic random access memory cells
A method for manufacturing an array of dynamic random access memory (DRAM) cells having a single crown-shaped or a double crown-shaped stacked capacitors is accomplished. The method involves...
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5691221 |
Method for manufacturing semiconductor memory device having a stacked capacitor
A method for manufacturing a semiconductor memory device comprising the steps of forming a switching transistor including a gate insulating film, a gate electrode, and source and drain regions on a...
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5688709 |
Method for forming composite trench-fin capacitors for DRAMS
A semiconductor memory device capacitor is disclosed which has a trench capacitor portion provided in a semiconductor substrate and a fin capacitor portion provided above the substrate. The trench...
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5679598 |
Method of making a CMOS dynamic random-access memory (DRAM)
A CMOS-technology, DRAM integrated circuit includes paired P-type and N-type wells in a substrate, which wells are fabricated using a self-aligning methodology. Similarly, FET's of the DRAM circuit...
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5677223 |
Method for manufacturing a DRAM with reduced cell area
The present invention relates to a method of forming a capacitor on a semiconductor substrate. A first dielectric layer is formed on a semiconductor substrate. A contact hole is created in the...
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5677221 |
Method of manufacture DRAM capacitor with reduced layout area
A method of manufacturing a capacitor for use in a DRAM. The method includes forming an isolation layer over a substrate, forming a nitride layer over the isolation layer, forming a hole in the...
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5672534 |
Process for fabricating capacitor cells in dynamic random access memory (DRAM) chips
Disclosed is a process for fabricating capacitor cells in DRAM chips allowing the capacitor cells thus fabricated to have higher capacitance by providing a stacked fin-like structure. The process...
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5668036 |
Fabrication method of the post structure of the cell for high density DRAM
A method is disclosed to form memory cell structures for DRAMs in which the capacitor nodes are formed in the shape of posts that fit in an area no larger than that which is over the active regions...
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5661061 |
Process for fabricating a semiconductor integrated circuit device having the multi-layered fin structure
A process for forming an upper-layer fin and a lower-layer fin of a storage electrode, and a semiconductor integrated circuit device fabricated by the process. When two-layered polycrystalline...
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5661340 |
Dynamic random access memory having a stacked fin capacitor with reduced fin thickness
A method for fabricating a dynamic random access memory comprises the steps of forming a diffusion region in a semiconductor substrate, providing an insulation layer on the semiconductor substrate,...
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5654223 |
Method for fabricating semiconductor memory element
A method for fabricating a semiconductor memory element which has an excellent insulation property suitable for high density integration, including the steps of forming self-aligning plate...
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5604148 |
Process of fabricating stacked capacitor configuration for dynamic random access memory
A process of fabricating a capacitor configuration for DRAM devices is disclosed which has an increased capacitance and is structurally rigid. The process provides an umbrella-shaped capacitor...
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5591664 |
Method of increasing the capacitance area in DRAM stacked capacitors using a simplified process
A method is achieved for fabricating a dynamic random access memory (DRAM) storage capacitors having increased capacitance and reduced processing complexity. The capacitor bottom electrodes are...
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5571742 |
Method of fabricating stacked capacitor of DRAM cell
A stack capacitor capable of obtaining high capacitance in a limited area, thereby improving the integration degree of a semiconductor memory device and a process for fabricating the same. The...
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5552334 |
Method for fabricating a Y-shaped capacitor in a DRAM cell
The present invention provides a method of manufacturing a capacitor for a DRAM which uses one mask to define both the node contact hole and the bottom electrode. This novel one mask method uses...
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5536673 |
Method for making dynamic random access memory (DRAM) cells having large capacitor electrode plates for increased capacitance
A method is desired for making an array of dynamic random access memory (DRAM) cells having stacked capacitors with increased capacitance. The method involves forming a bottom electrode having a...
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5534457 |
Method of forming a stacked capacitor with an "I" shaped storage node
A DRAM having a high capacitance stacked capacitor is fabricated by forming gate structures in the device areas and lines over field oxide areas on a substrate. A first insulating layer is formed...
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5532182 |
Method for fabricating stacked capacitor of a DRAM cell
There is disclosed a method for the fabrication of a capacitor of a DRAM, comprising the characteristic steps of: forming a bellows type storage electrode; depositing an impurity-doped polysilicon...
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5508218 |
Method for fabricating a semiconductor memory
A method for fabricating a semiconductor memory, including the steps of: forming a memory cell transistor having a gate electrode, a source area and a drain area on a semiconductor substrate;...
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5491104 |
Method for fabricating DRAM cells having fin-type stacked storage capacitors
An improved method for fabricating dynamic random access memory (DRAM) cell having a fin-shaped capacitor with increased capacitance was achieved. The capacitor is fabricated over the bit lines and...
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5468670 |
Method for fabricating a semiconductor memory device having a stacked capacitor cell
A semiconductor memory device capable of obtaining a sufficient charge storage capacity and yet having a reduced occupied memory cell area. The semiconductor memory device includes a field effect...
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5460996 |
Method for the fabrication of a stacked capacitor all in the dynamic semiconductor memory device
A method for the fabrication of semiconductor memory device. The method comprises the processes of forming an MOS transistor having an impurity-diffused region of LDD structure at a semiconductor...
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5459094 |
Method for fabricating a capacitor cell in the semiconductor memory device having a step portion
A semiconductor memory device including a plurality of memory cells arranged in a matrix manner, each of the memory cells including a transfer transistor constituted by a gate electrode, a gate...
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5444010 |
Method for forming a stacked capacitor in a semiconductor device
This invention relates to a method for forming a stacked capacitor in a semiconductor device. This invention can increase the capacitance of a capacitor by planarizing a polysilicon layer for a...
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5441908 |
Capacitor of a semiconductor device having increased effective area
A semiconductor memory device includes a plurality of memory cells each having a single transistor and a single capacitor on a semiconductor substrate. The capacitor has a storage electrode with an...
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5422295 |
Method for forming a semiconductor memory device having a vertical multi-layered storage electrode
A manufacturing method for a semiconductor memory device including a capacitor having a double fin-shaped structure is provided, wherein a storage electrode is formed by applying a thick planar...
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5416037 |
Method of making a semiconductor memory device
In a DRAM which includes a memory cell consisting of one MOS transistor and one stacked capacitor, the node electrode of the capacitor is constituted of a stacked layer formed by alternately...
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5409856 |
Process of making a capacitor in a semiconductor memory device
A process of making a capacitor in a semiconductor memory device provides photomasking processes which are reduced as all the stacked-disposable layers and the storage electrode node contact are...
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5409855 |
Process for forming a semiconductor device having a capacitor
A method for making a semiconductor memory cell having a storage capacitor disposed between metallization layers. Field and active regions and transistor circuit elements are formed on a substrate,...
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5385859 |
Method for fabricating a semiconductor device having a capacitor with a conductive plug structure in a stacked memory cell
A method for fabricating a semiconductor device includes steps of: (a) forming a MIS type transistor having a gate electrode and a first source/drain region and a second source/drain on a...
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5384276 |
Method of fabricating a memory device with a multilayer insulating film
A method of fabricating a semiconductor device is disclosed. The method comprises the steps of: forming a multi-layer film comprising two or more kinds of layers; performing first etching for...
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5374577 |
Polysilicon undercut process for stack DRAM
A method for fabricating DRAM capacitors is described. Field effect devices are foraged in the silicon substrate. A first oxide layer is formed over the device and field oxide areas. The capacitors...
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5374576 |
Method of fabricating stacked capacitor cell memory devices
A semiconductor memory device having STC cells wherein the major portions of active regions consisting of channel-forming portions are inclined at an angle of 45 degrees with respect to word lines...
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5362664 |
Method for fabricating a semiconductor memory device
This invention relates to a method for fabricating a semiconductor memory device with a large capacitance, which comprises the steps of forming a gate insulating film, a gate electrode and a source...
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5326714 |
Method of making a fully used tub DRAM cell
A method is described for forming a dynamic random access memory cell capacitor in which a polysilicon spacer is formed on top of the bottom polysilicon electrode to construct a tub shape and a wet...
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5290726 |
DRAM cells having stacked capacitors of fin structures and method of making thereof
A method of making dynamic random access memory cells having stacked capacitors of fin structures enabling the extension of the capacitor regions, irrespective of the used design rule. The method...
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5286668 |
Process of fabricating a high capacitance storage node
A method for the fabrication of high density dynamic random access memory (DRAM) devices with particular emphasis on the capacitor formation. The capacitor is formed using layers of doped and...
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5281549 |
Process for fabricating a stacked capacitor having an I-shaped cross-section in a dynamic random access memory array
An existing stacked capacitor fabrication process is modified to construct a three-dimensional stacked capacitor, referred to as a Stacked I-Cell (SIC). The SIC design defines a capacitor storage...
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5244826 |
Method of forming an array of finned memory cell capacitors on a semiconductor substrate
An array of finned memory cell capacitors on a semiconductor substrate includes: a) an array of electrically insulated word lines atop a semiconductor substrate; b) first and second active regions...
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5240871 |
Corrugated storage contact capacitor and method for forming a corrugated storage contact capacitor
A dynamic random access memory (DRAM) cell having a corrugated storage contact capacitor for enhancing capacitance. A noncritical alignment is effected between the substrate contact area and the...
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5236859 |
Method of making stacked-capacitor for a dram cell same
There is disclosed a stacked capacitor with high capacity which ensures structural stability in a DRAM cell and a method for manufacturing the same. The stacked-capacitor is of a hollow (or...
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5234855 |
Stacked comb spacer capacitor
A stacked comb spacer capacitor (SCSC) using a modified stacked capacitor storage cell fabrication process. The SCSC is made up of polysilicon structure, having a spiked v-shaped (or comb-shaped)...
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5223448 |
Method for producing a layered capacitor structure for a dynamic random access memory device
An improved method and resulting structures for producing a layered capacitor structure of memory cell of a DRAM device wherein a doped polysilicon spacer operates as a dopant source for an...
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5219778 |
Stacked V-cell capacitor
A stacked v-cell (SVC) capacitor using a modified stacked capacitor storage cell fabrication process. The SVC capacitor is made up of polysilicon structure, having a v-shaped cross-section, located...
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5217918 |
Method of manufacturing a highly integrated semiconductor memory device with trench capacitors and stacked capacitors
A highly integrated semiconductor memory device comprises a plurality of memory cells formed by alternately disposing a stack-type capacitor cell and a combined stack-trench type capacitor cell...
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