Matches 651 - 700 out of 1039 < 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 >
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6242296 Method of fabricating embedded DRAM  
A method of fabricating an embedded DRAM. A word line and a gate are formed in a memory region and a logic circuitry region on the substrate. An etching stop layer is formed over the substrate and...
6239011 Method of self-aligned contact hole etching by fluorine-containing discharges  
The practice of forming self-aligned contacts (SACs) in MOSFETs using a silicon nitride gate sidewall and a silicon nitride gate cap has found wide acceptance, particularly in the manufacture of...
6238993 Polysilicon load for 4T SRAM operation at cold temperatures  
This invention relates to the fabrication of integrated circuit devices and more particularly to a method for reducing the otherwise excessive negative TCR of low doped polysilicon load resistors...
6238972 Method for increasing capacitance  
The capacitor of a DRAM cell is formed by depositing a layer of doped polysilicon, patterning the layer of doped polysilicon to define the extent of the capacitor's lower electrode and then...
6236101 Metallization outside protective overcoat for improved capacitors and inductors  
A thick layer of copper is formed on the outside the protective overcoat (PO) which protects an integrated circuit, and forms both an inductor and the upper electrode of a capacitor. Placing this...
6232194 Silicon nitride capped poly resistor with SAC process  
A new method of forming a polysilicon resistor having precisely controlled resistance by using a thin silicon nitride cap over the polysilicon resistor is described. A dielectric layer is provided...
6228699 Cross leakage of capacitors in DRAM or embedded DRAM  
A method of forming stacked capacitors for a DRAM structure. A thin layer of poly is deposited over the inside surface of the crown holes; the columns of the crown holes form the insulation between...
6228700 Method for manufacturing dynamic random access memory  
A method for manufacturing dynamic random access (DRAM) memory. A substrate has a plurality of active regions marked out by shallow trench isolation (STI) structures therein. A conductive layer and...
6225155 Method of forming salicide in embedded dynamic random access memory  
In a method of forming a salicide layer in an embedded dynamic random access memory, a thin oxide layer, a silicon nitride layer and a thick oxide layer are sequentially formed over a substrate...
6221727 Method to trap air at the silicon substrate for improving the quality factor of RF inductors in CMOS technology  
A new method of fabricating an inductor utilizing air as an underlying barrier in the manufacturing of integrated circuits is described. A field oxide region is formed in and on a semiconductor...
6221710 Method of fabricating capacitor  
A method of fabricating a capacitor on a semiconductor substrate. A barrier layer is formed over the substrate to serve as a bottom electrode of the capacitor. A dielectric layer is formed on the...
6218231 Methods for fabricating high dielectric capacitors of semiconductor devices  
Provided is a method for fabricating a high dielectric capacitor of a semiconductor device without decreasing the properties of the dielectric under oxygen atmosphere in the process for depositing...
6217357 Method of manufacturing two-power supply voltage compatible CMOS semiconductor device  
In a method of manufacturing a two-type power supply voltage compatible CMOS semiconductor, the number of photolithography steps that aim at forming an LDD, a pocket, and a source/drain region is...
6218232 Method for fabricating DRAM device  
A method for fabricating a DRAM device, comprising the steps of: providing a SOI substrate upon which a first silicon layer, a buried oxide film and a second silicon layer are stacked; forming an...
6218230 Method for producing capacitor having hemispherical grain  
A first amorphous silicon layer is formed to connect to a portion of a capacitor contact plug, and then a second amorphous silicon layer and a third amorphous silicon layer are formed thereon. The...
6214663 Methods of fabricating integrated circuit devices having contact pads which are separated by sidewall spacers  
An integrated circuit field effect transistor includes contact pads which are separated by sidewall spacers. A first pad which electrically contacts one of the spaced-apart source and drain regions...
6214661 Method to prevent oxygen out-diffusion from BSTO containing micro-electronic device  
In a method of forming a microelectronic structure of a Pt/BSTO/Pt capacitor stack for use in a DRAM device, the improvement comprising substantially eliminating or preventing oxygen out-diffusion...
6211008 Method for forming high-density high-capacity capacitor  
A method for fabricating a high-density high-capacity capacitor is described. A dielectric layer is provided overlying a semiconductor substrate. A sacrificial layer is deposited overlying the...
6211005 Methods of fabricating integrated circuit ferroelectric memory devices including a material layer on the upper electrodes of the ferroelectric capacitors thereof  
Integrated circuit ferroelectric memory devices include an integrated circuit substrate which includes a cell region and a periphery region. A plurality of ferroelectric memory cells are formed in...
6207521 Thin-film resistor employed in a semiconductor wafer and its method formation  
The present invention provides a thin-film resistor positioned on a semiconductor wafer and its method of formation. The thin-film resistor comprises a dielectric layer, a resistance layer, a...
6207564 Method of forming self-aligned isolated plugged contacts  
A method for preparing an SRAM or DRAM structure on a substrate with an oppositely doped well therein, a field oxide region extending above and between the well and the substrate, first and second...
6207487 Method for forming dielectric film of capacitor having different thicknesses partly  
The present invention discloses a method for forming a dielectric film having improved leakage current characteristics in a capacitor. A lower electrode having a surface and a rounded protruding...
6204108 Method of fabricating a dynamic random access memory capacitor  
A method of fabricating a capacitor. A crown-shape bottom storage node is formed on a conductive region. The crown-shape bottom storage node has a wavelike interior surface and a hemi-spherical...
6204105 Method for fabricating a polycide semiconductor device  
A method for fabricating a semiconductor device includes the steps of forming a field oxide layer on a field region of a semiconductor substrate where a field region and an active region are...
6204109 Method for forming a cylindrical capacitor  
A method for forming a cylindrical capacitor of a dynamic random access memory cell is disclosed. The method includes firstly providing a semiconductor substrate having a dielectric layer thereon,...
6204106 Method of fabricating a DRAM access transistor with dual gate oxide technique  
The process comprises the steps of growing a first oxide layer on the upper surface of a substrate; depositing a silicon nitride layer on top of the first oxide layer; patterning the silicon...
6204110 Methods of forming an SRAM  
A semiconductor processing method of forming a resistor from semiconductive material includes: a) providing a node to which electrical connection to a resistor is to be made; b) providing a first...
6204070 Method for manufacturing ferroelectric capacitor  
The present invention relates to a method for manufacturing ferroelectric capacitor, capable of preventing the hydrogen gas generated in the process for the overlying interlayer insulating layer...
6204107 Method for forming multi-layered liner on sidewall of node contact opening  
A method for forming a multi-layered liner on the sidewalls of a node contact opening includes the steps of providing a substrate having a dielectric layer thereon. The dielectric layer further...
6200845 Method of forming a storage capacitor  
The present invention provides a method of forming at least a bottom electrode of a capacitor in a semiconductor device. The method comprises the steps forming a first insulation film on a...
6200844 Method of manufacturing dielectric film of capacitor in dynamic random access memory  
A method of manufacturing a dielectric film for a capacitor in a DRAM. A native oxide layer is removed using a rapid ramp process at a pressure lower than 10 -5 torr. A nitridation is performed to...
6197628 Ruthenium silicide diffusion barrier layers and methods of forming same  
A method for use in the fabrication of integrated circuits includes providing a substrate assembly having a surface. A diffusion barrier layer is formed over at least a portion of the surface. The...
6197630 Method of fabricating a narrow bit line structure  
A method of fabricating a narrow bit line structure is disclosed. The fabrication includes the steps as follows. At first, the interpoly dielectric layer is formed over the MOSFET. Then the landing...
6197629 Method of fabricating a polysilicon-based load circuit for static random-access memory  
A semiconductor fabrication method is provided for the fabrication of a polysilicon-based load circuit (called poly-load) for SRAM (static random-access memory). In accordance with this method, a...
6194261 High yield semiconductor device and method of fabricating the same  
A unit cell of a static random-access memory includes a laminated gate electrode structure adjacent to a diffusion layer. A top surface of the gate electrode structure is coated with a first...
6190956 Forming a capacitor structure of a semiconductor  
A method for forming a capacitor structure of semiconductor is disclosed. The method includes the following steps. First of all, a first oxide layer is deposited. A first nitride layer is formed....
6190955 Fabrication of trench capacitors using disposable hard mask  
Improved trench forming methods for semiconductor substrates using BSG avoid the problems associated with conventional TEOS hard mask techniques. The methods comprise: (a) providing a...
6190991 Method for fabricating a capacitor  
A method for fabricating a capacitor includes the formation of a self-aligned and essentially amorphous passivation edge web. The passivation edge web is formed in the course of a BST vapor phase...
6187647 Method of manufacturing lateral high-Q inductor for semiconductor devices  
A method of forming an inductor for a semiconductor device comprises the steps of forming the bottom legs on a first substrate; depositing a second substrate layer over the first substrate; forming...
6187621 Semiconductor processing methods of forming capacitor constructions and semiconductor processing methods of forming DRAM constructions  
A semiconductor processing method of forming a capacitor construction includes, a) providing a pair of electrically conductive lines having respective electrically insulated outermost surfaces; b)...
6187619 Method to fabricate short-channel MOSFETs with an improvement in ESD resistance  
A method to fabricate simultaneously a MOS transistor and an ESD protective transistor in a silicon substrate is disclosed. The ESD protective devices are fabricated with a double diffused drain...
6187618 Vertical bipolar SRAM cell, array and system, and a method for making the cell and the array  
An SRAM memory cell is provided in which a pair of cross-coupled n-type MOS pull-down transistors are coupled to respective parasitically formed bipolar pull-up transistors. The memory cell is...
6184045 Method for DRAM cell arrangement and method for its production  
A memory cell contains at least one transistor and one capacitor connected to an upper bit line. The capacitor contains a first capacitor electrode arranged above the transistor, and is connected...
6184073 Process for forming a semiconductor device having an interconnect or conductive film electrically insulated from a conductive member or region  
A semiconductor device includes a memory array of static-random-access memory cells. The SRAM cells are formed using a process flow more closely associated with logic-type devices. The SRAM cells...
6184075 Method of fabricating interconnect lines and plate electrodes of a storage capacitor in a semiconductor device  
A method of fabricating a semiconductor device where the formation of a conductive layer typically over a storage capacitor on the device is used both as a plate electrode and also as an...
6184044 Thin film capacitor including perovskite-type oxide layers having columnar structure and granular structure  
The present invention relates to a thin film capacitor that may be used as a stacked capacitor in a memory cell. In a thin film capacitor including a high dielectric constant layer sandwiched by...
6184074 Method of fabrication a self-aligned polysilicon/diffusion barrier/oxygen stable sidewall bottom electrode structure for high-K DRAMS  
The capacitor (12) comprises a HDC dielectric (40) and upper (44) and lower (32-36) electrodes. The lower electrode comprises a polysilicon base (32), a diffusion barrier (34) on the sidewalls of...
6180462 Method of fabricating an analog integrated circuit with ESD protection  
A method of fabricating an ESD protection circuit without salicide formation is described. First, the isolation regions, the dielectric layer, the gate structures, the resistors, the end capacitor...
6180482 Method for manufacturing high dielectric capacitor  
A method for manufacturing a high dielectric capacitor is provided. A capacitor cell unit comprised of an amorphous, high dielectric film which is formed on a semiconductor substrate. Next, the...
6180446 Method of fabricating an oxygen-stable layer/diffusion barrier/poly bottom electrode structure for high-K DRAMS using disposable-oxide processing  
A capacitor structure and method. The capacitor (12) comprises a HDC dielectric (40) and upper (44) and lower electrodes. The lower electrode comprises a capacitor via (19), diffusion barrier (34)...
Matches 651 - 700 out of 1039 < 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 >