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6593187 |
Method to fabricate a square poly spacer in flash
A square poly-spacer and making of the same are disclosed. The square poly-spacer is formed adjacent a floating poly-gate sharing a common source line with another floating poly-gate. The common...
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6589830 |
Self-aligned process for fabricating power MOSFET with spacer-shaped terraced gate
A process forms a power semiconductor device with reduced input capacitance and improved switching speed. A substrate with an epitaxial has an oxide layer patterned to form a narrow terraced gate....
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6586260 |
Single c-axis PGO thin film electrodes having good surface smoothness and uniformity and methods for making the same
A method of forming an electrode and a ferroelectric thin film thereon, includes preparing a substrate; depositing an electrode on the substrate, wherein the electrode is formed of a material taken...
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6586290 |
Structure for ESD protection in semiconductor chips
An ESD protection structure for I/O pads is formed with well resistors underlying the active areas of a transistor. The well resistors are coupled in series with the active areas and provide...
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6586310 |
High resistivity film for 4T SRAM
The present invention provides a method of manufacturing a resistor for use in a memory element and a semiconductor device employing the resistor. The method of manufacturing may comprise forming a...
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6583464 |
Memory cell using amorphous material to stabilize the boundary face between polycrystalline semiconductor material of a capacitor and monocrystalline semiconductor material of a transistor
A memory cell array has memory cells in which there is an electrical connection between a polycrystalline semiconductor material of a capacitor electrode and a monocrystalline semiconductor region....
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6583001 |
Method for introducing an equivalent RC circuit in a MOS device using resistive paths
A method for providing low power MOS devices that include resistive paths specifically designed to provide a specified resistance between the bulk material of the device and a well tie contact. By...
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6583003 |
Method of fabricating 1T1R resistive memory array
A method is provided for forming a 1T1R resistive memory array. The method of forming a 1T1R resistive memory array structure on a semiconductor substrate comprises forming an array of transistors...
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6576942 |
Diffusion prevention film and a semiconductor storage device
By depositing a diffusion prevention film 7 constructed of an oxide of aluminum containing barium and heat-treating the diffusion prevention film 7 in the atmosphere of a mixed gas of oxygen...
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6573186 |
Method for forming plug of semiconductor device
The method of forming a plug of a semiconductor device includes sequentially forming a conductive film and an insulation film over a semiconductor substrate having a high density region and a low...
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6569723 |
Crossed strapped VSS layout for full CMOS SRAM cell
This method forms an SRAM device with an array of cells having low resistance conductors for the reference potential (Vss) circuits connected to transistors in the SRAM device. First form an SRAM...
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6569726 |
Method of manufacturing MOS transistor with fluoride implantation on silicon nitride etching stop layer
A method of manufacturing a MOS transistor. A substrate having a gate oxide layer, a gate electrode and spacers attached to the sidewalls of the gate electrode is provided. A source/drain (S/D)...
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6569731 |
Method of forming a capacitor dielectric structure
A method of forming capacitor dielectric structure. The method includes steps of providing a semiconductor substrate having at least a predetermined capacitor structure, using silicon nitride...
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6569732 |
Integrated process sequence allowing elimination of polysilicon residue and silicon damage during the fabrication of a buried stack capacitor structure in a SRAM cell
A process sequence for fabricating a buried stack capacitor structure, to be used as a component in a memory cell such as a one transistor SRAM cell, has been developed. The process features...
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6566193 |
Method for producing a cell of a semiconductor memory
The process first forms trench capacitors in a substrate, which are filled with a trench fill and in which a first insulating layer is disposed over the conductive trench fill. The first insulating...
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6566185 |
Method of manufacturing a plural unit high frequency transistor
A semiconductor device has a plurality of transistor units each of which is constituted by a unit prepared by arranging a plurality of unit cells each made up of a drain, gate, and source adjacent...
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6566222 |
Methods of forming recessed hemispherical grain silicon capacitor structures
Methods of manufacturing capacitor structures with edge zones that are substantially free of hemispherical grain silicon along the upper edges of the capacitor structures are disclosed. The...
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6559000 |
Method of manufacturing a capacitor in a semiconductor device
There is disclosed a method of manufacturing a capacitor in a semiconductor device. The present invention forms a Ru film as a lower electrode of the capacitor in which a Ta 2 O 5 film is used as...
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6548845 |
Semiconductor device and method of fabricating the same
A semiconductor device includes a semiconductor substrate, a gate electrode formed over the semiconductor substrate and a first interlevel insulating layer which is formed over the semiconductor...
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6544831 |
Semiconductor device and method for manufacturing the same
Implemented are a semiconductor device comprising a trench type capacitor having such a structure that a soft error tolerance is excellent, a contact resistance between an electrode and a metal...
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6541330 |
Capacitor for semiconductor memory device and method of manufacturing the same
Disclosed are a capacitor for semiconductor device capable of increasing storage capacitance and preventing leakage current, and method of manufacturing the same. According to the present...
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6537868 |
Method for forming novel low leakage current cascaded diode structure
A cascaded diode acting as an ESD protection device with reduced substrate leakage current is disclosed. The cascaded diode is composed of a chain of coupled similar elemental diodes, each composed...
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6534356 |
Method of reducing dark current for an image sensor device via use of a polysilicon pad
A process for reducing the dark current generation of an image sensor cell, fabricated on a semiconductor substrate, has been developed. The process features the use of polysilicon pad structure,...
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6534409 |
Silicon oxide co-deposition/etching process
Methods of providing silicon oxide on a substrate in a single process step by simultaneously introducing both a silicon source gas and an etch gas into a CVD chamber. As a result, the method will...
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6531376 |
Method of making a semiconductor device with a low permittivity region
A method of making a semiconductor device ( 10 ) having a low permittivity region ( 24 ) includes forming a first layer ( 30/42 ) over a surface of a trench ( 20 ), and etching through an opening (...
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6531358 |
Method of fabricating capacitor-under-bit line (CUB) DRAM
A method for fabricating a CUB DRAM device having an enlarged process window for bit line contact patterning is deacribed. A plurality of capacitor node contact junctions and a bit line junction...
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6528367 |
Self-aligned active array along the length direction to form un-biased buried strap formation for sub-150 NM BEST DRAM devices
An improved buried strap method in the fabrication of a DRAM integrated circuit device where the active area is self-aligned to the deep trench in the length direction only is described. An etch...
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6528397 |
Semiconductor thin film, method of producing the same, apparatus for producing the same, semiconductor device and method of producing the same
In a polycrystalline silicon thin film transistor, a semiconductor device having a high field effect mobility is achieved by increasing a grain size of a silicon thin film. First, an insulation...
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6528366 |
Fabrication methods of vertical metal-insulator-metal (MIM) capacitor for advanced embedded DRAM applications
Methods for fabricating a vertical metal-insulator-metal (MIM) capacitor are described. The capacitor can be fabricated at any level of metal interconnect, depending upon the desired depth of the...
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6524868 |
Method for fabricating semiconductor memory device
A semiconductor memory device is provided which prevents a lifting phenomenon by improving an adhesive strength between an upper electrode and an interlayer insulating layer. The semiconductor...
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6521494 |
Method of manufacturing semiconductor devices utilizing underlayer-dependency of deposition of capacitor electrode film, and semiconductor device
In a semiconductor device including a plurality of memory cells, a deposition preventing film is formed on an interlayer insulating film in which a plurality of holes are formed, or a seed film is...
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6518613 |
Memory cell configuration with capacitor on opposite surface of substrate and method for fabricating the same
A MOS transistor of a memory cell and a bit line connected thereto are disposed on a first surface of a substrate. A capacitor of the memory cell is disposed on a second surface of the substrate,...
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6514831 |
Nitride read only memory cell
A nitride read only memory (NROM) cell. In the NROM cell, a composite gate dielectric is formed on a substrate, a conformal oxide layer is formed on the surface of the composite gate dielectric,...
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6514823 |
Method of making loadless four-transistor memory cell with different gate insulation thicknesses for N-channel drive transistors and P-channel access transistors
A memory cell has a pair of n-ch drive MOS transistors, a pair of p-ch access MOS transistors. The access MOS transistor supply electric charge to storage nodes of the drive MOS transistors without...
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6514811 |
Method for memory masking for periphery salicidation of active regions
An integrated circuit memory fabrication process and structure, in which salicidation is performed on the periphery (and optionally on the ground lines) of a memory chip, but not on the transistors...
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6509217 |
Inexpensive, reliable, planar RFID tag structure and method for making same
Process and device structures for constructing RFID tag and smart card and toy controller integrated circuit transceivers built inexpensively using flat panel display manufacturing machines on...
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6509224 |
Semiconductor device and method for manufacturing thereof
A semiconductor device in which the number of steps intrinsic to a memory cell is reduced to as small a value as possible to realize reduction in cell size and invulnerability against software...
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6500740 |
Process for fabricating semiconductor devices in which the distribution of dopants is controlled
In accordance with the invention, a silicon gate field effect device is provided with improved control over the distribution of dopants by forming thin buried layer of oxide within the silicon...
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6500724 |
Method of making semiconductor device having passive elements including forming capacitor electrode and resistor from same layer of material
A semiconductor device and a method of making a semiconductor device. A damascene metal layer ( 16 ) is formed in an insulating dielectric layer ( 12 ), which is in direct electrical communication...
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6498066 |
Ultra-late programming ROM and method of manufacture
A ROM embedded in a multi-layered integrated circuit includes rows of transistor memory cells. For reduced area, each transistor in a row optionally shares a terminal with an adjacent transistor in...
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6495411 |
Technique to improve deep trench capacitance by increasing surface thereof
A method for fabricating deep-submicron DRAMs containing a deep trench capacitor with enlarged sidewall surface for improved storage capacitance. It includes the main steps of: (a) forming a...
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6495875 |
Method of forming metal oxide metal capacitors using multi-step rapid material thermal process and a device formed thereby
The present invention provides a method of forming a metal oxide metal (MOM)capacitor on a substrate, such as a silicon substrate, of a semiconductor wafer in a rapid thermal process (RTP) machine....
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6492672 |
Semiconductor device
A MOS transistor includes a gate oxide film, and a gate electrode which is formed by a lamination of first and second conductor films. A capacitive element includes a lower capacitive electrode...
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6492221 |
DRAM cell arrangement
A dynamic random access memory includes memory cells arranged in rows and columns on the substrate and a plurality of connecting pillars, each associated with a memory cell. A bit line extends...
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6489195 |
Method for fabricating DRAM cell using a protection layer
A DRAM cell is provided, along with a method for fabricating such a DRAM cell. A protection layer pattern is formed to cover a common drain region of first and second access transistors. Storage...
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6486022 |
Method of fabricating capacitors
Disclosed is a capacitor for a semiconductor device and a method of fabricating such capacitors including the steps of providing a semiconductor substrate, forming a lower electrode on the...
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6486017 |
Method of reducing substrate coupling for chip inductors by creation of dielectric islands by selective EPI deposition
A new method is provided for the creation of a horizontal spiral inductor over the surface of a silicon substrate. A first layer of dielectric is deposited over the surface of the substrate, this...
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6482693 |
Methods of forming diodes
Disclosed are methods of forming resistors and diodes from semiconductive material, and static random access memory (SRAM) cells incorporating resistors, and to integrated circuitry incorporating...
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6483140 |
DRAM storage node with insulating sidewalls
A lower insulating film is formed so as to cover source/drain regions electrically connected to capacitors. Bit lines and upper insulating layers are formed on the lower insulating film. SCs...
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6482708 |
Nonvolatile memory device and method for manufacturing the same
A nonvolatile memory device having a lightly doped source and a method for manufacturing the same are provided. In the nonvolatile memory device, a first insulating layer, a floating gate, a second...
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