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7612400 |
MIM device and electronic apparatus
An MIM device includes a lower electrode of a metal nitride film, a hysteresis film of an oxide film containing Nb formed on the lower electrode, and an upper electrode of a metal nitride film...
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7611942 |
Semiconductor integrated circuit device and a method of manufacturing the same
A semiconductor integrated circuit device having a capacitor element, including a lower electrode provided over an element isolation region of a principal surface of a semiconductor substrate, and...
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7605473 |
Nonvolatile memory devices
Methods of fabricating nonvolatile memory devices are provided. An isolation layer is formed on a substrate. The substrate has a memory region and a well contact region and the isolation layer...
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7605034 |
Integrated circuit memory cells and methods of forming
An integrated circuit memory cell includes a combined first capacitor electrode and first transistor source/drain, a second capacitor electrode, a capacitor dielectric between the first and second...
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7605033 |
Low resistance peripheral local interconnect contacts with selective wet strip of titanium
Methods for forming memory devices and integrated circuitry, for example, DRAM circuitry, structures and devices resulting from such methods, and systems that incorporate the devices are provided....
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7598557 |
Semiconductor device and method for fabricating a semicondutor device including first and second hydrogen diffusion preventing films
The semiconductor device comprises a first insulation film 26 formed over a semiconductor substrate 10, first conductor plug 32 buried in a first contact hole 28 a formed down to a...
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7585723 |
Method for fabricating capacitor
A method for fabricating a semiconductor device includes forming an insulation structure over a substrate structure including contact plugs, etching the insulation structure to form opening regions...
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7575969 |
Buried layer and method
A high resistivity silicon for RF passive operation including CMOS structures with implanted CMOS wells and a buried layer under the wells formed by deep implants during well implantations.
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7572710 |
Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects
The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local interconnects. In one implementation, a method of...
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7566611 |
Manufacturing method for an integrated semiconductor structure
The present invention provides a manufacturing method for an integrated semiconductor structure comprising the steps of providing a semiconductor substrate having a plurality of gate stacks in a...
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7566607 |
Semiconductor device and fabrication process thereof
A semiconductor device includes a semiconductor substrate, a polysilicon pattern formed on the semiconductor substrate via an insulation film, an interlayer insulation film formed on the...
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7560172 |
Low voltage CMOS structure with dynamic threshold voltage
A method for dynamically varying a threshold voltage of a complimentary metal oxide semiconductor (CMOS) includes providing a substrate pickup formed a semiconductor material type which is...
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7544562 |
Method for manufacturing a capacitor electrode structure
A method for manufacturing a capacitor electrode structure, according to which the following steps are executed: A substrate is provided, which comprises contact pads arranged in lines and rows on...
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7544557 |
Gate defined Schottky diode
A Schottky diode exhibiting low series resistance is efficiently fabricated using a substantially standard CMOS process flow by forming the Schottky diode using substantially the same structures...
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7541238 |
Inductor formed in an integrated circuit
An inductor formed within an integrated circuit and a method for forming the inductor. The inductor comprises an underlying layer of aluminum formed in a first metallization layer and patterned and...
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7538397 |
Semiconductor device and method for fabricating the same
A semiconductor device includes a resistor element covered by a silicon oxide film. In the semiconductor device, with respective gate electrodes of MIS transistors and impurity doped layers, i.e.,...
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7535045 |
Checkerboard deep trench dynamic random access memory cell array layout
A checkerboard deep trench dynamic random access memory cell array layout is disclosed, which includes a substrate, a plurality of gate conductor lines disposed on the substrate, a plurality of...
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7531405 |
Method of manufacturing a dielectric layer and corresponding semiconductor device
A polycrystalline dielectric layer is formed wherein the dielectric layer comprises a first dielectric material containing an oxide or nitride and a second material contributing to less than 1% in...
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7521330 |
Methods for forming capacitor structures
A method for forming a capacitor includes forming a dielectric layer over a substrate. A conductive layer is formed over the dielectric layer. Dopants are implanted through at least one of the...
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7517762 |
Semiconductor device capable of preventing moisture-absorption of fuse area thereof and method for manufacturing the fuse area
A fuse area of a semiconductor device capable of preventing moisture-absorption and a method for manufacturing the fuse area are provided. When forming a guard ring for preventing permeation of...
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7498219 |
Methods for reducing capacitor dielectric absorption and voltage coefficient
Semiconductor devices and fabrication methods are provided in which a capacitor dielectric is provided with phosphorus or other n-type dopants through implantation of other techniques to reduce the...
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7494863 |
Method for manufacturing capacitor for semiconductor device
Disclosed is a method for manufacturing a capacitor in a semiconductor device. A method consistent with the present invention includes forming a lower electrode on a semiconductor substrate;...
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7488665 |
Structurally-stabilized capacitors and method of making of same
Structurally-stable, tall capacitors having unique three-dimensional architectures for semiconductor devices are disclosed. The capacitors include monolithically-fabricated upright microstructures,...
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7488639 |
Method of manufacturing a semiconductor integrated circuit device
In order to provide a semiconductor integrated circuit device such as a high-performance semiconductor integrated circuit device capable of reducing a soft error developed in each memory cell of a...
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7485909 |
Semiconductor device and method of manufacturing the same
A semiconductor device includes a semiconductor substrate formed with a trench having a sidewall including a middle point. The trench includes a first part extending from a surface of the...
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7479452 |
Method of forming contact plugs
A method of forming cell bitline contact plugs is disclosed in the present invention. After providing a semiconductor substrate with a first region and a second region, cell bitline contacts are...
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7473596 |
Methods of forming memory cells
An integrated circuit memory cell includes a combined first capacitor electrode and first transistor source/drain, a second capacitor electrode, a capacitor dielectric between the first and second...
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7459369 |
High capacitance low resistance electrode
Methods are provided for manufacturing an electrode. In one exemplary embodiment, the method includes the steps of contacting the silver layer with vanadium oxide, and heating the silver layer and...
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7456076 |
Techniques for forming passive devices during semiconductor back-end processing
Fabrication of electronic devices in the “metal layers” of semiconductor devices. Each metal layer includes a dielectric layer that supports a conductive layer, which includes electrically...
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7452765 |
Single event upset in SRAM cells in FPGAs with high resistivity gate structures
SEU-hardening series resistances loads are formed within the gate structures of cross-coupled inverters of a latch. For some embodiments, the gate contact for the input of each cross-coupled...
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7439125 |
Contact structure for a stack DRAM storage capacitor
A method for fabricating a contact structure for a stack storage capacitor includes forming the contact structure in a node contact region with contact openings, an insulating liner and a...
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7429507 |
Semiconductor device having both memory and logic circuit and its manufacture
A gate insulating film is formed on the principal surface of a semiconductor substrate. A silicon film is formed on the gate insulating film. Impurities are doped in the silicon film. In this case,...
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7407520 |
Method of making a multi-electrode double layer capacitor having hermetic electrolyte seal
A long life double layer capacitor and method of making the same including a case and a first terminal with an electrically insulating hermitic seal interposed between the first terminal and the...
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7381607 |
Method of forming a spiral inductor in a semiconductor substrate
An inductor formed on a semiconductor substrate, comprising active device regions. The inductor comprises conductive lines formed on a dielectric layer overlying the semiconductor substrate. The...
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7371636 |
Method for fabricating storage node contact hole of semiconductor device
A method for fabricating a storage node contact hole of a semiconductor device includes: forming an inter-layer insulation layer over a substrate; forming a hard mask over the inter-layer...
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7371632 |
Semiconductor device having high-voltage transistor and PIP capacitor and method for fabricating the same
A semiconductor device having a high-voltage transistor and a polysilicon-insulator-polysilicon (PIP) capacitor, and a method for fabricating the same are provided. A current flow path of the...
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7364961 |
SRAM cell design for soft error rate immunity
A new method to form a SRAM memory cell in an integrated circuit device is achieved. The method comprises providing a bi-stable flip-flop cell having a data storage node and a data bar storage...
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7361951 |
Flash memory having memory section and peripheral circuit section
A semiconductor memory device includes a semiconductor substrate, an element isolation region formed in the semiconductor substrate and including a thick element isolating insulation film, for...
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7361540 |
Method of reducing noise disturbing a signal in an electronic device
Certain aspects of a method for reducing noise disturbing at least one signal in an electronic device may comprise shielding a first layer doped with a first dopant from a signaling layer employing...
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7338854 |
Method for manufacturing multilayer ceramic capacitor
A method for manufacturing a multilayer ceramic capacitor, in which internal electrodes printed on each of a plurality of dielectric sheets have reduced thicknesses using an absorption member,...
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7338852 |
Method of forming a semiconductor device having a capacitor and a resistor
A method of simultaneously forming at least: one capacitor two resistors and one metal-oxide semiconductor. A first doped polysilicon layer/patterned interpoly oxide film/second doped polysilicon...
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7335955 |
ESD protection for passive integrated devices
Methods and apparatus are provided for ESD protection of integrated passive devices (IPDs). The apparatus comprises one or more IPDs having terminals or other elements potentially exposed to ESD...
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7323379 |
Fabrication process for increased capacitance in an embedded DRAM memory
An embedded memory system includes an array of dynamic random access memory (DRAM) cells, which are isolated with deep trench isolation, and logic transistors, which are isolated with shallow...
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7314786 |
Metal resistor, resistor material and method
A metal resistor and resistor material and method of forming the metal resistor are disclosed. The metal resistor may include an infused metal selected from the group consisting of: copper (Cu)...
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7307871 |
SRAM cell design with high resistor CMOS gate structure for soft error rate improvement
A high resistor SRAM memory cell to reduce soft error rate includes a first inverter having an output as a first memory node, and a second inverter having an output as a second memory node. The...
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7300836 |
Manufacturing method of semiconductor device
This invention is directed to a manufacturing method of a semiconductor device having a MOS transistor and a diffusion resistance layer formed on a same semiconductor substrate, where current...
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7288826 |
Semiconductor integrated circuit device
The bottom side of an N type silicon substrate is connected to a power supply terminal, a second P type epitaxial layer is formed on all sides of the N type silicon substrate, and a device forming...
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7288450 |
General protection of an integrated circuit against permant overloads and electrostatic discharges
In an integrated circuit, a diode is interposed between the semiconductor substrate and the contact pad to an external bias voltage, and the substrate is biased at an internal voltage reference....
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7276420 |
Method of manufacturing a passive integrated matching network for power amplifiers
An impedance matching network is integrated on a first die and coupled to a second die, with the first and second dies mounted on a conductive back plate. The impedance matching network comprises a...
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7250348 |
Apparatus and method for packaging semiconductor devices using a patterned photo sensitive film to reduce stress buffering
A method and apparatus for packaging semiconductor devices using patterned laminate films to reduce stress buffering. The method includes fabricating a semiconductor die having thin film resistors...
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