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9041122 Semiconductor devices having metal silicide layers and methods of manufacturing such semiconductor devices  
Provided are a semiconductor device and a method of manufacturing the semiconductor device. In order to improve reliability by solving a problem of conductivity that may occur when an air spacer...
9040957 Field effect transistor using graphene  
According to example embodiments, a field effect transistor includes a graphene channel layer on a substrate. The graphene channel layer defines a slit. A source electrode and a drain electrode...
9040371 Integration of dense and variable pitch fin structures  
Semiconductor devices and method for forming the same. Methods for forming fin structures include forming a protective layer over a set of mandrels in a variable fin pitch region; forming first...
9040958 Transistors and methods of manufacturing the same  
Transistors, and methods of manufacturing the transistors, include graphene and a material converted from graphene. The transistor may include a channel layer including graphene and a gate...
9040364 Carbon nanotube devices with unzipped low-resistance contacts  
A method of creating a semiconductor device is disclosed. An end of a carbon nanotube is unzipped to provide a substantially flat surface. A contact of the semiconductor device is formed. The...
9040367 Latch-up immunity nLDMOS  
An improved nLDMOS ESD protection device having an increased holding voltage is disclosed. Embodiments include: providing in a substrate a DVNW region; providing a HVPW region in the DVNW region;...
9034712 Stress enhanced LDMOS transistor to minimize on-resistance and maintain high breakdown voltage  
A lateral diffused metal-oxide-semiconductor field effect transistor (LDMOS transistor) employs a stress layer that enhances carrier mobility (i.e., on-current) while also maintaining a high...
9034741 Halo region formation by epitaxial growth  
A semiconductor device and method for manufacturing the same, wherein the method includes fabrication of field effect transistors (FET). The method includes growing a doped epitaxial halo region...
9034703 Self aligned contact with improved robustness  
A method of forming a semiconductor device including providing a functional gate structure on a channel portion of a semiconductor substrate. A gate sidewall spacer is adjacent to the functional...
9034702 Method for fabricating silicon nanowire field effect transistor based on wet etching  
Disclosed herein is a method for fabricating a silicon nanowire field effect transistor based on a wet etching. The method includes defining an active region; depositing a silicon oxide film as a...
9035365 Raised source/drain and gate portion with dielectric spacer or air gap spacer  
A semiconductor structure and method of manufacturing the same are provided. The semiconductor device includes epitaxial raised source/drain (RSD) regions formed on the surface of a semiconductor...
9029235 Trench isolation MOS P-N junction diode device and method for manufacturing the same  
A trench isolation metal-oxide-semiconductor (MOS) P-N junction diode device and a manufacturing method thereof are provided. The trench isolation MOS P-N junction diode device is a combination of...
9029930 FinFET device with epitaxial structure  
A FinFET device includes a substrate, a fin, and isolation regions on either side of the fin. The device also includes sidewall spacers above the isolation regions and formed along the fin...
9029836 Controlled synthesis of monolithically-integrated graphene structure  
In a method for fabricating a graphene structure, there is formed on a fabrication substrate a pattern of a plurality of distinct graphene catalyst materials. In one graphene synthesis step,...
9029919 Methods of forming silicon/germanium protection layer above source/drain regions of a transistor and a device having such a protection layer  
Disclosed herein are various methods of forming a silicon/germanium protection layer above source/drain regions of a transistor. One method disclosed herein includes forming a plurality of...
9029912 Semiconductor substructure having elevated strain material-sidewall interface and method of making the same  
A semiconductor substructure with improved performance and a method of forming the same is described. In one embodiment, the semiconductor substructure includes a substrate, having an upper...
9029211 Nano field-effect vacuum tube and fabrication method thereof  
A method is provided for fabricating a nano field-effect vacuum tube. The method includes providing a substrate having an insulating layer and a sacrificial layer; and forming a sacrificial line,...
9029170 Magnetic tunnel junction structure  
A magnetic tunnel junction (MTJ) device is formed by a process that includes forming a trench in a substrate and depositing an MTJ structure within the trench. The MTJ structure includes a bottom...
9029227 P-channel flash with enhanced band-to-band tunneling hot electron injection  
A p-channel flash memory is formed with a charge storage stack embedded in a hetero-junction layer in which a raised source/drain is formed. Embodiments include forming a dummy gate stack on a...
9029207 Semiconductor device manufacturing method  
A semiconductor device includes a p-type semiconductor layer, n-type column regions formed of columnar thermal donors exhibiting an n-type property, a p-type column region interposed between the...
9023707 Simultaneously forming a dielectric layer in MOS and ONO device regions  
Methods of ONO integration into MOS flow are provided. In one embodiment, the method comprises: (i) forming a pad dielectric layer above a MOS device region of a substrate; and (ii) forming a...
9024413 Semiconductor device with IGBT cell and desaturation channel structure  
A semiconductor device includes an IGBT cell including a second-type doped drift zone, and a desaturation semiconductor structure for desaturating a charge carrier concentration in the IGBT cell....
9023694 Body contacted hybrid surface semiconductor-on-insulator devices  
A portion of a top semiconductor layer of a semiconductor-on-insulator (SOI) substrate is patterned into a semiconductor fin having substantially vertical sidewalls. A portion of a body region of...
9024381 Semiconductor device and fabricating method thereof  
A semiconductor device and a fabricating method thereof are provided. The semiconductor device includes a substrate, and a super junction area that is disposed above the substrate. The super...
9024365 High voltage junction field effect transistor and manufacturing method thereof  
A high voltage junction field effect transistor and a manufacturing method thereof are provided. The high voltage junction field effect transistor includes a base, a drain, a source and a P type...
9018740 Sensor with field effect transistor having the gate dielectric consisting of a layer of lipids and method of fabricating this transistor  
A field effect transistor (1) including: a semiconducting substrate (2) having two areas doped with electric charge carriers forming a source area (3) and a drain area (4), respectively; a...
9018109 Thin film transistor including silicon nitride layer and manufacturing method thereof  
A thin film transistor in which deterioration at initial operation is not likely to be caused and a manufacturing method thereof. A transistor which includes a gate insulating layer at least whose...
9012882 Graphene nanomesh and method of making the same  
A graphene nanomesh includes a sheet of graphene having a plurality of periodically arranged apertures, wherein the plurality of apertures have a substantially uniform periodicity and...
9012904 Semiconductor device and method for manufacturing the same  
In the transistor including an oxide semiconductor film, a gate insulating film of the transistor including an oxide semiconductor film has a stacked-layer structure of the hydrogen capture film...
9012328 Carbon addition for low resistivity in situ doped silicon epitaxy  
Embodiments of the present invention generally relate to methods of forming epitaxial layers and devices having epitaxial layers. The methods generally include forming a first epitaxial layer...
9012309 Collections of laterally crystallized semiconductor islands for use in thin film transistors  
Collections of laterally crystallized semiconductor islands for use in thin film transistors and systems and methods for making same are described. A display device includes a plurality of thin...
9012289 Semiconductor device and manufacturing method thereof  
A semiconductor device and its manufacturing method are disclosed. The semiconductor device comprises a gate, and source and drain regions on opposite sides of the gate, wherein a portion of a...
9012955 MOS transistor on SOI protected against overvoltages  
A MOS transistor protected against overvoltages formed in an SOI-type semiconductor layer arranged on an insulating layer itself arranged on a semiconductor substrate including a lateral...
9013006 Semiconductor device and manufacturing method of the same  
A method for manufacturing a semiconductor device having a field-effect transistor, including forming a trench in a semiconductor substrate, forming a first insulating film in the trench, forming...
9006066 FinFET with active region shaped structures and channel separation  
A semiconductor structure in fabrication includes a n-FinFET and p-FinFET. Stress inducing materials such as silicon and silicon germanium are epitaxially grown into naturally diamond-shaped...
9006052 Self aligned device with enhanced stress and methods of manufacture  
A method includes forming a stressed Si layer in a trench formed in a stress layer deposited on a substrate. The stressed Si layer forms an active channel region of a device. The method further...
9006055 High voltage FINFET structure  
Methods for forming FIN-shaped field effect transistors (FINFETs) capable of withstanding high voltage applications and the resulting devices are disclosed. Embodiments include forming a source...
9006069 Pulsed laser anneal process for transistors with partial melt of a raised source-drain  
A non-planar transistor including partially melted raised semiconductor source/drains disposed on opposite ends of a semiconductor fin with the gate stack disposed there between. The raised...
9006001 Simple scatterometry structure for Si recess etch control  
Dimensions of structures in integrated circuits are shrinking with each new fabrication technology generation. Maintaining control of profiles of structures in transistors and interconnects is...
8999812 Graphene devices and methods of manufacturing the same  
A graphene device may include a channel layer including graphene, a first electrode and second electrode on a first region and second region of the channel layer, respectively, and a capping layer...
8999793 Multi-gate field-effect transistor process  
A Multi-Gate Field-Effect Transistor includes a fin-shaped structure, a gate structure, at least an epitaxial structure and a gradient cap layer. The fin-shaped structure is located on a...
8999785 Flash-to-ROM conversion  
Flash-to-ROM conversion is performed by converting single transistor flash memory cells to single transistor ROM cells. An S-Flash memory cell is converted to a programmed ROM cell by introducing...
9000539 Metal-gate MOS transistor and method of forming the transistor with reduced gate-to-source and gate-to-drain overlap capacitance  
The gate-to-source and gate-to-drain overlap capacitance of a MOS transistor with a metal gate and a high-k gate dielectric are reduced by forming the high-k gate dielectric along the inside of a...
9000535 Semiconductor device and semiconductor device manufacturing method  
A semiconductor device includes: a semiconductor substrate; a first transistor which is formed on the semiconductor substrate and includes a source/drain region and a gate electrode; an insulating...
8999861 Semiconductor structure with substitutional boron and method for fabrication thereof  
A method for fabricating a semiconductor structure so as to have reduced junction leakage is disclosed. The method includes providing substitutional boron in a semiconductor substrate. The method...
8999782 Process of forming an electronic device including a vertical conductive structure  
An electronic device can include a buried conductive region and a semiconductor layer over the buried conductive region. The electronic device can further include a horizontally-oriented doped...
8994104 Contact resistance reduction employing germanium overlayer pre-contact metalization  
Techniques are disclosed for forming transistor devices having reduced parasitic contact resistance relative to conventional devices. The techniques can be implemented, for example, using a...
8994082 Transistors, methods of manufacturing thereof, and image sensor circuits with reduced RTS noise  
Transistors, methods of manufacturing thereof, and image sensor circuits with reduced random telegraph signal (RTS) noise are disclosed. In one embodiment, a transistor includes a channel disposed...
8993390 Method for fabricating semiconductor device  
A manufacturing method of a semiconductor device comprises the following steps. First, a substrate is provided, at least one fin structure is formed on the substrate, and a metal layer is then...
8994112 Fin field effect transistor (finFET)  
A Fin FET whose fin (12) has an upper portion (30) doped with a first conductivity type and a lower portion (32) doped with a second conductivity type, wherein the junction (34) between the upper...