Patents in Class 438/179

Matches 1 - 50 out of 73

1 2 >

Match	Document	Document Title
1	8138550	Method of manufacturing a semiconductor device and a semiconductor device A method of manufacturing a semiconductor device, has forming a gate insulating film over a surface of a substrate, eliminating a portion of the gate insulating film in a region, forming a gate...
2	8134180	Nitride semiconductor device with a vertical channel and method for producing the nitride semiconductor device A nitride semiconductor device includes: a semiconductor base layer made of a conductive group III nitride semiconductor having a principal plane defined by a nonpolar plane or a semipolar plane;...
3	8093115	Tuning of SOI substrate doping A method of manufacturing a semiconductor device, the method comprising: taking an SOI substrate comprising a bulk substrate, a buried insulating layer and an active layer, and implanting the bulk...
4	8063447	Multiple-gate transistors and processes of making same A microelectronic device includes a P-I-N (p+ region, intrinsic semiconductor, and n+ region) semiconductive body with a first gate and a second gate. The first gate is a gate stack disposed on an...
5	8043906	Method of forming a III-nitride selective current carrying device including a contact in a recess A III-nitride device includes a recessed electrode to produce a nominally off, or an enhancement mode, device. By providing a recessed electrode, a conduction channel formed at the interface of two...
6	8034692	Structure and method for manufacturing asymmetric devices A plurality of gate structures are formed on a substrate. Each of the gate structures includes a first gate electrode and source and drain regions. The first gate electrode is removed from each of...
7	7994612	FinFETs single-sided implant formation A method patterns pairs of semiconducting fins on an insulator layer and then patterns a linear gate conductor structure over and perpendicular to the fins. Next, the method patterns a mask on the...
8	7859063	Semiconductor device using SOI-substrate According to a feature of the present invention, a semiconductor device includes a SOI substrate, including a semiconductor substrate; an insulating layer formed on the semiconductor substrate and...
9	7785945	Method for fabricating PMOS transistor A method for fabricating a PMOS transistor is disclosed herein. In one embodiment, the method can include forming a gate insulation layer and a polysilicon layer over a semiconductor substrate;...
10	7767508	Method for forming offset spacers for semiconductor device arrangements Methods are provided for the fabrication of abrupt and tunable offset spacers for improved transistor short channel control. The methods include the formation of a gate electrode within a...
11	7666745	Method of manufacturing a semiconductor device and a semiconductor device A method of manufacturing a semiconductor device, has forming a gate insulating film over a surface of a substrate, eliminating a portion of the gate insulating film in a region, forming a gate...
12	7560324	Drain extended MOS transistors and methods for making the same Drain extended MOS transistors (52) and fabrication methods (100) therefor are presented, in which a voltage drop region (80) is provided in a well (82) of a second conductivity type between a...
13	7504286	Semiconductor memory devices and methods for fabricating the same A method is provided for fabricating a memory device. A semiconductor substrate is provided which includes a first well region having a first conductivity type, a second well region having the...
14	7456057	Germanium on glass and glass-ceramic structures A semiconductor-on-insulator structure including first and second layers which are attached to one another either directly or through one or more intermediate layers. The first layer includes a...
15	7416917	Method of fabricating electroluminescent display A method for fabrication organic light emitting diode (OLED) displays. A white light OLED element is formed on the first substrate. A micro-cavity layer is formed on a second substrate. A color...
16	7314814	Semiconductor devices and methods of fabricating the same Semiconductor devices and methods of fabricating the same are disclosed. A disclosed method comprises: partially forming a first gate stack; partially forming a second gate stack adjacent the first...
17	7265399	Asymetric layout structures for transistors and methods of fabricating the same High power transistors are provided. The transistors include a source region, a drain region and a gate contact. The gate contact is positioned between the source region and the drain region. First...
18	7183149	Method of manufacturing field effect transistor Provided is a method of manufacturing a field effect transistor (FET). The method includes steps of: forming an ohmic metal layer on a substrate in source and drain regions; sequentially forming an...
19	7107170	Multiport network analyzer calibration employing reciprocity of a device A multiport vector network analyzer calibration employs measurements of an asymmetric reciprocal device to determine a value of a defining parameter of a calibration standard in a set of...
20	7033897	Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technology The present invention pertains to formation of a transistor in a manner that mitigates parasitic capacitance, thereby facilitating, inter alia, enhanced switching speeds. More particularly, a...
21	6838323	Diffusion resistor/capacitor (DRC) non-aligned MOSFET structure A structure and process for making a non-aligned MOSFET structure for ESD protection using resistor wells as the diffusions and adjustable capacitors. The present invention compensates the shallow...
22	6821853	Differential implant oxide process Methods of manufacturing are provided. In one aspect, a method of manufacturing is provided that includes forming first and second gate stacks on a substrate and forming an insulating layer on the...
23	6818488	Process for making a gate for a short channel CMOS transistor structure The invention relates to a process for making a gate for a CMOS transistor structure, made from a stack realized on a face in a semi-conducting material of a substrate, said stack comprising a gate...
24	6624057	Method for making an access transistor Methods are disclosed for the fabrication of novel polysilicon structures having increased surface areas to achieve lower resistances after silicidation. The structures are applicable, for example,...
25	6620688	Method for fabricating an extended drain metal oxide semiconductor field effect transistor with a source field plate An extended drain metal oxide semiconductor field effect transistor (EDMOSFET) with a source field plate is provided. The EDMOSFET includes: a first-conductivity type semiconductor substrate; a...
26	6482724	Integrated circuit asymmetric transistors A method to form asymmetric MOS transistors using a replacement gate design. The method involves forming implanted regions (140) and (145) in the channel region after removal of the replacement...
27	6458639	MOS transistor with stepped gate insulator A field effect transistor (FET) is formed on a silicon substrate, with a nitride gate insulator layer being deposited on the substrate and an oxide gate insulator layer being deposited on the...
28	6351018	Monolithically integrated trench MOSFET and Schottky diode A monolithically integrated Schottky diode together with a high performance trenched gate MOSFET. A MOS enhanced Schottky diode structure is interspersed throughout the trench MOSFET cell array to...
29	6316298	Fabrication method for a flash memory device A method for fabricating a flash memory device is described. A plurality of gates structures are formed on a substrate and each gate structure has a gate oxide layer. A floating gate is formed on...
30	6284579	Drain leakage reduction by indium transient enchanced diffusion (TED) for low power applications A method for forming within a substrate employed within a microelectronics fabrication a field effect transistor with attenuated drain leakage current. There is provided a silicon substrate within...
31	6197644	High density mosfet fabrication method with integrated device scaling In an integrated circuit, a pair of IGFET devices can be formed with reduced dimensions without requiring the use of higher resolution optical masks. A gate electrode is formed with a layer of...
32	5936277	MOS transistor with impurity-implanted region A MOS transistor includes a semiconductor substrate of a first conductivity type having a major surface, a source and drain of a second conductivity type formed on the major surface to define a...
33	5773333	Method for manufacturing self-aligned T-type gate Method for manufacturing a self-aligned T-type gate in which an ohmic electrode and a T-type gate electrode are simultaneously disposed and its excellent reproductivity is obtained and the overall...
34	5631175	Method for fabricating an elevated-gate field effect transistor A field effect transistor (10) has an active layer (16) formed in a substrate (12). A gate (20) is disposed on an elevated platform (18) formed from the active layer (16). The elevated platform...
35	5610090	Method of making a FET having a recessed gate structure A Field Effect Transistor having a recessed gate comprises a substrate, a source electrode and a drain electrode, a recessed channel region formed over an area of the semiconductor substrate...
36	5580803	Production method for ion-implanted MESFET having self-aligned lightly doped drain structure and T-type gate A production method for ion-implanted MESFET having self-aligned LDD structure and T-type gate, that the reverse mesa portion is formed at a predetermined part of the channel region which the...
37	5578512	Power MESFET structure and fabrication process with high breakdown voltage and enhanced source to drain current The present invention comprises a metal semiconductor field effect transistor (MESFET) 100. The MESFET 100 comprises a semiconductor substrate 110 composed of gallium arsenide (GaAs) which has a...
38	5552330	Resonant tunneling fet and methods of fabrication A resonant tunneling FET including a heterostructure FET with a channel layer having a first current contact and a control contact operatively coupled thereto and a resonant tunneling device,...
39	5538910	Method of making a narrow gate electrode for a field effect transistor A method of producing a field effect transistor that includes forming a step in a compound semiconductor substrate, forming a first insulating side wall at the step, forming an etch blocking layer...
40	5536666	Method for fabricating a planar ion-implanted GaAs MESFET with improved open-channel burnout characteristics An improved substantially planar and easy to manufacture field-effect-transistor (FET) includes a guard region between an n+ drain region and the remainder of the device, which enables the...
41	5512499	Method of making symmetrical and asymmetrical MESFETS A method of fabricating a MESFET is comprised of providing a semiconductor material having a channel region formed therein, forming a gate on the semiconductor material over the channel region,...
42	5510280	Method of making an asymmetrical MESFET having a single sidewall spacer A field effect transistor having an asymmetric gate includes high dopant concentration source and drain regions. The drain region is shallower and of lower dopant concentration than the source...
43	5500381	Fabrication method of field-effect transistor A fabrication method of a FET that enables to realize a shorter length between a source-side edge of a recess and an opposing edge of a gate electrode at a higher accuracy than the accuracy limit...
44	5482875	Method for forming a linear heterojunction field effect transistor A low power heterojunction field effect transistor (10, 30, 50, 60) capable of operating at low drain currents while having a low intermodulation distortion. A channel restriction region (9, 38,...
45	5449628	Method of making semiconductor device having a short gate length A semiconductor device having a channel region having a first and a second portion. The first and second portions of the channel region are designed so that only a small portion is substantially...
46	5384273	Method of making a semiconductor device having a short gate length A semiconductor device having a short gate length is fabricated. The short gate length is obtained by utilizing the fact that an unannealed silicon nitride can be isotropically etched while not...
47	5360755	Method of manufacturing a dual field effect transistor A method of manufacturing a field effect transistor comprises sequentially epitaxially growing on a semi-insulating compound semiconductor substrate an active layer of the first compound...
48	5344788	Method of making field effect transistor A field effect transistor having an asymmetric gate includes high dopant concentration source and drain regions. The drain region is shallower and of lower dopant concentration than the source...
49	5336627	Method for the manufacture of a transistor having differentiated access regions The disclosure relates to the making of the source and drain access regions of a field-effect transistor, these two regions being differentiated. The control region is defined by means of a...
50	5266506	Method of making substantially linear field-effect transistor An FET with multiple channels to provide a substantially linear transfer characteristic. The widths and carrier concentrations of the channels, and the depths of the channels below the gate of the...

Matches 1 - 50 out of 73

1 2 >