Matches 1 - 27 out of 27
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7541231 Integration of SiGe NPN and vertical PNP devices on a substrate  
According to one exemplary embodiment, a method for forming an NPN and a vertical PNP device on a substrate comprises forming an insulating layer over an NPN region and a PNP region of the...
7402494 Method for fabricating high voltage semiconductor device  
A method for fabricating a high voltage semiconductor device, which comprises a semiconductor substrate; a gate insulation layer formed on the semiconductor substrate; and a gate electrode formed...
7226844 Method of manufacturing a bipolar transistor with a single-crystal base contact  
A method forms a bipolar transistor in a semiconductor substrate of a first conductivity type. The method includes: forming on the substrate a single-crystal silicon-germanium layer; forming a...
7157320 Semiconductor device and process of production of same  
A semiconductor device comprising: a first insulating film formed on a semiconductor substrate; a semiconductor layer at least a part of which is formed on the first insulating film; a second...
7132320 Method for manufacturing semiconductor device  
The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction...
7098093 HEMT device and method of making  
A HEMT type device which has pillars with vertical walls perpendicular to a substrate. The pillars are of an insulating semiconductor material such as GaN. Disposed on the side surfaces of the...
6989301 Method for manufacturing semiconductor device  
The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction...
6852580 Method of fabricating semiconductor device  
The invention provides a bias circuit for suppressing change with temperature of an idle current of a power transistor and a semiconductor device including the bias circuit. The bias circuit...
6746928 Method for opening a semiconductor region for fabricating an HBT  
According to one disclosed embodiment, a transistor gate is fabricated on a substrate. For example, the gate can be a polycrystalline silicon gate in a FET. Thereafter, a conformal layer is...
6703284 Methods for fabricating a compound semiconductor protection device for low voltage and high speed data lines  
The invention relates to the protection of devices in a monolithic chip fabricated from an epitaxial wafer, such as a wafer for a Group III-V compound semiconductor or a wafer for a Group IV...
6649458 Method for manufacturing semiconductor device with hetero junction bipolar transistor  
The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction...
6573172 Methods for improving carrier mobility of PMOS and NMOS devices  
Methods are described for fabricating semiconductor devices, in which a tensile film is formed over PMOS transistors to cause a compressive stress therein and a compressive film is formed over NMOS...
6537887 Integrated circuit fabrication  
An integrated circuit and a process for making the same are provided. The circuit has a nitrogen implanted emitter window, wherein the nitrogen has been implanted into the emitter window after the...
6524899 Process for forming a large area, high gate current HEMT diode  
A method of manufacturing a HEMT IC using a citric acid etchant. In order that gates of different sizes may be formed with a single etching step, a citric acid etchant is used which includes...
6465804 High power bipolar transistor with emitter current density limiter  
A heterojunction bipolar transistor (HBT) having an emitter structure capable of reducing the current crowding effect and preventing thermal instabilities is disclosed, wherein a negative...
6391696 Field effect transistor and method of manufacturing thereof  
There is disclosed a field effect transistor having a two-stage recess structure formed upon an InP substrate and showing stable device characteristics and a low contact resistance. The FET is...
6372594 Fabrication method of submicron gate using anisotropic etching  
Disclosed is a method for fabricating a self-aligned submicron gate electrode using an anisotropic etching process. The method involves the steps of laminating a dummy emitter defining a dummy...
6063655 Junction high electron mobility transistor-heterojunction bipolar transistor (JHEMT-HBT) monolithic microwave integrated circuit (MMIC) and single growth method of fabrication  
A highly uniform, planar and high speed JHEMT-HBT MMIC is fabricated using a single growth process. A multi-layer structure including a composite emitter-channel layer, a base-gate layer and a...
5920773 Method for making integrated heterojunction bipolar/high electron mobility transistor  
An integrated circuit technology combines heterojunction bipolar transistors (HBTs), high electron mobility transistors (HEMTs) and other components along with interconnect metallization on a...
5391504 Method for producing integrated quasi-complementary bipolar transistors and field effect transistors  
Generally, and in one form of the invention, an integrated circuit comprising a bipolar transistor and a field effect transistor, wherein a channel of the field effect transistor and a base of the...
5324671 Method of fabrication an integrated circuit including bipolar and field effect devices  
An integrated circuit including both bipolar and field effect devices is disclosed, comprising a first continuous layer 102/104 of semi-insulating semiconductor material having a continuous first...
5294566 Method of producing a semiconductor integrated circuit device composed of a negative differential resistance element and a FET transistor  
A semiconductor integrated circuit device comprising a negative differential resistance element, such as an RHET and RBT, and a field effect transistor, such as an SBFET and heterojunction type...
5179037 Integration of lateral and vertical quantum well transistors in the same epitaxial stack  
An epitaxial stack (10) is provided that allows integration of both vertical and horizontal quantum effect devices. Epitaxial stack (10) allows fabrication of both quantum well resonant tunneling...
5051372 Method of manufacturing a semiconductor optoelectric integrated circuit device, having a pin, hemt, and hbt, by selective regrowth  
There is disclosed a method of manufacturing an integrated circuit, comprising: the first step of growing a first epitaxial crystal on a compound semiconductor substrate, removing an unnecessary...
5021361 Method for making a field effect transistor integrated with an opto-electronic device  
In a monolithic OEIC in which an FET and a light-emitting device are integrated, the light-emitting device has a first clad layer, an active layer, and a second clad layer stacked on a substrate,...
5012318 Hybrid semiconductor device implemented by combination of heterojunction bipolar transistor and field effect transistor  
A hybrid semiconductor device according to the present invention is implemented by an unipolar compound semiconductor transistor and a heterojunction bipolar transistor respectively formed in first...
4737469 Controlled mode field effect transistors and method therefore  
A standard JFET or MESFET with a second gate is described. The second gate underlies the channel region, but is accessible from the same surface of the semiconductor body as are the other terminals...
Matches 1 - 27 out of 27