Matches 1 - 30 out of 30


Match Document Document Title
8148218 Semiconductor device with group III-V channel and group IV source-drain and method for manufacturing the same  
The present invention is related to a semiconductor device with group III-V channel and group IV source-drain and a method for manufacturing the same. Particularly, the energy level density and...
8134180 Nitride semiconductor device with a vertical channel and method for producing the nitride semiconductor device  
A nitride semiconductor device includes: a semiconductor base layer made of a conductive group III nitride semiconductor having a principal plane defined by a nonpolar plane or a semipolar plane;...
7977169 Semiconductor device including active layer made of zinc oxide with controlled orientations and manufacturing method thereof  
A semiconductor device includes an oxide semiconductor thin film layer primarily including zinc oxide having at least one orientation other than (002) orientation. The zinc oxide may have a mixed...
7898012 Capacitor and semiconductor device having a ferroelectric material  
A capacitor includes a pair of electrodes and a ferroelectric film sandwiched between the electrodes. The electrodes are provided perpendicular to the direction of the polarization axis of the...
7863117 Multilayer silicon over insulator device  
An apparatus and method for a multilayer silicon over insulator (SOI) device is provided. In the multilayer SOI device, the crystal orientation of at least one active region of a device is...
7821044 Transistor with improved tip profile and method of manufacture thereof  
Embodiments are an improved transistor structure and the method of fabricating the structure. In particular, a wet etch of an embodiment forms source and drain regions with an improved tip shape to...
7820523 Fabrication of active areas of different natures directly onto an insulator: application to the single or double gate MOS transistor  
The invention concerns a micro-electronic device comprising a substrate, a first insulating zone and a second insulating zone laying on said substrate, a first active zone comprising at least one...
7763505 Method for reducing crystal defects in transistors with re-grown shallow junctions by appropriately selecting crystalline orientations  
By appropriately adapting the length direction and width directions of transistor devices with respect to the crystallographic orientation of the semiconductor material such that identical vertical...
7755172 Opto-electronic and electronic devices using N-face or M-plane GaN substrate prepared with ammonothermal growth  
A method for growing III-V nitride films having an N-face or M-plane using an ammonothermal growth technique. The method comprises using an autoclave, heating the autoclave, and introducing ammonia...
7737532 Hybrid Schottky source-drain CMOS for high mobility and low barrier  
A CMOS device is provided. A semiconductor device comprises a substrate, the substrate having a first region and a second region, the first region having a first crystal orientation represented by...
7674667 CMOS structure including topographic active region  
A CMOS structure includes a first device located using a first active region within a semiconductor substrate, where the first active region is planar and has a first crystallographic orientation....
7585709 Display panels and fabrication methods thereof  
A display panel including a pixel array region. The pixel array region includes a plurality of pixel cells disposed in a matrix configuration. Each pixel cell has an active device. A relative...
7524685 Manufacturing method of a display device  
The present invention provides a manufacturing method of a display device which can decrease the lowering of a yield rate of the display device attributed to the aggregations generated by pseudo...
7498208 Chevron CMOS trigate structure  
Disclosed herein is a structure with two different type tri-gate MOSFETs formed on the same substrate. Each MOSFET comprises a fin with optimal mobility for the particular type of MOSFET. Due to...
7442589 System and method for uniform multi-plane silicon oxide layer formation for optical applications  
Methods and systems for growing uniform oxide layers include an example method including growing a first layer of oxide on first and second facets of the substrate, with the first facet having a...
7235433 Silicon-on-insulator semiconductor device with silicon layers having different crystal orientations and method of forming the silicon-on-insulator semiconductor device  
A semiconductor device comprising a substrate having a first crystal orientation and an insulating layer overlying the substrate is provided. A plurality of silicon layers are formed overlying the...
6987036 Method for forming crystalline semiconductor film and apparatus for forming the same  
The invention is directed to a countermeasure against a local amorphous region observed as an eddy pattern on a thermally crystallized crystalline silicon film. The local amorphous region is...
6949420 Silicon-on-insulator (SOI) substrate having dual surface crystallographic orientations and method of forming same  
A method is provided of forming a silicon-on-insulator (SOI) substrate having at least two exposed surface crystal orientations. The method begins by providing an SOI substrate having a first...
6867117 Organic device including semiconducting layer aligned according to microgrooves of photoresist layer  
An organic device including a substrate or a dielectric layer; a photoresist layer formed on the substrate or dielectric layer, wherein the photoresist layer is provided with a plurality of...
6767804 2N mask design and method of sequential lateral solidification  
A pan/tilt camera system includes a sensor spaced from a rotational shaft of a pan/tilt camera, a detected piece rotated with the rotational shaft so as to correspond to the sensor, an origin...
6737303 Process for forming organic semiconducting layer having molecular alignment  
A process for forming an organic semiconducting layer having molecular alignment. First, a photoalignment organic layer is formed on a substrate or A dielectric layer. Next, the photoalignment...
6458637 Thin film semiconductor and method for manufacturing the same, semiconductor device and method for manufacturing the same  
The present invention is related to a thin film semiconductor which can be regarded as substantially a single crystal and a semiconductor device comprising an active layer formed by the thin film...
6307221 InxGa1-xP etch stop layer for double recess pseudomorphic high electron mobility transistor structures  
The invention is a Pseudomorphic transistor structure having a semiconductor layer having a 2DEG layer therein, a Schottky layer, a transition layer and an ohmic contact layer on the transition...
5770492 Self-aligned twin well process  
A method is provided for forming planar, self-aligned spaced-apart wells without a high temperature oxidation step to form an ion barrier. The method comprises preparing a substrate with a silicon...
5770490 Method for producing dual work function CMOS device  
A dual work function CMOS device and method for producing the same is disclosed. The method includes: depositing a first layer of a doped material, either n-type or p-type, over a substrate to be...
5728611 Method of fabricating semiconductor device  
A method of producing a semiconductor device includes preparing a semiconductor ingot having a (100) surface orientation and an orientation flat in a 011! direction; cutting the semiconductor ingot...
5336626 Method of manufacturing a MESFET with an epitaxial void  
The present invention relates to a MESFET in which source and drain regions with inverse slopes are formed on a semi-insulating semiconductor substarate having the insulating layer by using the...
5100831 Method for fabricating semiconductor device  
A semiconductor device comprising a plurality of elemental active devices being operable with different threshold voltages is disclosed. Each of the elemental active devices, e.g. D made and E made...
4662058 Self-aligned gate process for ICS based on modulation doped (Al,Ga) As/GaAs FETs  
A self-aligned gate process for integrated circuits based on modulation doped (Al, Ga)As/GaAs field effect transistors and in which the regions on each side of the metal silicide gate are heavily...
4558509 Method for fabricating a gallium arsenide semiconductor device  
A method for forming a FET in a gallium arsenide substrate whereby a gate is positioned on a [100] surface of the gallium arsenide substrate in the [011] orientation, active impurities are ion...
Matches 1 - 30 out of 30