|
Match
|
Document |
Document Title |
|
|
7622338 |
Method for manufacturing semiconductor device
The present invention provides a method for forming a semiconductor region having a desired shape, and also provides a method for manufacturing a semiconductor device with few variations. Moreover,...
|
|
|
7605039 |
Multiple-gate MOS transistor using Si substrate and method of manufacturing the same
Provided are a multiple-gate MOS (metal oxide semiconductor) transistor and a method of manufacturing the same. The transistor includes a single crystalline active region having a channel region...
|
|
|
7510927 |
LOCOS isolation for fully-depleted SOI devices
The present invention discloses a method including: providing a substrate; forming a buried oxide layer over the substrate; forming a thin silicon body layer over the buried oxide layer, the thin...
|
|
|
7510919 |
Anchoring, by lateral oxidizing, of patterns of a thin film to prevent the dewetting phenomenon
The invention relates to a thin film having a thickness of less than 10 nm, made of oxidizable semi-conductor material and patterned in the form of patterns. To prevent the dewetting phenomenon of...
|
|
|
7504291 |
MOS transistor on an SOI substrate with a body contact and a gate insulating film with variable thickness
It is an object to provide an SOI device capable of carrying out body fixation and implementing a quick and stable operation. A gate insulating film ( 11 ) having a thickness of 1 to 5 nm is...
|
|
|
7425480 |
Semiconductor device and method of manufacture thereof
A method of manufacturing a MOS transistor incorporating a silicon oxide film serving as a gate insulating film and containing nitrogen and a polycrystalline silicon film serving as a gate...
|
|
|
7381631 |
Use of expanding material oxides for nano-fabrication
This invention relates to a method of fabricating nano-dimensional structures, comprising: depositing at least one deformable material upon a substrate such that the material includes at least one...
|
|
|
7344930 |
Semiconductor device and manufacturing method thereof
To obtain a semiconductor device containing TFTs of different, suitable properties as display pixel TFTs and high-voltage, driver-circuit TFTs, the semiconductor device of the present invention...
|
|
|
7303946 |
Method of manufacturing a semiconductor device using an oxidation process
A method of manufacturing a MOS transistor incorporating a silicon oxide film serving as a gate insulating film and containing nitrogen and a polycrystalline silicon film serving as a gate...
|
|
|
7288447 |
Semiconductor device having trench isolation for differential stress and method therefor
A semiconductor device has trenches for defining active regions. After a thin diffusion barrier is deposited in the trenches, some of the trenches are selectively etched to leave different areas in...
|
|
|
7196383 |
Thin film oxide interface
An oxide interface and a method for fabricating an oxide interface are provided. The method comprises forming a silicon layer and an oxide layer overlying the silicon layer. The oxide layer is...
|
|
|
7183143 |
Method for forming nitrided tunnel oxide layer
A method for forming a nitrided tunnel oxide layer is described. A silicon oxide layer as a tunnel oxide layer is formed on a semiconductor substrate, and a plasma nitridation process is performed...
|
|
|
7141459 |
Silicon-on-insulator ULSI devices with multiple silicon film thicknesses
A method of forming a multiple-thickness semiconductor-on-insulator, comprising the following steps. A wafer is provided comprising a semiconductor film (having at least two regions) overlying a...
|
|
|
7064018 |
Methods for fabricating three dimensional integrated circuits
A method of forming a semiconductor device includes fabricating digital circuits comprising a programmable logic circuit on a substrate; selectively fabricating either a memory circuit or a...
|
|
|
7061029 |
High-voltage device structure
A high-voltage device structure disposed in a substrate of a first conductivity type includes a first well and a second well each of a second conductivity type, a source diffusion region and a...
|
|
|
7023015 |
Thin-film semiconductor device and liquid crystal display
A thin-film semiconductor device is provided including a plurality of thin-film transistors (TFT) having different driving voltages formed on an glass substrate, wherein a gate insulator electric...
|
|
|
6902960 |
Oxide interface and a method for fabricating oxide thin films
An oxide interface and a method for fabricating an oxide interface are provided. The method comprises forming a silicon layer and an oxide layer overlying the silicon layer. The oxide layer is...
|
|
|
6867074 |
Method of fabricating a polysilicon layer
A method of fabrication a polysilicon layer is provided. A substrate is provided and then a buffer layer having a plurality of trenches thereon is formed over the substrate. Thereafter, an...
|
|
|
6812077 |
Method for patterning narrow gate lines
Patterning of a gate line is terminated prior to etching completely through the conductive layer from which it is patterned. Surfaces of the conductive layer are then reacted in a reactive...
|
|
|
6709908 |
Methods for making semiconductor devices
Certain embodiments relate to methods for making a semiconductor device that inhibit the formation of a parasitic device. A method for making a semiconductor device includes a delimiting step and a...
|
|
|
6667197 |
Method for differential oxidation rate reduction for n-type and p-type materials
A method of forming a substantially uniform oxide film over surfaces with different level of doping and/or different dopant type is disclosed. In one aspect, a method for forming a uniform oxide...
|
|
|
6664146 |
Integration of fully depleted and partially depleted field effect transistors formed in SOI technology
For fabricating field effect transistors with a semiconductor substrate in SOI (semiconductor on insulator) technology, a first hardmask is formed on a first area of the semiconductor substrate,...
|
|
|
6656778 |
Passivation structure for flash memory and method for fabricating same
A passivation structure for a semiconductor device includes a high ultraviolet transmittance silicon nitride (UV-SiN) layer. This UV-SiN layer substantially conformally overlies a plurality of top...
|
|
|
6551867 |
Non-volatile semiconductor memory device and method for manufacturing the same
A non-volatile semiconductor memory device includes an interlayer dielectric film 9, 19 flattened by etching back an SOG film. In the non-volatile semiconductor memory device, a barrier film of a...
|
|
|
6537927 |
Apparatus and method for heat-treating semiconductor substrate
A method and apparatus for heat-treating a semiconductor substrate to heat different areas of the substrate at different temperatures. The method includes using an apparatus having a chamber of a...
|
|
|
6387741 |
Manufacturing a semiconductor device with isolated circuit-element formation layers of different thicknesses
Silicon layers 2 a , 2 b comprised of different thicknesses are formed concurrently so as to be isolated from each other while a silicon oxide layer 1 serving as a foundation layer is...
|
|
|
6346486 |
Transistor device and method of forming the same
A crystalline silicon thin film transistor having an LDD (lightly doped drain) structure and a process for fabricating the same, which comprises introducing a catalyst element for accelerating...
|
|
|
6335267 |
Semiconductor substrate and method of fabricating semiconductor device
A semiconductor substrate and a method of fabricating a semiconductor device are provided. An oxide film ( 13 ) is formed by oxidizing an edge section and a lower major surface of an SOI substrate...
|
|
|
6306692 |
Coplanar type polysilicon thin film transistor and method of manufacturing the same
The present invention discloses a method of manufacturing a thin film transistor, including: depositing an amorphous silicon layer, an insulating layer, and a gate metal layer on a substrate...
|
|
|
6271065 |
Method directed to the manufacture of an SOI device
On an insulating film a mesa-isolation silicon layer is formed, in which a channel region and source/drain regions ar included. A gate insulating film and a conducting layer as a part of a gate...
|
|
|
6265251 |
Method to fabricate a thick oxide MOS transistor for electrostatic discharge protection in an STI process
A new method of forming a thick oxide MOS transistor for electrostatic discharge protection in a standard sub-micron STI CMOS process for an integrated circuit device has been achieved. A first...
|
|
|
6124153 |
Method for manufacturing a polysilicon TFT with a variable thickness gate oxide
A method for manufacturing a polysilicon thin film transistor (TFT) according to the present invention reduces the electric field near the drain junction by varying partially the thickness of a...
|
|
|
6096583 |
Semiconductor device and manufacturing method thereof
In forming an element isolating region in a silicon semiconductor layer of an SOI substrate, a silicon nitride film of a predetermined thickness is deposited over an oxide film formed on a SOI...
|
|
|
6096582 |
Method of making a semiconductor device
A method of making a semiconductor device is disclosed in which the device has an insulated gate transistor in which source and drain regions are provided in a single crystal semiconductor layer...
|
|
|
6060344 |
Method for producing a semiconductor substrate
In a method for producing a semiconductor substrate completed through a bonding process for joining a semiconductor wafer to a support substrate by performing heat treatment thereto in a state in...
|
|
|
6034001 |
Method for etching of silicon carbide semiconductor using selective etching of different conductivity types
A method for selective conductivity etching of a silicon carbide (SiC) semiconductor includes forming a p-type SiC layer on a substrate layer, forming an n-type SiC layer on the p-type SiC layer,...
|
|
|
6033940 |
Anodization control for forming offset between semiconductor circuit elements
A circuit substrate includes a plurality of semiconductor devices including electrodes, a wiring having a plurality of branched portions and mainly formed of a metal material, a terminal for...
|
|
|
5985733 |
Semiconductor device having a T-shaped field oxide layer and a method for fabricating the same
A semiconductor device having an adjacent P-well and N-well, such as a complementary metal oxide semiconductor (CMOS) transistor, on a silicon on insulator (SOI) substrate has a latch-up problem...
|
|
|
5915172 |
Method for manufacturing LCD and TFT
Method for manufacturing TFTs including steps of forming a control electrode and control electrode line on a substrate, forming insulating film on the control electrode and the control electrode...
|
|
|
5913112 |
Method of manufacturing an insulated gate field effect semiconductor device having an offset region and/or lightly doped region
An LDD structure is manufactured to have a desired aspect ratio of the height to the width of a gate electrode. The gate electrode is first deposited on a semiconductor substrate followed by ion...
|
|
|
5904514 |
Method for producing electrodes of semiconductor device
A first pair electrodes consisting of an anode to which a plurality of wiring lines to be anodized are connected and a cathode that is opposed to the anode, and a second pair electrodes for...
|
|
|
5807771 |
Radiation-hard, low power, sub-micron CMOS on a SOI substrate
A radiation-hard, low-power semiconductor device of the complementary metal-oxide semiconductor (CMOS) type which is fabricated with a sub-micron feature size on a silicon-on-insulator (SOI)...
|
|
|
5792678 |
Method for fabricating a semiconductor on insulator device
A semiconductor on insulator structure (50) includes a silicon layer (30) formed on an insulating substrate (20). The silicon layer (30) is partitioned into two sections (32, 34) which are...
|
|
|
5780347 |
Method of forming polysilicon local interconnects
A method and apparatus of forming local interconnects in a MOS process deposits a layer of polysilicon over an entire region after several conventional MOS processing steps. The region is then...
|
|
|
5770492 |
Self-aligned twin well process
A method is provided for forming planar, self-aligned spaced-apart wells without a high temperature oxidation step to form an ion barrier. The method comprises preparing a substrate with a silicon...
|
|
|
5712173 |
Method of making semiconductor device with self-aligned insulator
A semiconductor device having the advantages of an SOI structure without the attendant disadvantages is obtained by implanting oxygen ions using the gate electrode as a mask, and heating to form...
|
|
|
5683918 |
Method of making semiconductor-on-insulator device with closed-gate electrode
A body-tied MOSFET (14) is used in a protection circuit (10) of an SOI device (20) where the MOSFET's drain regions (38) lie outside MOSFET's closed-gate electrode (34). Electrical characteristics...
|
|
|
5670389 |
Semiconductor-on-insulator device having a laterally-graded channel region and method of making
A silicon-on-insulator semiconductor device (40) having laterally-graded channel regions (23A, 24A) and a method of making the silicon-on-insulator semiconductor device (40). The...
|
|
|
5670388 |
Method of making contacted body silicon-on-insulator field effect transistor
Structures and methods are presented for forming a body-substrate connector for an SOI FET. The connector is formed substantially co-aligned with the gate conductor on a side of the device that...
|
|
|
5665613 |
Method of making semiconductor device having SIMOX structure
A SIMOX substrate 1 is processed through high temperature oxidation treatment after forming a mask-pattern 3 to shield specified electrodes from oxidation in order to increase partly a thickness of...
|