Matches 51 - 100 out of 345 < 1 2 3 4 5 6 7 >
Match Document Document Title
7399662 Method of manufacturing a thin film transistor device  
A method of making a thin film transistor device, including forming and patterning a semiconductor film to form first and second semiconductor films in, respectively, low-voltage driven and...
7396714 Method of making strained semiconductor transistors having lattice-mismatched semiconductor regions underlying source and drain regions  
A process is provided for making a PFET and an NFET. Areas in a first semiconductor region adjacent to a gate stack are recessed. A lattice-mismatched semiconductor layer is grown in the recesses...
7374975 Method of fabricating a transistor  
A method of forming a transistor reduces leakage current and hot carrier effects, and therefore improves current performance. The method of forming a transistor includes selectively etching the...
7374981 Thin film transistor, electronic device having the same, and method for manufacturing the same  
An object of the present invention is to provide a method for manufacturing a thin film transistor which enables heat treatment aimed at improving characteristics of a gate insulating film such as...
7374980 Field effect transistor with thin gate electrode and method of fabricating same  
A field effect transistor and a method of fabricating the field effect transistor. The field effect transistor includes: a silicon body, a perimeter of the silicon body abutting a dielectric...
7354806 Semiconductor device structure with active regions having different surface directions and methods  
Semiconductor structure and method to simultaneously achieve optimal stress type and current flow for both nFET and pFET devices, and for gates orientated in one direction, are disclosed. One...
7351619 Process of fabricating a semiconductor device  
A semiconductor device having high operating performance and reliability is disclosed, and its fabrication process is also disclosed. In an n-channel type TFT 302 , an Lov region 207 is...
7348224 Method for manufacturing thin film transistor, electro-optical device and electronic apparatus  
A method for manufacturing a thin film transistor results in a thin film transistor including a semiconductor film, a channel region provided in the semiconductor film, source and drain regions...
7344929 Method for manufacturing an integrated circuit using a capping layer having a degree of reflectivity  
The present invention provides a method for manufacturing a semiconductor device and a method for manufacturing an integrated circuit. The method for manufacturing the semiconductor device, among...
7344908 Atomic force microscope cantilever including field effect transistor and method for manufacturing the same  
The present invention relates to an AFM (atomic force microscope) cantilever including a field effect transistor (FET) and a method for manufacturing the same; and, more particularly, to a method...
7344930 Semiconductor device and manufacturing method thereof  
To obtain a semiconductor device containing TFTs of different, suitable properties as display pixel TFTs and high-voltage, driver-circuit TFTs, the semiconductor device of the present invention...
7341905 Method of making high-voltage bipolar/CMOS/DMOS (BCD) devices  
A process for making an integrated circuit is described wherein sequence of mask steps is applied to a substrate or epitaxial layer of p-type material. The sequence consists of sixteen specific...
7332384 Technique for forming a substrate having crystalline semiconductor regions of different characteristics  
Different types of crystalline semiconductor regions are provided on a single substrate by forming a dielectric region within a first crystalline semiconductor region. Thereafter, a second...
7332433 Methods of modulating the work functions of film layers  
Methods for fabricating two metal gate stacks with varying work functions for complementary metal oxide semiconductor (CMOS) devices are provided A first metal layer may be deposited onto a gate...
7332385 Method of manufacturing a semiconductor device that includes gettering regions  
A catalytic element is added to an amorphous semiconductor film and heat treatment is conducted therefor to produce a crystalline semiconductor film with good quality, a TFT (semiconductor device)...
7320907 Method for controlling lattice defects at junction and method for forming LDD or S/D regions of CMOS device  
A method for controlling lattice defects at a junction is described, which is used in accompany with an ion implantation step for forming a junction in a substrate and a subsequent annealing step....
7317227 Method for forming pattern of stacked film  
A semiconductor film serving as an active region of a thin film transistor and an upper oxide film protecting the semiconductor film are dry etched to form the active region. In this case, a...
7314789 Structure and method to generate local mechanical gate stress for MOSFET channel mobility modification  
A semiconductor structure and method that is capable of generating a local mechanical gate stress for channel mobility modification are provided. The semiconductor structure includes at least one...
7309625 Method for fabricating metal oxide semiconductor with lightly doped drain  
A method for fabricating metal oxide semiconductor with lightly doped drain. In the method, the gate electrode, the LDD of the n-type MOS TFT, and the source/drain electrode of the p-type MOS TFT...
7306981 Semiconductor manufacturing method  
It is an object of the invention that, in semiconductor device, in order to promote the tendency of miniaturization of each display pixel pitch, which will be resulted in with the tendency toward...
7297583 Method of making strained channel CMOS transistors having lattice-mismatched epitaxial  
A method is provided in which an n-type field effect transistor (NFET) and a p-type field effect transistor (PFET) each have a channel region disposed in a first single-crystal semiconductor region...
7285809 Thin film transistor having high mobility and high on-current  
An image input apparatus includes an insulating substrate; polycrystalline silicon islands formed on said insulating substrate; pixels each including thin film transistors and a photodiode formed...
7285840 Apparatus for confining inductively coupled surface currents  
A deep n-well is formed beneath the area of an inductor coil. The use of a deep n-well lessens the parasitic capacitance by placing a diode in series with the interlayer dielectric cap. The deep...
7279351 Method of passivating semiconductor device  
In a method of passivating a semiconductor device with two types of transistors, e.g., NMOS and PMOS transistor, the semiconductor device is placed in a pressurized sealed chamber and at least two...
7276404 Methods of forming SRAM cells having landing pad in contact with upper and lower cell gate patterns  
SRAM cells having landing pads in contact with upper and lower cell gate patterns, and methods of forming the same are provided. The SRAM cells and the methods remove the influence resulting from...
7264743 Fin structure formation  
A method for forming fin structures is provided. Sacrificial structures are provided on a substrate. Fin structures are formed on the sides of the sacrificial structures. The forming of the fin...
7265004 Electronic devices including a semiconductor layer and a process for forming the same  
An electronic device can include a first semiconductor portion and a second semiconductor portion, wherein the compositions of the first and second semiconductor portions are different from each...
7253039 Method of manufacturing CMOS transistor by using SOI substrate  
In a method of manufacturing a CMOS transistor, an n-channel MOS transistor is formed on an upper MOS transistor in a first region of an SOI substrate having first and second regions. Next, an...
7253034 Dual SIMOX hybrid orientation technology (HOT) substrates  
This invention provides a separation by implanted oxygen (SIMOX) method for forming planar hybrid orientation semiconductor-on-insulator (SOI) substrates having different crystal orientations,...
7235437 Multi-planar layout vertical thin-film transistor inverter  
A vertical thin-film transistor (V-TFT) inverter circuit and a method for forming a multi-planar layout TFT inverter circuit have been provided. The method comprising: forming a P-channel TFT with...
7235436 Method for doping structures in FinFET devices  
A method for doping fin structures in FinFET devices includes forming a first glass layer on the fin structure of a first area and a second area. The method further includes removing the first...
7220626 Structure and method for manufacturing planar strained Si/SiGe substrate with multiple orientations and different stress levels  
The present invention provides a method of forming a semiconducting substrate including the steps of providing an initial structure having first device region comprising a first orientation...
7217604 Structure and method for thin box SOI device  
A method of forming a semiconductor device, including providing a substrate having a first insulative layer on a surface of the substrate, and a device layer on a surface of the first insulative...
7211475 CMOS thin film transistor  
A CMOS thin film transistor having a semiconductor layer formed in a zigzag form on an insulating substrate, and a PMOS transistor region and an NMOS transistor region and a gate electrode having...
7208354 Deposition of silicon germanium on silicon-on-insulator structures and bulk substrates  
Methods are provided for producing SiGe-on-insulator structures and for forming strain-relaxed SiGe layers on silicon while minimizing defects. Amorphous SiGe layers are deposited by CVD from...
7198992 Method of manufacturing a semiconductor device comprising doping steps using gate electrodes and resists as masks  
The present invention is characterized in that a semiconductor film containing a rare gas element is formed on a crystalline semiconductor film obtained by using a catalytic element via a barrier...
7192821 Manufacturing process of semi-conductor device  
Exemplary embodiments discourage or prevent impurities from mixing in a film of a semiconductor layer in a manufacturing process of a semiconductor device. A manufacturing process of a...
7187038 Semiconductor device with MOS transistors with an etch-stop layer having an improved residual stress level and method for fabricating such a semiconductor device  
A semiconductor device includes a substrate, MOS transistors in the substrate, and a dielectric layer on the MOS transistors. Contact holes are formed through the dielectric layer to provide...
7169677 Method for producing a spacer structure  
A method for fabricating a spacer structure includes: forming a gate insulation layer having a gate deposition-inhibiting layer, a gate layer and a covering deposition-inhibiting layer on a...
7163850 Bottom gate-type thin-film transistor and method for manufacturing the same  
In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper ( 55 ) is removed. The ion stopper ( 55 ) does not remain in the interlayer insulating film ( 8 )...
7157323 Methods for fabricating thin film transistors  
Fabrication methods for thin film transistors. A metal gate stack structure is formed on an insulating substrate. The substrate is performed using thermal annealing to create an oxide layer on the...
7157337 Method of manufacturing a semiconductor device and semiconductor device obtained by means of such a method  
Consistent with an example embodiment according to the invention, a material for the intermediate layer is chosen which can be selectively etched with respect to the dielectric layer. Before the...
7141459 Silicon-on-insulator ULSI devices with multiple silicon film thicknesses  
A method of forming a multiple-thickness semiconductor-on-insulator, comprising the following steps. A wafer is provided comprising a semiconductor film (having at least two regions) overlying a...
7141460 Method of forming trenches in a substrate by etching and trimming both hard mask and a photosensitive layers  
A process is described for transferring a photoresist pattern into a substrate. In one embodiment a stack comprised of a top photoresist layer, a middle ARC layer, and a bottom hardmask is formed...
7132317 Method of manufacturing a semiconductor device that includes changing the internal stress of a conductive film  
There has been a case where peeling occurs if an internal stress of a wiring of a TFT is strong. In particular, the internal stress of a gate electrode largely influences a stress that a...
7125759 Semiconductor-on-insulator (SOI) strained active areas  
Differentially strained active regions for forming strained channel semiconductor devices and a method of forming the same, the method including providing a semiconductor substrate comprising a...
7125760 Method for implementing electro-static discharge protection in silicon-on-insulator devices  
The present invention is a method and apparatus whereby two NMOS or PMOS devices connected in series in a stacked gate configuration formed on SOI exhibit improved ESD response characteristics. The...
7122410 Polysilicon line having a metal silicide region enabling linewidth scaling including forming a second metal silicide region on the substrate  
By maintaining the gate electrode covered during the process flow for forming metal silicide regions in the drain and source of a field effect transistor, an appropriate metal silicide may be...
7122411 SOI device with reduced drain induced barrier lowering  
A CMOS device formed with a Silicon On Insulator (SOI) technology with reduced Drain Induced Barrier Lowering (DIBL) characteristics and a method for producing the same. The method involves a high...
7118952 Method of making transistor with strained source/drain  
A method of fabricating a transistor comprises the steps of: forming a gate electrode above a substrate made of a first semiconductor material having a first lattice spacing, forming recesses in...
Matches 51 - 100 out of 345 < 1 2 3 4 5 6 7 >