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7629207 |
Bottom gate thin film transistor and method of manufacturing the same
A method of manufacturing a bottom gate thin film transistor (“TFT”) in which a polycrystalline channel region having a large grain size is formed relatively simply and easily. The method of...
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7611931 |
Semiconductor structures with body contacts and fabrication methods thereof
A semiconductor structure for a dynamic random access memory (DRAM) cell array that includes a plurality of vertical memory cells built on a semiconductor-on-insulator (SOI) wafer and a body...
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7585711 |
Semiconductor-on-insulator (SOI) strained active area transistor
A selectively strained MOS device such as selectively strained PMOS device making up an NMOS and PMOS device pair without affecting a strain in the NMOS device the method including providing a...
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7579225 |
Method of forming semiconductor device having stacked transistors
There is provided a method of forming a semiconductor device having stacked transistors. When forming a contact hole for connecting the stacked transistors to each other, ohmic layers on the bottom...
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7572687 |
Semiconductor device and manufacturing method of the same
Disclosed is a semiconductor device. The semiconductor device includes a first gate formed in a trench of a semiconductor substrate, a first gate oxide layer on the semiconductor substrate...
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7572686 |
System for thin film deposition utilizing compensating forces
A process for depositing a thin film material on a substrate is disclosed, comprising simultaneously directing a series of gas flows from the output face of a delivery head of a thin film...
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7560313 |
SOI wafer and method for producing the same
The present invention provides a SOI wafer produced by an ion implantation delamination method wherein a width of a SOI island region in a terrace portion generated in an edge portion of the SOI...
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7553708 |
Fabricating method for a liquid crystal display of horizontal electric field applying type
A liquid crystal display having an applied horizontal electric field comprising: a gate line; a common line substantially parallel to the gate line; a data line arranged to cross the gate line and...
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7550332 |
Non-planar transistor having germanium channel region and method of manufacturing the same
Provided is a non-planar transistor with a multi-gate structure that includes a germanium channel region, and a method of manufacturing the same. The non-planar transistor includes a silicon body...
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7538351 |
Method for forming an SOI structure with improved carrier mobility and ESD protection
A semiconductor device and method for forming the same including improved electrostatic discharge protection for advanced semiconductor devices, the semiconductor device including providing...
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7531394 |
Manufacturing method for a TFT LCD array substrate
The present invention discloses a method for manufacturing a TFT LCD array substrate by utilizing the gray tone mask technology and the photoresist lifting-off technology with only two masks in two...
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7521300 |
Semiconductor device substrate including a single-crystalline layer and method of manufacturing semiconductor device substrate
A method of manufacturing a semiconductor device substrate includes forming a mask layer pattern on a semiconductor layer insulated from a surface of a semiconductor substrate by an electrically...
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7517765 |
Method for forming germanides and devices obtained thereof
The present invention discloses a method for forming germanides on substrates with exposed germanium and exposed dielectric(s) topography, thereby allowing for variations in the germanide forming...
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7488630 |
Method for preparing 2-dimensional semiconductor devices for integration in a third dimension
A method which is intended to facilitate and/or simplify the process of fabricating interlayer vias by selective modification of the FEOL film stack on a transfer wafer is provided. Specifically,...
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7479410 |
Hybrid-orientation technology buried n-well design
A semiconductor structure is provided that includes a hybrid orientated substrate having at least two coplanar surfaces of different surface crystal orientations, wherein one of the coplanar...
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7473590 |
Semiconductor device having body contact through gate and method of fabricating the same
According to an embodiment of the invention, a lower transistor is formed on a semiconductor substrate, and an upper thin film transistor is formed on the lower transistor. A body contact plug is...
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7470598 |
Semiconductor layer structure and method of making the same
A method of forming a circuit includes providing a first substrate; positioning an interconnect region on a surface of the first substrate; providing a second substrate; positioning a device...
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7462514 |
Semiconductor device and method for manufacturing the same, liquid crystal television, and EL television
An object of the present invention is to provide a method for manufacturing a semiconductor device having a semiconductor element capable of reducing a cost and improving a throughput with a minute...
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7459753 |
Electro-optical device, method for manufacturing electro-optical device, and electronic apparatus
An electro-optical device includes a substrate having a display region; TFTs each including a first electrode in the display region, a first insulating layer on the first electrode, a second...
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7452794 |
Manufacturing method of a thin film semiconductor device
A substrate processing apparatus includes a plurality of evacuable treatment chambers connected to one another via an evacuable common chamber, and the common chamber is provided with means for...
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7439135 |
Self-aligned body contact for a semiconductor-on-insulator trench device and method of fabricating same
A structure and method of forming a body contact for an semiconductor-on-insulator trench device. The method including: forming set of mandrels on a top surface of a substrate, each mandrel of the...
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7439112 |
Semiconductor device using partial SOI substrate and manufacturing method thereof
A semiconductor device manufacturing method includes selectively removing portions of a buried oxide layer and first semiconductor layer in an SOI substrate having the first semiconductor layer...
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7435633 |
Electroluminescence device, manufacturing method thereof, and electronic apparatus
An organic electroluminescence device including: a substrate having conductivity on at least one side; a first insulation film, formed on one side of the substrate, while having an aperture which...
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7402466 |
Strained silicon CMOS on hybrid crystal orientations
Methods of forming a strained Si-containing hybrid substrate are provided as well as the strained Si-containing hybrid substrate formed by the methods. In the methods of the present invention, a...
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7396710 |
Fin-type semiconductor device with low contact resistance and its manufacture method
A semiconductor device comprises a fin-type semiconductor region (fin) on a support substrate, having a pair of generally vertical side walls and an upper surface coupling the side walls; an...
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7384829 |
Patterned strained semiconductor substrate and device
A method that includes forming a pattern of strained material and relaxed material on a substrate; forming a strained device in the strained material; and forming a non-strained device in the...
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7382029 |
Method and apparatus for improving integrated circuit device performance using hybrid crystal orientations
A method for implementing a desired offset in device characteristics of an integrated circuit includes forming a first device of a first conductivity type on a first portion of a substrate having a...
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7368337 |
Semiconductor device and manufacturing method thereof
A semiconductor device and method of manufacturing the same are disclosed. An example semiconductor device includes a semiconductor substrate having a first well, a first source electrode, a drain...
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7368334 |
Silicon-on-insulator chip with multiple crystal orientations
A silicon-on-insulator chip includes an insulator layer, typically formed over a substrate. A first silicon island with a surface of a first crystal orientation overlies the insulator layer and a...
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7351620 |
Methods of forming semiconductor constructions
The invention includes BIFETRAM devices. Such devices comprise a bipolar transistor in combination with a field effect transistor (FET) in a three-dimensional stacked configuration. The memory...
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7326603 |
Semiconductor device, method of manufacturing semiconductor substrate, and method of manufacturing semiconductor device
A semiconductor device includes a semiconductor substrate that has an oxide film selectively formed on a part thereof; a semiconductor layer that is formed on the oxide film by epitaxial growth; a...
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7319378 |
Anti-theft system for a vehicle with real-time notification feature
A comprehensive vehicle anti-theft and alarm system that immediately notifies a vehicle owner when a vehicle is being tampered with. Notification is accomplished via wireless signal to the owners'...
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7253040 |
Fabrication method of semiconductor device
An insulating substrate is bonded to a monocrystalline Si substrate that includes a monocrystalline Si thin film transistor and a hydrogen ion implanted portion. After depositing an amorphous Si...
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7132689 |
Liquid crystal display of horizontal electric field applying type and fabricating method thereof
A liquid crystal display having an applied horizontal electric field comprising: a gate line; a common line substantially parallel to the gate line; a data line arranged to cross the gate line and...
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7118945 |
Method of forming insulating layer and method of fabricating thin film transistor using the same
A method of forming an insulating layer including preparing a substrate and depositing an insulating layer on the substrate such that density of a top portion of the insulating layer is different...
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7115904 |
Method of manufacturing organic electroluminescent device, organic electroluminescent device, substrate for organic electroluminescent device, and electronic apparatus
To provide an organic electroluminescent device, a manufacturing method thereof, and an electronic apparatus, which can reduce wiring line resistance, lower power consumption, suppress heating and...
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7115453 |
Semiconductor device and manufacturing method of the same
Provided is a technique of effectively removing a metallic element that has catalytic action in terms of the crystallization of a semiconductor film and remains in a semiconductor film obtained...
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7091073 |
Semiconductor component, active matrix substrate for a liquid crystal display, and methods of manufacturing such component and substrate
In contrast to conventional semiconductor components formed on a silicon substrate, the present invention aims at providing a transistor component functioning as a semiconductor component by being...
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7078766 |
Transistor and logic circuit on thin silicon-on-insulator wafers based on gate induced drain leakage currents
A transistor structure fabricated on thin SOI is disclosed. The transistor on thin SOI has gated n+ and p+ junctions, which serve as switches turning on and off GIDL current on the surface of the...
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7078275 |
Semiconductor device and manufacturing method for same
An object is to provide a semiconductor device manufacturing method which makes possible a thin film transistor which is little affected by crystal grain boundaries, even when the channel width of...
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7075155 |
Structure for protecting a semiconductor circuit from electrostatic discharge and a method for forming the structure
A structure for protecting a semiconductor circuit from electrostatic discharge is provided. The structure comprises a semiconductor substrate of a first conductivity type having two wells of a...
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7075002 |
Thin-film photoelectric conversion device and a method of manufacturing the same
A method of manufacturing a thin-film solar cell, comprising the steps of: forming an amorphous silicon film on a substrate; placing a metal element that accelerates the crystallization of silicon...
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7071039 |
Manufacturing method of partial SOI wafer, semiconductor device using the partial SOI wafer and manufacturing method thereof
A semiconductor device includes a first semiconductor region having a buried oxide layer formed therein, a second semiconductor region in which the buried oxide layer does not exist, a trench...
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7064018 |
Methods for fabricating three dimensional integrated circuits
A method of forming a semiconductor device includes fabricating digital circuits comprising a programmable logic circuit on a substrate; selectively fabricating either a memory circuit or a...
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7052941 |
Method for making a three-dimensional integrated circuit structure
Vertically oriented semiconductor devices may be added to a separately fabricated substrate that includes electrical devices and/or interconnect. The plurality of vertically oriented semiconductor...
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7045413 |
Method of manufacturing a semiconductor integrated circuit using a selective disposable spacer technique and semiconductor integrated circuit manufactured thereby
Methods of manufacturing a semiconductor integrated circuit using selective disposable spacer technology and semiconductor integrated circuits manufactured thereby: The method includes forming a...
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6977408 |
High-performance non-volatile memory device and fabrication process
An EEPROM device exhibiting high saturation current and low signal propagation delay and a process for fabricating the device that includes the formation of refractory metal silicide regions in the...
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6972220 |
Structures and methods of anti-fuse formation in SOI
An anti-fuse structure that can be programmed at low voltage and current and which potentially consumes very little chip spaces and can be formed interstitially between elements spaced by a minimum...
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6972218 |
Semiconductor device and fabricating method thereof
The present invention relates to a method of fabricating a semiconductor device that allows assuredly ion implanting an impurity to a support substrate and a semiconductor device that can rapidly...
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6943067 |
Three-dimensional integrated semiconductor devices
The present invention describes a process for three-dimensional integration of semiconductor devices and a resulting device. The process combines low temperature wafer bonding methods with...
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