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7256117 |
Method for evaluating and modifying solder attach design for integrated circuit packaging assembly
A method of reducing a likelihood that a die pad will be delaminated from a die in an integrated circuit die package for a structure design during an attachment of a heat sink member to the die pad...
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7256058 |
Device and method for package warp compensation in an integrated heat spreader
A device and method for designing and manufacturing an integrated heat spreader so that the integrated heat spreader will have a flat surface on which to mount a heat sink after being assembled...
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7250309 |
Integrated phase angle and optical critical dimension measurement metrology for feed forward and feedback process control
Methods and apparatus for controlling the critical dimensions and monitoring the phase shift angles of photomasks. Critical dimensions measurement data before wafer processing and after wafer...
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7250328 |
Microelectronic component assemblies with recessed wire bonds and methods of making same
The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, a...
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7247576 |
Method of manufacturing a semiconductor device
The occurrence of a package crack in the back vicinity of a die pad is restrained by making the outward appearance of the die pad of a lead frame smaller than that of a semiconductor chip which is...
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7238962 |
Semiconductor chip with test pads and tape carrier package using the same
A semiconductor chip with test pads and a tape carrier package using the same are provided. The tape carrier package comprises a semiconductor chip. The semiconductor chip has an active surface and...
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7235412 |
Semiconductor component having test pads and method and apparatus for testing same
A semiconductor component having test pads and a method and apparatus for testing the same is described. In an example, an un-bumped substrate is obtained having a pattern of bond pads configured...
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7235413 |
Fabrication method of semiconductor integrated circuit device
Any damage inflicted on test pads, inter-layer insulating films, semiconductor elements or wiring at the time of electrical inspection of semiconductor integrated circuit devices is to be reduced....
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7235873 |
Protective device for subassemblies and method for producing a protective device
A protective device for subassemblies having a substrate and at least one component to be protected which is disposed on the substrate includes at least one covering element for covering a...
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7220615 |
Alternative method used to package multimedia card by transfer molding
A semiconductor card is made by a disclosed method which, in one molding step, forms a plastic body on a substrate attached to a surrounding frame by narrow connecting segments spanning a...
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7214566 |
Semiconductor device package and method
A method of making semiconductor device packages includes the steps of attaching a wafer to a dielectric layer, testing semiconductor devices in the wafer, and then dicing the layered assembly. The...
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7211451 |
Process for producing a component module
A process for producing a component module comprising a module carrier and a plurality of components with which contact is made on the latter, comprising the following steps:
arranging...
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7211448 |
Semiconductor device manufacturing method capable of reliable inspection for hole opening and semiconductor devices manufactured by method
A substrate defining an insulating surface layer portion and formed with a wiring groove filled with a wiring line the wiring line is electrically connected to a conductive member. The conductive...
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7198965 |
Method for making a neo-layer comprising embedded discrete components
A stackable neo-layer comprising one or more embedded discrete electrical components is provided. A plurality of conductive traces, some of which terminate at a peripheral edge of the layer, are...
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7195932 |
Enhancement of grain structure for tungsten contracts
A method for enhancing grain structure of a contact material for a semiconductor device is provided. The method initiates with exposing the contact material of a contact at a first depth within the...
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7195935 |
Selective packaging of tested semiconductor devices
A method for manufacturing a semiconductor device includes, (a) mounting a plurality of first semiconductor chips in a manner not to overlap with one another on a substrate having a plurality of...
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7195931 |
Split manufacturing method for advanced semiconductor circuits
A front-end-of-line piece of a semiconductor die is manufactured in a first manufacturing line. A back-end-of-line piece of a semiconductor die is manufactured using a second manufacturing line,...
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7190823 |
Overlay vernier pattern for measuring multi-layer overlay alignment accuracy and method for measuring the same
An overlay vernier pattern for measuring multi-layer overlay alignment accuracy and a method for measuring the same is provided. A distance between a first alignment mark in a first material layer...
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7186280 |
Method of inspecting a leakage current characteristic of a dielectric layer and apparatus for performing the method
A method of inspecting a leakage current of a dielectric layer on a substrate including a cell array region having a plurality of cell blocks including a patterned structure, the dielectric layer...
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7183130 |
Magnetic random access memory and method of fabricating thereof
A device structure and method for forming an interconnect structure in a magnetic random access memory (MRAM) device. In an exemplary embodiment, the method includes defining a magnetic stack layer...
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7179666 |
Method for manufacturing an electronic circuit device and electronic circuit device
A circuit element having electrodes on one main surface thereof and a substrate having connection bump electrodes and recognition bump electrodes provided on one main surface thereof are prepared....
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7179661 |
Chemical mechanical polishing test structures and methods for inspecting the same
Disclosed is a semiconductor die having a plurality of dummy fillings positioned and sized to minimize defects during chemical mechanical polishing is disclosed. At least one of the dummy fillings...
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7179662 |
Semiconductor fuse covering
A method and system for sealing or covering exposed fuses on a semiconductor device are disclosed. A semiconductor device prober incorporating a spray device for applying a sealing compound to...
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7176486 |
Structure of test element group wiring and semiconductor substrate
A structure of test element group wiring includes, in addition to an electrode on a substrate including one or more layers of insulating films, and real wirings electrically connected to the...
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7174627 |
Method of fabricating known good dies from packaged integrated circuits
A known good die is economically fabricated. A tested integrated circuit is provided which includes a die having a bonding location on an upper surface and a lead. An upper portion of the...
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7176044 |
B-stageable die attach adhesives
The present invention relates to b-stageable die attach adhesives, methods of preparing such adhesives, methods of applying such adhesives to the die and other substrate surfaces, and assemblies...
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7169627 |
Method for inspecting a connecting surface of a flip chip
The present invention provides a method for inspecting a connecting surface of a flip chip to solve problems that the grinding, polishing and chemical etching method is used for making a sample....
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7163829 |
Method of integration testing for packaged electronic components
A method of integration testing for packaged electronic components is capable of improving a conventional testing for packaged electronic components. In this method, non-tested sides of the...
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7160797 |
Method of bumping die pads for wafer testing
A method of processing a semiconductor wafer including a plurality of semiconductor dies is provided. The method includes providing a semiconductor wafer including a plurality of semiconductor...
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7157131 |
Prevention of counterfeit markings on semiconductor devices
A lidded semiconductor device has a first layer applied to the lid, which first layer is chosen of a material which fluoresces upon application of non-visible electromagnetic waves thereto, for...
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7157292 |
Leadframe for a multi-chip package and method for manufacturing the same
A leadframe for multi-chip package (MCP) including a die pad and a plurality of leads. A dielectric layer is formed on the lower surface of the die pad, so that the die pad is etched to form an...
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7158170 |
Test system for camera modules
A test system and a related method to perform optical and electrical tests, to adjust the focus and to seal the lens of digital fixed-focus cameras have been achieved. Said test system is...
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7157793 |
Direct contact semiconductor cooling
Thermal spreading resistance, associated with small geometry electronic features that generate heat on a semiconductor, may be reduced through the addition of a thermally conductive fluid. For...
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7154169 |
Substrate for IC package
A packaging substrate is formed of an array of packaging units. Each packaging unit includes a chip pad on which a chip is carried, a plurality of pins arranged around the chip pad and spaced from...
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7152308 |
Wirebonder to bond an IC chip to a substrate
Thick film bond surfaces ( 8 ) on a support structure ( 10 ), such as a ceramic substrate or an IC package substrate, tend to deform during processing. A personality kit ( 16 ) having raised bosses...
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7148083 |
Transfer mold semiconductor packaging processes
In one implementation, a circuit substrate includes a substrate having opposing sides. At least one of the sides is configured for transfer mold packaging and has conductive traces formed thereon....
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7148074 |
Method and apparatus for using a capacitor array to measure alignment between system components
One embodiment of the present invention provides a system that measures alignment between a first semiconductor die and a second semiconductor die. The system operates by applying a pattern of...
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7133735 |
Experiment management system and method thereof in semiconductor manufacturing environment
A system and method thereof for experiment management. A storage device stores an experiment plan record, a merge constraint and an integration rule. A processing unit configured to acquire a first...
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7126825 |
Combined chip/heat-dissipating metal plate and method for manufacturing the same
A combined chip/heat-dissipating metal plate includes a chip and a heat-dissipating metal plate bonded to a side of the chip, wherein the heat-dissipating metal plate is in a stretched state. The...
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7126216 |
Two part mold for wafer scale caps
The invention provides a two part mold for forming wafer scale caps. The mold has a first half and a second half. The first half and second half, when brought together defining mold cavities for...
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7126083 |
Chip scale marker and method of calibrating marking position
A chip scale marker including a laser system, a wafer holder supporting a wafer to be processed, and a camera moving above the wafer holder by being connected to an X-Y stage and monitoring the...
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7125747 |
Process for manufacturing leadless semiconductor packages including an electrical test in a matrix of a leadless leadframe
A process for manufacturing a plurality of leadless semiconductor packages includes an electrically testing step to test encapsulated chips in a matrix of a leadless leadframe. Firstly, a leadless...
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7126164 |
Wafer-level moat structures
A wafer-level CSP ( 200 ) includes at least one die ( 202 ) from a wafer. The wafer-level CSP has a plurality of solder ball pads ( 206 ), a solder ball ( 308 ) at each solder ball pad and a...
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7125729 |
Method for opening the plastic housing of an electronic module
In a method of opening of a housing of a plastic-housed electronic module by a laser, the electronic module is protected from the effects of the laser beam and the laser beam is stopped at a...
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7122829 |
Probe look ahead: testing parts not currently under a probehead
A semiconductor substrate, probe card, and methods for stressing and testing dies on a semiconductor substrate are provided. The semiconductor substrate, typically a semiconductor wafer, comprises...
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7114250 |
Method of making components with releasable leads
A connection component for making connections to a microelectronic element is made by providing leads on a surface of a polymeric layer and etching the polymeric layer to partially detach the leads...
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7115425 |
Integrated circuit process monitoring and metrology system
A method for monitoring polishing process parameters for an integrated circuit structure on a substrate. A first metrology site is constructed on the substrate. The first metrology site represents...
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7112792 |
Defect inspection and charged particle beam apparatus
In a defect inspection apparatus which combines a plurality of probes for measuring electric properties of a specimen including a fine circuit line pattern with a charged particle beam apparatus,...
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7112468 |
Stacked multi-component integrated circuit microprocessor
An apparatus and method for fabricating a microprocessor comprising a first chip ( 12 ) having an active face ( 30 ) including a central processing unit and a second chip ( 14 ) having an active...
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7109057 |
Sealing apparatus for semiconductor wafer and method of manufacturing semiconductor device by using sealing apparatus
A sealing apparatus for a semiconductor wafer includes an upper mold and a lower mold. The lower mold includes a recess in which the semiconductor wader is placed, and a pot for introducing resin...
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