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6020745 |
Method of batch testing surface mount devices using a substrate edge connector
The present invention is used with single devices mounted on a ceramic substrate. The devices are broken out of the sheet, after all testing, electrical conditioning, and screening, as small...
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6017812 |
Bump bonding method and bump bonding apparatus
The present invention provides a bump bonding method that can prevent bumps from being inappropriately shaped. The bump bonding method comprises forming a gold ball (16) at the tip of a gold wire...
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6013534 |
Method of thinning integrated circuits received in die form
A method of thinning integrated circuits in die form including acquiring a handle wafer; depositing an etch stop material on the handle wafer; coating an adhesive layer onto the etch stop material;...
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6010915 |
High performance debug I/O
A semiconductor with dedicated wire bond sites that are routed and via'd only to a top surface of a semiconductor package to flush mount pads where they are probed during debug, thus reducing the...
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5998228 |
Method of testing semiconductor
Resilient contact structures are mounted directly to bond pads on semiconductor dies, prior to the dies being singulated (separated) from a semiconductor wafer. This enables the semiconductor dies...
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5994152 |
Fabricating interconnects and tips using sacrificial substrates
Interconnection elements and/or tip structures for interconnection elements may first be fabricated upon sacrificial substrates for subsequent mounting to electronic components. In this manner, the...
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5989937 |
Method for compensating for bottom warpage of a BGA integrated circuit
An integrated circuit includes a plurality of solder balls arrayed on the bottom surface of a package of the integrated circuit. These solder balls provide for surface mounting of the integrated...
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5984522 |
Apparatus for inspecting bump junction of flip chips and method of inspecting the same
An apparatus for inspecting bump junctions in a semiconductor flip chip mounting which is able to inspect a state of a junction portion, has a simple structure and is safe and suitable for mass...
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5981370 |
Method for maximizing interconnection integrity and reliability between integrated circuits and external connections
A method of fabricating a semiconductor device which includes providing a shaped bond pad, preferably rectangular or oval. A cavity followed by a hill are formed in the bond pad by performing a...
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5981302 |
Integrated multi-layer test pads and methods therefor
A multi-layer test pad on a semiconductor wafer, which includes an underlying matrix of interconnected first pads, which are arranged in rows and columns. The multi-layer test pad includes an oxide...
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5976897 |
Method of protecting device leads of a packaged integrated circuit
Device leads on a packaged integrated circuit are protected during a decapsulation process. A composite material such as wax is applied to coat the leads. At least a portion of a package containing...
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5972735 |
Method of preparing an electronic package by co-curing adhesive and encapsulant
A semi-conductor package in which an integrated circuit chip is connected to a substrate using wire-bonding is prepared by curing the die attach adhesive and encapsulating the wire bonds in one...
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5972725 |
Device analysis for face down chip
A method of precisely measuring electrical parameters in integrated circuits in a face down semiconductor device in which a portion of the semiconductor substrate is removed from the semiconductor...
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5972723 |
Enhanced thin film wiring net repair process
A process for partially repairing defective Multi-Chip Module (MCM) Thin-Film (TF) wiring nets. The process comprises the steps of locating a short circuit between any two nets of the MCM,...
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5966593 |
Method of forming a wafer level contact sheet having a permanent z-axis material
The present invention relates to a system and method for performing reliability screening on semi-conductor wafers and particularly to a highly planar burn in apparatus and method for uses...
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5966587 |
Methods of making semiconductor assemblies with reinforced peripheral regions
A method of forming a microelectronic assembly having an element with contacts on a front surface thereof, an interposer with a plurality of connecting terminals in a connecting terminal region and...
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5963782 |
Semiconductor component and method of manufacture
A semiconductor component can be manufactured by providing a leadframe (12) with leads (13) and a flag (14) substantially coplanar with at least one of the leads (13) wherein the flag (14) has a...
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5963781 |
Technique for determining semiconductor substrate thickness
The invention relates to a method of measuring the thickness of a semiconductor substrate. First, a semiconductor substrate having a thickness and a photocurrent generating structure is provided....
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5956563 |
Method for reducing a transient thermal mismatch
The invention relates to a method for reducing a transient thermal mismatch between a first component and a second component which are in mechanical contact with one another. The temperature of the...
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5948690 |
Pretreatment system for analyzing impurities contained in flat sample
A pretreatment system for analyzing impurities contained in a flat sample contains a cylindrical lower case having a stepped portion on which the flat sample is seated. The stepped portion is...
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5949129 |
Wafer comprising optoelectronic circuits and method of verifying this wafer
A wafer (10) is described comprising several integrated optoelectronic circuits of a first type (11), such circuits of the first type each comprising electronic modules (13) and at least a first...
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5946546 |
Chip burn-in and test structure and method
A burn-in frame having at least one window and including resistors having resistor pads is situated on a flexible layer, and at least one integrated circuit chip having chip pads is situated in the...
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5946545 |
Semiconductor stack structures and fabrication/sparing methods utilizing programmable spare circuit
Electronic semiconductor structures, and fabrication and sparing methods, each utilize an electrically programmable spare circuit incorporated with a multichip package. The programmable sparing...
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5946544 |
Circuit board-mounted IC package cooling and method
In a circuit board/IC package assembly the die cavity in the IC package body portion is filled with a thermally conductive liquid to substantially facilitate the transfer of operational die heat...
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5940679 |
Method of checking electric circuits of semiconductor device and conductive adhesive for checking usage
Conductive adhesive for checking electric circuits is formed on contact electrodes of a chip package or a multi-chip module. After contact electrodes of the chip package or the multi-chip module...
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5940680 |
Method for manufacturing known good die array having solder bumps
A method for manufacturing a known good die array("KGD" array ), which includes the steps of: (a) forming a plurality of circuit patterns, and bonding pads to match solder bumps on a wafer; (b)...
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5940681 |
Method and apparatus for automatically checking position data of J-leads
There is disclosed a method for automatically checking position data of J-leads at a semiconductor component enclosed in a housing with respect to a plane parallel to the bottom side of the...
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5937269 |
Graphics assisted manufacturing process for thin-film devices
A Process for graphically assisting the partial repair of defective MCM TF wiring nets. The process comprises the steps of inserting the wiring layer of the thin-film device in a tester, scanning...
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5930588 |
Method for testing an integrated circuit device
A method for testing an integrated circuit situated on the top of a semiconductor substrate. The method includes the steps of focusing a photon onto a portion of the integrated circuit through an...
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5930586 |
Method and apparatus for in-line measuring backside wafer-level contamination of a semiconductor wafer
A method and apparatus for detecting copper (Cu) contamination on the backside of a wafer (120) begins by providing the wafer (120). The wafer (120) is rotated about a rotational axis via a...
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5925260 |
Removal of polyimide from dies and wafers
Polyimide is used with a semiconductor wafer with a number of dies with circuitry formed thereon. A layer of polyimide is formed on the semiconductor wafer. The wafer is inspected to determine...
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5918107 |
Method and system for fabricating and testing assemblies containing wire bonded semiconductor dice
A method and system for fabricating electronic assemblies, such as multi chip modules, which include wire bonded semiconductor dice, are provided. Initially, dice having bond pads, and a substrate...
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5910010 |
Semiconductor integrated circuit device, and process and apparatus for manufacturing the same
A method of manufacturing a semiconductor integrated circuit device includes the steps of constructing a plurality of lead frames having leads which each include an inner portion and an outer...
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5907190 |
Semiconductor device having a cured silicone coating with non uniformly dispersed filler
A semiconductor device in which the surface of the semiconductor element is coated with a cured silicone in which there is dispersed filler having an average particle diameter of 0.01 to 500...
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5904489 |
Topside analysis of a multi-layer integrated circuit die mounted in a flip-chip package
Aspects for topside analysis of an integrated circuit die mounted in a flip-chip orientation are described. In an exemplary method aspect, the method includes isolating the multi-layer integrated...
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5897334 |
Method for reproducing printed circuit boards for semiconductor packages including poor quality printed circuit board units and method for fabricating semiconductor packages using the reproduced printed circuit boards
A method for reproducing a PCB strip for semiconductor packages, wherein a poor quality PCB unit included in the PCB strip is replaced with a normal quality one, thereby achieving a reduction in...
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5895228 |
Encapsulation of organic light emitting devices using Siloxane or Siloxane derivatives
An organic light emitting device (10) is provided which is encapsulated by a Siloxane buffer layer (17.1). This Siloxane buffer layer (17.1) is applied to the diode (10) providing for protection...
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5885853 |
Hollow chip package and method of manufacture
Semiconductor package and method in which a chip is mounted in an opening in a frame with the back side of the chip facing outside the package, and a heatsink is positioned in direct thermal...
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5877034 |
Method of making a three-dimensional integrated circuit
A method of making a three-dimensional integrated circuit by transferring fully processed devices from a device layer of first substrate to an auxiliary substrate, separating the auxiliary...
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5877033 |
System for detection of unsoldered components
A system for detecting certain improperly soldered electrical component connections to a printed circuit board includes methods and apparatus providing an automated means for detecting unsoldered...
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5874319 |
Vacuum die bond for known good die assembly
Method for testing bare semiconductor die which includes providing a test substrate with a die receiving surface and bond pads with conductive traces which extend away from the surface and are...
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5872025 |
Method for stacked three dimensional device manufacture
Stacked three-dimensional devices can be prepared by stacking wafers as an alternative to stacking individual devices. Chip regions are formed on several wafers with each chip region being...
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5866437 |
Dynamic process window control using simulated wet data from current and previous layer data
A method of manufacturing semiconductor wafers using a simulation tool to determine predicted wafer electrical test measurements. The simulation tool combines in-line critical dimensions from...
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5858806 |
Method of bonding IC component to flat panel display
A method wherein an IC component is mounted to electrodes provided in a transparent portion of a flat panel display with interposition of an anisotropic conductive adhesive or film, includes steps...
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5851845 |
Process for packaging a semiconductor die using dicing and testing
A method for packaging semiconductor dice is provided. The package includes a thinned die mounted on a compliant adhesive layer to a substrate. The package is formed by providing a wafer containing...
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5837558 |
Integrated circuit chip packaging method
An improved method for packaging an integrated circuit chip is disclosed. In accordance with the invention, an integrated circuit chip (12) is mounted on a leadframe (18) having a plurality of...
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5834833 |
Electrical component having a selective cut-off conductor
An electrical component has a chip body made of resin, and a metallic pattern including a plurality of terminals to be bonded to a printed circuit, a plurality of interconnects extending on the top...
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5831825 |
Integrated circuit IC package and a process for cooling an integrated circuit mounted in an IC package
The heat dissipated by the integrated circuit (11) is evacuated into a plate (13) having an extended surface in order to transmit the heat into the integrated circuit package (10) and into the...
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5827771 |
Readout backside processing for hybridization
This invention pertains to a method for processing readout integrated circuits, and to a readout integrated circuit (10) that is processed in accordance with the method. The method includes a first...
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5827970 |
Non-destructive method of determining substrate tilt within a packaged semiconductor component
A non-destructive method of determining substrate tilt within a packaged component includes providing the packaged component (10) with a component surface (32), providing a substrate (22) in the...
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