|
Match
|
Document |
Document Title |
|
|
6228665 |
Method of measuring oxide thickness during semiconductor fabrication
A measurement of thickness of a metal oxide layer on a solder ball connection during semiconductor fabrication is demonstrated by an in-situ capacitance measurement of the oxide layer. A linear...
|
|
|
6225139 |
Manufacturing method of an led of a type of round concave cup with a flat bottom
A manufacturing method of an LED of a type of round concave cup with a flat bottom comprises two manufacturing steps. At first stage of concave cup printer circuit board, a printed circuit board is...
|
|
|
6218202 |
Semiconductor device testing and burn-in methodology
A packaged semiconductor device and a method for burn-in and testing are disclosed. The package comprises a carrier having a pattern of contact pads for electrical connection, and also a pattern of...
|
|
|
6218201 |
Method of manufacturing a liquid crystal display module capable of performing a self-test
Method of manufacturing the quality of contacts e.g. in an LCD module in which an IC is so placed on the surface of a substrate that the external connections of the IC electrically contact the...
|
|
|
6214641 |
Method of fabricating a multi-chip module
A lead-over-chip single-in-line memory module (LOC SIMM) and method of manufacturing is disclosed that provides for shortened wire bonds and ease of rework for unacceptable semiconductor dice. More...
|
|
|
6214642 |
Area array stud bump flip chip device and assembly process
An area array flip chip device produced using wire bonding technology. The design and process for producing such a flip chip involves stud bumps which are bonded on the substrate, to give good...
|
|
|
6214630 |
Wafer level integrated circuit structure and method of manufacturing the same
A wafer level IC structure and a method of manufacturing this wafer level IC structure are proposed, which can help increase the yield of the IC manufacture. The wafer level IC structure is...
|
|
|
6214644 |
Flip-chip micromachine package fabrication method
To fabricate a flip-chip micromachine package, a micromachine chip is mounted as a flip chip to a substrate. The micromachine chip is attached such that a micromachine area on a first surface of...
|
|
|
6210984 |
Method and apparatus for automatically positioning electronic dice within component packages
A method and apparatus of assembling and disassembling semiconductor dice to be tested from the components of a temporary test package. A computer-controlled vision system is employed to align the...
|
|
|
6194235 |
Method of fabricating and testing an embedded semiconductor device
Methods and structures for pad reconfiguration to allow intermediate testing during the manufacture of an integrated circuit are disclosed. The methods and structures disclosed are particularly...
|
|
|
6187601 |
Plastic encapsulated IC package and method of designing same
A method for designing an IC package having a plastic encapsulated portion and a lead frame portion that are bonded together at a bonding interface includes selecting material candidates for each...
|
|
|
6185467 |
Adaptive discrete-time sliding mode controller
An adaptive, discrete-time sliding mode controller (SMC) is disclosed which detects and adapts to gain variations in the controlled plant. The overall control effort is generated by combining a...
|
|
|
6180425 |
Data transfer circuit
A method and apparatus for maximizing the data transmission rate from a source data path to selected channels of a destination data path having a different width from the source data path. In a...
|
|
|
6177288 |
Method of making integrated circuit packages
A method of producing and electrically testing a chip scale integrated circuit package includes the step of providing a panel having a plurality of chip scale packages assembled on the panel. Each...
|
|
|
6169021 |
Method of making a metallized recess in a substrate
The present invention relates to the formation of a ball grid array testing receiver that is scalable for design consideration of miniaturization. A dielectric layer is formed upon a substrate that...
|
|
|
6168960 |
Backside device deprocessing of a flip-chip multi-layer integrated circuit
Aspects for deprocessing of a flip-chip, multi-layer integrated circuit from the backside are described. In an exemplary method aspect, the method includes reducing a first backside layer of the...
|
|
|
6162701 |
Semiconductor device and method for making same
A semiconductor chip (105') and a substrate (102) are bonded with an organic adhesive layer (409) containing conductive particles (406), and a pad (405) and an electrode (412) are mutually,...
|
|
|
6162651 |
Method and system for accurately marking the backside of the die for fault location isolation
A system and method for deprocessing a semiconductor die is disclosed. The semiconductor dies has an active area and at least one feature in the active area. The method and system include tuning an...
|
|
|
6162652 |
Process for sort testing C4 bumped wafers
A method of testing an integrated circuit device including depositing a solder bump on a surface of a bond pad on an integrated circuit device, heat treating the solder bump, and testing the...
|
|
|
6150186 |
Method of making a product with improved material properties by moderate heat-treatment of a metal incorporating a dilute additive
Deposition of metal in a preferred shape, including coatings on parts, or stand-alone materials, and subsequent heat treatment to provide improved mechanical properties. In particular, the method...
|
|
|
6146912 |
Method for parallel alignment of a chip to substrate
A method and apparatus for bonding a chip to a substrate is described, wherein the apparatus includes a chip holder assembly comprising an outer holder having a cavity formed therein and an inner...
|
|
|
6139661 |
Two step SMT method using masked cure
A method for temporarily attaching an electrical component to a pad, testing the component, removing and replacing the component if necessary, and making a final attachment of the component to the...
|
|
|
6127196 |
Method for testing a tape carrier package
Methods for testing a [A] tape carrier package (TCP) for an integrated circuit device that includes two sets of test pads. A first set of test pads are located along the outer edges of the TCP and...
|
|
|
6127195 |
Methods of forming an apparatus for engaging electrically conductive pads and method of forming a removable electrical interconnect apparatus
A method of engaging electrically conductive test pads on a semiconductor substrate having integrated circuitry for operability testing thereof includes: a) providing an engagement probe having an...
|
|
|
6124142 |
Method for analyzing minute foreign substance elements
To provide a minute foreign matter analysis method and device wherein the observation, analysis and estimation of minute foreign matter is permitted by linking the device coordinate of a particle...
|
|
|
6119325 |
High pressure water stream to separate a multi-layer integrated circuit device and package
Aspects for device and package separation of a multi-layer integrated circuit device attached at a frontside to an integrated circuit package are described. In an exemplary method aspect, the...
|
|
|
6121062 |
Process of fabricating semiconductor unit employing bumps to bond two components
A bump forming step forms a predetermined number of bumps on at least a first one of two components. A height measuring step measures the heights of the predetermined number of bumps. A fixing step...
|
|
|
6121063 |
Method of testing a ball grid array IC
A method of testing a ball grid array (BGA) integrated circuit (IC) package such that no solder balls are attached to the BGA IC package when burn-in testing using a burn-in testing socket is...
|
|
|
6122177 |
Semiconductor device-mounted on a printed circuit board having solder bumps with excellent connection reliability
In order to reduce a strain, developing in solder bumps in a BGA-type semiconductor device-mounting construction, so as to enhance a thermal fatigue life, voids, present in each solder bump joint...
|
|
|
6117693 |
System for fabricating and testing assemblies containing wire bonded semiconductor dice
A method and system for fabricating electronic assemblies, such as multi chip modules, which include wire bonded semiconductor dice, are provided. Initially, dice having bond pads, and a substrate...
|
|
|
6117695 |
Apparatus and method for testing a flip chip integrated circuit package adhesive layer
An apparatus and method are presented for testing an adhesive layer formed between an integrated circuit and a plate, wherein the plate may be semiconductor device package substrate or a heat...
|
|
|
6114181 |
Pre burn-in thermal bump card attach simulation to enhance reliability
The present invention provides a method for detecting integrated circuit component failures that would normally be triggered during the final card attach step of the manufacturing process....
|
|
|
6107109 |
Method for fabricating a semiconductor interconnect with laser machined electrical paths through substrate
An interconnect for semiconductor components such as dice, wafers and chip scale packages is provided. The interconnect includes a substrate, and patterns of contacts formed on a face side of the...
|
|
|
6103553 |
Method of manufacturing a known good die utilizing a substrate
Disclosed is a substrate used in performing a burn-in test of the integrated circuit chip prior to packaging the chip and a method for manufacturing a known good die using the same. The substrate...
|
|
|
6096568 |
Process for preparing a semiconductor device package for analysis of a die
A method for preparing a semiconductor device package for analysis of a die. The die has a back side mounted on a die paddle which is mounted to a metallic plug, and the metallic plug is disposed...
|
|
|
6090633 |
Multiple-plane pair thin-film structure and process of manufacture
A multiple plane pair thin-film structure and a process for the manufacture of that structure. The multiple plane pair thin-film structure is of modular design and manufacture, such that each...
|
|
|
6087192 |
Polymer marker
An embodiment of the instant invention is a method of making a semiconductor device situated within a package with conductive leads extending from the package, the method comprising the steps of:...
|
|
|
6083766 |
Packaging method of thin film passive components on silicon chip
The present invention relates to a packaging method of thin film passive components on silicon chip, which employs ceramic or glass substrate to be mounted with the silicon chip so as to improve...
|
|
|
6083771 |
Method and system for manufacturing theft-deterrent computer components
A method and system for manufacturing theft-deterrent computer components is disclosed. Initially, computer components are grouped in a single batch. Each of the computer components are then...
|
|
|
6084267 |
Design propagation delay measurement device
A semiconductor integrated circuit comprises a substrate including a plurality of transistors, and a conductive line for coupling at least two of the transistors with each other, each transistor...
|
|
|
6080595 |
Method for estimating the thickness of layer coated on wafer
A method for estimating the thickness of a desired layer coated on a wafer includes steps of (a) forming a plurality of compared layers having the same composition of the desired layer, (b)...
|
|
|
6068892 |
Methods and structures for pad reconfiguration to allow intermediate testing during manufacture of an integrated circuit
Methods and structures for pad reconfiguration to allow intermediate testing during the manufacture of an integrated circuit are disclosed. The methods and structures disclosed are particularly...
|
|
|
6063641 |
Method of measuring electrical characteristics of semiconductor circuit in wafer state and semiconductor device for the same
A plurality of semiconductor circuits provided on a semiconductor wafer are arranged in a plurality of rows. The plurality of semiconductor circuits of each row are connected in series through...
|
|
|
6063640 |
Semiconductor wafer testing method with probe pin contact
A semiconductor wafer testing method includes a pre-test step for forming a temporary test film on a surface of a semiconductor wafer, a test step for testing the semiconductor wafer by applying a...
|
|
|
6059624 |
Screen and driver assembly for screen pixels
The display screen (11) is made of pixels (P) connected to one edge (11a) of the screen by wires (12) separated by a given pitch (s) so as to be controlled by respective terminals (18) of...
|
|
|
6057170 |
Method of measuring waviness in silicon wafers
A method and system of measuring waviness of a silicon wafer. A memory stores data representative of the shape of the wafer at a plurality of positions on the wafer and a processor processes the...
|
|
|
6048745 |
Method for mapping scratches in an oxide film
A method and apparatus for detecting scratches on a wafer surface. The method comprises the use of a monitor wafer which has a substrate, a first layer deposited on the substrate, and a second...
|
|
|
6046061 |
Method of inspecting wafer water mark
A method of water mark inspection. By forming a pattern on a test wafer, the water mark formed thereon directly reflects the features of a wafer product to be evaluated. The water mark is formed by...
|
|
|
6043100 |
Chip on tape die reframe process
A die is unpackaged from a Chip on Tape by grinding off molding compound from an upper surface of the COT until the COT's leads are evenly exposed across the upper surface, selectively etching out...
|
|
|
6041270 |
Automatic recipe adjust and download based on process control window
A method of manufacturing semiconductor wafers using a simulation tool to determine a set of predicted wafer electrical test measurements that are compared to a set of target wafer electrical test...
|