Match Document Document Title
9034741 Halo region formation by epitaxial growth  
A semiconductor device and method for manufacturing the same, wherein the method includes fabrication of field effect transistors (FET). The method includes growing a doped epitaxial halo region...
9029836 Controlled synthesis of monolithically-integrated graphene structure  
In a method for fabricating a graphene structure, there is formed on a fabrication substrate a pattern of a plurality of distinct graphene catalyst materials. In one graphene synthesis step,...
9029868 Semiconductor apparatus having nitride semiconductor buffer layer doped with at least one of Fe, Si, and C  
A semiconductor apparatus includes a substrate; a buffer layer formed on the substrate; a first semiconductor layer formed on the buffer layer; and a second semiconductor layer formed on the first...
9018050 Rolled-up transmission line structure for a radiofrequency integrated circuit (RFIC)  
A rolled-up transmission line structure for a radiofrequency integrated circuit (RFIC) comprises a multilayer sheet in a rolled configuration comprising multiple turns about a longitudinal axis,...
9018051 Strained transistor structure  
A strain enhanced transistor is provided having a strain inducing layer overlying a gate electrode. The gate electrode has sloped sidewalls over the channel region of the transistor.
9006055 High voltage FINFET structure  
Methods for forming FIN-shaped field effect transistors (FINFETs) capable of withstanding high voltage applications and the resulting devices are disclosed. Embodiments include forming a source...
8999772 Compound semiconductor device and method of manufacturing the same  
Two layers of protection films are formed such that a sheet resistance at a portion directly below the protection film is higher than that at a portion directly below the protection film. The...
8999775 Method of fabricating pixel structure and pixel structure thereof  
A method for fabricating a pixel structure includes the following steps. A patterned semiconductor layer, an insulation layer, and a patterned metal layer are formed on a substrate sequentially. A...
8999771 Protection layer for halftone process of third metal  
A thin-film transistor having a protection layer for a planarization layer. The protection layer prevents reduction of the planarization layer during an ashing process, thereby preventing the...
8994114 Performance enhancement of active device through reducing parasitic conduction  
An apparatus having an active device, a plurality of traces and one or more areas is disclosed. The active device may have a channel layer. A buffer layer is generally disposed between the channel...
8993401 High-voltage transistor architectures, processes of forming same, and systems containing same  
An apparatus includes a first device with a metal gate and a drain well that experiences a series resistance that drops a drain contact voltage from 10 V to 4-6 V at a junction between the drain...
8981493 FinFET and method of fabrication  
An improved finFET and method of fabrication is disclosed. Embodiments of the present invention take advantage of the different epitaxial growth rates of {110} and {100} silicon. Fins are formed...
8975123 Tunnel field-effect transistors with a gate-swing broken-gap heterostructure  
Device structures, fabrication methods, and design structures for tunnel field-effect transistors. A drain comprised of a first semiconductor material having a first band gap and a source...
8962397 Multiple well drain engineering for HV MOS devices  
At least one N-well implant having a different doping level is formed in a silicon substrate by first etching the substrate with an alignment target for aligning future process masks thereto. This...
8954021 Group III-N transistors on nanoscale template structures  
A III-N semiconductor channel is formed on a III-N transition layer formed on a (111) or (110) surface of a silicon template structure, such as a fin sidewall. In embodiments, the silicon fin has...
8946731 OLED display with spalled semiconductor driving circuitry and other integrated functions  
Spalling is employed to generate a single crystalline semiconductor layer. Complementary metal oxide semiconductor (CMOS) logic and memory devices are formed on a single crystalline semiconductor...
8946003 Method of forming transistors with ultra-short gate feature  
A semiconductor transistor is formed as follows. A gate electrode is formed over but is insulated from a semiconductor body region. A first layer of insulating material is formed over the gate...
8941187 Strain engineering in three-dimensional transistors based on strained isolation material  
In a three-dimensional transistor configuration, a strain-inducing isolation material is provided, at least in the drain and source areas, thereby inducing a strain, in particular at and in the...
8937353 Dual epitaxial process for a finFET device  
A method includes forming a first fin and a second fin extending above a semiconductor substrate, with a shallow trench isolation (STI) region between them. A space is defined between the first...
8936979 Semiconductor devices having improved gate height uniformity and methods for fabricating same  
Semiconductor devices and methods for fabricating semiconductor devices are provided. In an embodiment, a method for fabricating a semiconductor device includes forming on a semiconductor surface...
8916444 Non-uniform channel junction-less transistor  
The present disclosure discloses a method of forming a semiconductor layer on a substrate. The method includes patterning the semiconductor layer into a fin structure. The method includes forming...
8912052 Semiconductor device and structure  
A semiconductor device, including: a first layer including monocrystalline material and first transistors, the first transistors overlaid by a first isolation layer; a second layer including...
8906784 Graphene epitaxied on SiC, with an open band gap and mobility comparable to standard graphene with zero band gap  
A method of manufacturing a modified structure comprising a semiconducting modified graphene layer on a substrate, comprising the subsequent following steps: supply of an initial structure...
8901646 Semiconductor device  
A semiconductor device may include a substrate including an active region defined by a device isolation layer, gate electrodes extending in a first direction on the substrate and spaced apart from...
8901665 Gate structure for semiconductor device  
The present disclosure provides a method of semiconductor fabrication including forming an inter-layer dielectric (ILD) layer on a semiconductor substrate. The ILD layer has an opening defined by...
8900916 Method for manufacturing semiconductor device including oxide semiconductor film  
A highly reliable semiconductor device which includes a thin film transistor having stable electric characteristics, and a manufacturing method thereof. In the manufacturing method of the...
8900918 Graphene channel-based devices and methods for fabrication thereof  
Graphene-channel based devices and techniques for the fabrication thereof are provided. In one aspect, a semiconductor device includes a first wafer having at least one graphene channel formed on...
8895371 Transistor employing vertically stacked self-aligned carbon nanotubes  
A fin structure including a vertical alternating stack of a first isoelectric point material layer having a first isoelectric point and a second isoelectric material layer having a second...
8895339 Reducing MEMS stiction by introduction of a carbon barrier  
A mechanism for reducing stiction in a MEMS device by decreasing an amount of carbon from TEOS-based silicon oxide films that can accumulate on polysilicon surfaces during fabrication is provided....
8896778 Liquid crystal display device  
It is an object to provide a liquid crystal display device including a thin film transistor with high electric characteristics and high reliability. As for a liquid crystal display device...
8889496 Manufacturing method of semiconductor device  
It is an object to provide a manufacturing method of a structure of a thin film transistor including an oxide semiconductor film, in which threshold voltage at which a channel is formed is...
8889564 Suspended nanowire structure  
A mandrel having vertical planar surfaces is formed on a single crystalline semiconductor layer. An epitaxial semiconductor layer is formed on the single crystalline semiconductor layer by...
8883572 Manufacturing method of low temperature poly-silicon TFT array substrate  
A manufacturing method of an LTPS-TFT array substrate is provided. The exemplary method comprises a step of sequentially forming a poly-silicon layer and a data-line-metal layer on a base...
8883573 Isolation for nanowire devices  
The present disclosure relates to the field of fabricating microelectronic devices. In at least one embodiment, the present disclosure relates to forming an isolated nanowire, wherein isolation...
8877568 Methods of making logic transistors and non-volatile memory cells  
Methods of making a logic transistor in a logic region and an NVM cell in an NVM region of a substrate include forming a conductive layer on a gate dielectric, patterning the conductive layer over...
8871583 Semiconductor device and manufacturing method thereof  
A non-planar JFET device having a thin fin structure is provided. A fin is formed projecting upwardly from or through a top surface of a substrate, where the fin has a first semiconductor layer...
8859357 Method for improving device performance using dual stress liner boundary  
An integrated circuit with DSL borders perpendicular to the tranistor gates primarily inside the nwell and with DSL borders parallel to the transistor gates primarily outside the nwell. A method...
8859343 3D semiconductor structure and manufacturing method thereof  
A semiconductor structure includes a plurality of stacked strips on a substrate and a plurality of conductive lines on the stacked strips. The stacked strips and the conductive lines are arranged...
8859358 CMOS transistors, fin field-effect transistors and fabrication methods thereof  
A method is provided for fabricating a transistor. The method includes providing a semiconductor substrate; and configuring a channel region along a first direction. The method also includes...
8859345 Method for fabrication of III-nitride heterojunction semiconductor device  
A III-nitride heterojunction power semiconductor device having a barrier layer that includes a region of reduced nitrogen content.
8846459 Semiconductor device and method for manufacturing the same  
A highly reliable semiconductor device and a method for manufacturing the semiconductor device are provided. The semiconductor device is manufactured with a high yield to achieve high...
8835234 MOS having a sic/sige alloy stack  
A delta doping of silicon by carbon is provided on silicon surfaces by depositing a silicon carbon alloy layer on silicon surfaces, which can be horizontal surfaces of a bulk silicon substrate,...
8829527 Display device and method for manufacturing the same  
The present invention provides a method for manufacturing a highly reliable display device at a low cost with high yield. According to the present invention, a step due to an opening in a contact...
8822998 Organic light emitting display device  
An organic light emitting display device includes a substrate, a plurality of sub-pixels on the substrate, each sub-pixel including a first region configured to emit light and a second region...
8823009 Display device and method for manufacturing the same  
The present invention provides a method for manufacturing a highly reliable display device at a low cost with high yield. According to the present invention, a step due to an opening in a contact...
8815739 FinFET device with a graphene gate electrode and methods of forming same  
One illustrative device disclosed herein includes at least one fin comprised of a semiconducting material, a layer of gate insulation material positioned adjacent an outer surface of the fin, a...
8815663 Method of manufacturing thin film transistor, thin film transistor manufactured using the method, method of manufacturing organic light-emitting display apparatus, and organic light-emitting display apparatus manufactured using the method  
A method of manufacturing a TFT, including forming a buffer layer, an amorphous silicon layer, an insulating layer, and a first conductive layer on a substrate, forming a polycrystalline silicon...
8809131 Replacement gate fin first wire last gate all around devices  
In one aspect, a method of fabricating a nanowire FET device includes the following steps. A wafer is provided. At least one sacrificial layer and silicon layer are formed on the wafer in a stack....
8802509 Configuration of gate to drain (GD) clamp and ESD protection circuit for power device breakdown protection  
A semiconductor power device supported on a semiconductor substrate comprising a plurality of transistor cells each having a source and a drain with a gate to control an electric current...
8796118 Method of producing a three-dimensional integrated circuit  
Method of producing an integrated electronic circuit comprising at least the steps of: producing a substrate comprising at least a first and second layer of semiconductor between which at least a...