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7625770 |
Thin film transistor array substrate and fabricating method thereof
A liquid crystal display and a fabricating method thereof for improving an aperture ratio are disclosed. A liquid crystal display (LCD) according to the present invention includes a gate line, a...
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7598100 |
Manufacturing method of semiconductor integrated circuit device
As the thickness of the card holder for preventing warping of a multilayered wiring substrate 1 is increased, there occurs a problem that a thin film sheet 2 is buried in a card holder and...
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7595229 |
Configurable integrated circuit capacitor array using via mask layers
A semiconductor device having a plurality of layers and a capacitor array that includes a plurality of individual capacitors. At least one of the plurality of layers in the semiconductor device may...
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7596420 |
Device manufacturing method and computer program product
A method is provided wherein a lithographic projection apparatus is used to print a series of test patterns on a test substrate to measure printed critical dimension as function of exposure dose...
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7589363 |
Fuse structures, methods of making and using the same, and integrated circuits including the same
A structure configured to disconnect circuit elements. The structure generally includes a dielectric layer over a light-absorbing structure, and a lens over the dielectric layer and the...
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7569428 |
Method for manufacturing semiconductor device, semiconductor device and apparatus comprising same
Disclosed is a method for manufacturing a method for manufacturing a semiconductor device which comprises a substrate, a semiconductor chip and a plurality of terminals. The method comprises...
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7567735 |
Optical device wafer, and optical device chip and method for manufacturing the same
An optical device wafer includes: a plurality of chip regions; and at least one connecting section, wherein the chip region includes a first semiconductor layer of a first conductivity type, an...
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7562327 |
Mask layout design improvement in gate width direction
In a cell comprising an N well and a P well, a distance SP 04 from a center line of a contact N-type region to an N well end of the N well is set to be a distance which causes a transistor not to...
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7553703 |
Methods of forming an interconnect structure
Semiconductor devices having conductive lines with extended ends and methods of extending conductive line ends by a variable distance are disclosed. An end of a first conductive feature of an...
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7540970 |
Methods of fabricating a semiconductor device
Methods of fabricating a semiconductor device are provided. Methods of forming a finer pattern of a semiconductor device using a buffer layer for retarding, or preventing, bridge formation between...
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7538438 |
Substrate warpage control and continuous electrical enhancement
A dummy circuit pattern is disclosed on a surface of a substrate for a semiconductor package. The dummy circuit pattern includes a plurality of straight line segments and a plurality of interrupt...
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7535035 |
Cross-point nonvolatile memory devices using binary metal oxide layer as data storage material layer and methods of fabricating the same
A cross-point nonvolatile memory device using a binary metal oxide layer as a data storage material layer includes spaced apart doped lines disposed in a substrate. Spaced apart upper electrodes...
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7533361 |
System and process for manufacturing custom electronics by combining traditional electronics with printable electronics
A system and process for manufacturing custom printed circuit boards on pre-provided substrates, wherein the substrate is pre-provided with standard integrated circuits. The standard integrated...
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7531852 |
Electronic unit with a substrate where an electronic circuit is fabricated
In an electronic unit with a substrate, a control circuit is mounted on the substrate and is configured to execute an operation related to a load. A package encapsulates the control circuit and the...
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7531388 |
Electrically programmable fuse structures with narrowed width regions configured to enhance current crowding and methods of fabricating thereof
Electrically programmable fuse structures and methods of fabrication thereof are presented, wherein a fuse includes first and second terminal portions interconnected by an elongate fuse element....
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7524754 |
Interconnect shunt used for current distribution and reliability redundancy
In one embodiment of the invention, an integrated circuit package includes an integrated circuit, a package substrate, a first bump, a second bump and a shunt to provide for current distribution...
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7521349 |
Fundamental cell, semiconductor integrated circuit device, wiring method and wiring apparatus
The present invention provides a fundamental cell, semiconductor integrated circuit device, wiring method and wiring apparatus for designing a layout of a functional circuit block or a...
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7504320 |
Method for manufacturing a tag integrated circuit flexible board
In a method for manufacturing a tag integrated circuit flexible board, first a copper foil, an insulating heat-conductive material and a base material coated with an adhesive layer are prepared....
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7494849 |
Methods for fabricating multi-terminal phase change devices
Phase change devices, and particularly multi-terminal phase change devices, include first and second active terminals bridged together by a phase-change material whose conductivity can be modified...
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7489072 |
Organic electroluminescence display device and method for fabricating the same
An organic electroluminescence display device and a method for fabricating the same is described. The organic electroluminescence display device comprises pixels defined by a gate line and a data...
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7446038 |
Interlayer interconnect of three-dimensional memory and method for manufacturing the same
An interlayer interconnect structure of a three-dimensional memory includes memory cell groups, each composed of a plurality of memory cells and connected to their respective selection transistors,...
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7427536 |
High density stepped, non-planar nitride read only memory
A non-planar, stepped NROM array is comprised of cells formed in trenches and on pillars that are etched into a substrate. Each cell has a plurality of charge storage regions in its nitride layer...
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7422945 |
Cell based integrated circuit and unit cell architecture therefor
In a unit cell, a first conductive type active region and a second conductive type active region are provided. Those two active regions extend in a first direction. Each of the active regions have...
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7418692 |
Method for designing structured ASICS in silicon processes with three unique masking steps
A multi-function core base cell includes a set of functional microcircuits. These microcircuits are used to design a Library of Logic Function Macros. The functional macros consisting of one or...
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7398280 |
Method and system for manufacturing integrated circuits meeting special customer requirements with multiple subcontractors in remote locations
Disclosed are a method and system for manufacturing integrated circuits meeting special customer requirements with multiple subcontractors in remote locations. The disclosed manufacturing...
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7393755 |
Dummy fill for integrated circuits
A method and system are described to reduce process variation as a result of the electrochemical deposition (ECD), also referred to as electrochemical plating (ECP), and chemical mechanical...
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7393737 |
Semiconductor device and a method of manufacturing the same
A semiconductor device which, in spite of the existence of a dummy active region, eliminates the need for a larger chip area and improves the surface flatness of the semiconductor substrate. In the...
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7374986 |
Method of fabricating field effect transistor (FET) having wire channels
In a field effect transistor (FET), and a method of fabricating the same, the FET includes a semiconductor substrate, source and drain regions formed on the semiconductor substrate, a plurality of...
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7364951 |
Nonvolatile semiconductor memory device and method for manufacturing the same
A method for manufacturing a nonvolatile semiconductor memory device having a step of forming a first gate electrode on a peripheral circuit portion and a second gate electrode on a memory cell...
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7358955 |
Liquid crystal display for mobile phone
There is disclosed a liquid crystal display for a mobile phone that is adaptive for minimizing horizontal flicker. A liquid crystal display for a mobile phone according to an embodiment of the...
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7344923 |
NROM semiconductor memory device and fabrication method
An NROM semiconductor memory device and fabrication method are disclosed. According to one aspect, a method for fabricating an NROM semiconductor memory device can include providing a plurality of...
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7344924 |
Fuse structures, methods of making and using the same, and integrated circuits including the same
A fuse structure, an integrated circuit including the structure, and methods for making the structure and (re)configuring a circuit using the fuse. The fuse structure generally includes (a) a...
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7341891 |
Method for manufacturing a memory cell for modification of revision identifier in an integrated circuit chip
A method for making a memory cell for reducing the cost and complexity of modifying a revision identifier (ID) or default register values associated with an integrated circuit (IC) chip, and a...
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7338824 |
Method for manufacturing FFS mode LCD
In the present invention, a method for manufacturing a liquid crystal display is provided. The method includes steps of providing a substrate, forming a first metal layer on the substrate, etching...
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7335536 |
Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices
A method for fabricating a low resistance, low inductance device for high current semiconductor flip-chip products. A structure is produced, which comprises a semiconductor chip with metallization...
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7332378 |
Integrated circuit memory system with dummy active region
An integrated circuit memory system including a substrate formed with equidistant spaced shallow trench isolation regions. Forming active regions and dummy active regions within the substrate...
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7332377 |
Manufacturing method with self-aligned arrangement of solid body electrolyte memory cells of minimum structure size
The object of providing a method for manufacturing solid body electrolyte memory cells or CB memory cells, respectively, which is suited for the simplified manufacturing of highly dense arrays with...
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7326595 |
Semiconductor integrated circuit and method of redesigning same
A semiconductor integrated circuit has a first functional block, a second functional block, and a signal line routed from the first functional block to the second functional block in a metal...
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7320904 |
Manufacturing method for non-active electrically structures in order to optimize the definition of active electrically structures in an electronic circuit integrated on a semiconductor substrate and corresponding circuit
A method for manufacturing electrically non-active structures for an electronic circuit integrated on a semiconductor substrate is provided, with the electronic circuit including first and second...
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7306977 |
Method and apparatus for facilitating signal routing within a programmable logic device
Method and apparatus for facilitating signal routing within a programmable logic device having routing resources is described. In an example, the routing resources are formed into groups where, for...
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7294534 |
Interconnect layout method
In an interconnect layout 100, the first gate pattern, the second gate pattern, the first dummy pattern, and the second dummy pattern are arranged so that, if a wavelength of a light used to expose...
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7247553 |
Method of manufacturing a semiconductor device
To ensure the connectability of wiring lines in a semiconductor device having terminals or reservoirs, plural terminals of a cell, which constitutes the semiconductor device, are each formed in a...
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7233017 |
Multibit phase change memory device and method of driving the same
A multibit phase change memory device structured such that a plurality of individual phase change memory devices are aligned in a plan area or vertically, and a method of driving the same are...
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7214551 |
Multiple gate electrode linewidth measurement and photoexposure compensation method
A method for fabricating a semiconductor product first provides an embedded semiconductor product comprising: (1) a logic region having formed therein a logic field effect transistor device; (2) a...
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7208350 |
Method and device for producing layout patterns of a semiconductor device having an even wafer surface
Primitive cells, which are circuit patterns of the constituent elements of a semiconductor device, are arranged in the element formation area of a semiconductor device, and at least one fill cell...
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7202116 |
Thin film transistor substrate for display device and fabricating method thereof
A thin film transistor substrate for a display device having a plurality of thin film transistors and pixel electrodes connected to the thin film transistors, said thin film transistor substrate...
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7186592 |
High performance, integrated, MOS-type semiconductor device and related manufacturing process
An LDMOS device includes elementary MOS cells. The gate structure of the elementary cell includes a first conductor material finger. The LDMOS device includes first metal stripes for contacting...
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7179690 |
High reliability triple redundant latch with voting logic on each storage node
In a preferred embodiment, the invention provides a circuit and method for a high reliability triple redundant latch. Three settable memory elements set an identical logical value into each...
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7176535 |
Thin film transistor array gate electrode for liquid crystal display device
The present invention discloses a TFT array substrate that is fabricated using a four-mask process and a method of manufacturing that TFT array substrate. The gate line and gate electrode of the...
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7163847 |
Method of making circuitized substrate
A method of making a circuitized substrate in which the substrate's commoning bar, used during the plating of the circuitry on the substrate, is terminated from the various conductors using a...
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