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8440486 Electrophoretic display device and method of fabricating the same  
A method of fabricating an electrophoretic display device includes forming a gate line along a direction, a gate electrode extending from the gate line, a common line parallel to the gate line, and...
8438724 Method for producing substrate for mounting device and method for producing a semiconductor module  
Methods for producing a substrate for mounting a device and for producing a semiconductor module are provided. The methods comprise preparing a metal plate on one major surface of which a plurality...
8431446 Via formation for cross-point memory  
Embodiments disclosed herein may relate to electrically conductive vias in cross-point memory array devices. In an embodiment, the vias may be formed using a lithographic operation also utilized to...
8426257 Method for fabricating semiconductor device  
A method for fabricating a semiconductor device includes forming a fuse over a substrate, the fuse having a barrier layer, a metal layer, and an anti-reflective layer stacked, selectively removing...
8426859 Semiconductor device and light-emitting device using the same  
A semiconductor device includes a semiconductor layer, a first insulating layer, a gate electrode which is formed on the first insulating layer and has a portion overlapping a channel region of the...
8426304 Methods of manufacturing a vertical type semiconductor device  
Methods of manufacturing a semiconductor device include forming a stopping layer pattern in a first region of a substrate. A first mold structure is formed in a second region of the substrate that...
8421187 Semiconductor device and manufacturing method thereof  
A first insulating film includes five extension lines formed between connection pad portions of adjacent two predetermined wiring lines. The first insulating film also includes peripheral portions...
8420452 Fabrication method of leadframe-based semiconductor package  
A leadframe-based semiconductor package and a fabrication method thereof are provided. The leadframe-based semiconductor package includes a chip implanted with a plurality of first and second...
8409887 Organic light emitting diode display device and method of fabricating the same  
An organic light emitting diode (OLED) display device and a method of fabricating the same are provided. The OLED display device includes a substrate having a thin film transistor region and a...
8411477 Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells  
An array of vertically stacked tiers of non-volatile cross point memory cells includes a plurality of horizontally oriented word lines within individual tiers of memory cells. A plurality of...
8405086 Pixel structure of display panel and method for manufacturing the same  
The present invention provides a pixel structure of a display panel and a method for manufacturing the same. The method comprises the following steps: forming a first transistor and a second...
8399307 Interconnects for stacked non-volatile memory device and method  
A method of forming a memory device includes providing a substrate having a surface region, defining a cell region and first and second peripheral regions, sequentially forming a first dielectric...
8395935 Cross-point self-aligned reduced cell size phase change memory  
A programmable memory array is disclosed in which the phase change memory cells are self-aligned at the access devices and at the cross-points of the bit lines and the word lines. A method for...
8389316 Strain bars in stressed layers of MOS devices  
A semiconductor structure includes an active region; a gate strip overlying the active region; and a metal-oxide-semiconductor (MOS) device. A portion of the gate strip forms a gate of the MOS...
8389315 Method for manufacturing display device  
A method for manufacturing a display device is provided. The method includes forming a circuit part; forming a planarization insulating layer on the circuit part; forming a separator in an area...
8372696 Repair method and active device array substrate  
A repair method for repairing an active device array substrate is provided. The active device array substrate includes a substrate, scan lines, data lines, active devices, pixel electrodes, and...
8372742 Method, system, and apparatus for adjusting local and global pattern density of an integrated circuit design  
An integrated circuit (IC) design method providing a circuit design layout having a plurality of functional blocks disposed a distance away from each other; identifying a local pattern density to...
8367482 Methods for fabricating contacts of semiconductor device structures and methods for designing semiconductor device structures  
Methods for fabricating contacts of semiconductor device structures include forming a dielectric layer over a semiconductor substrate with active-device regions spaced at a first pitch, forming a...
RE43948 Formation of contacts on semiconductor substrates  
Embodiments of the invention are concerned with a method of manufacturing a radiation detector having one or more conductive contacts on a semiconductor substrate, and comprise the steps of:...
8361268 Method of transferring device  
A method of transferring a device includes the steps of: arranging a first substrate, on which a device is provided with a release layer having a planar shape equal to or smaller than the device...
8358671 Photonic clock stabilized laser comb processing  
Processing a workpiece with a laser includes generating laser pulses at a first pulse repetition frequency. The first pulse repetition frequency provides reference timing for coordination of a beam...
8349662 Integrated circuit having memory cell array, and method of manufacturing same  
An integrated circuit device (e.g., a logic device or a memory device) having (i) a memory cell array which includes a plurality of memory cells (for example, memory cells having electrically...
8338812 Vertical spacer electrodes for variable-resistance material memories and vertical spacer variable-resistance material memory cells  
Variable-resistance memory material cells are contacted by vertical bottom spacer electrodes. Variable-resistance material memory spacer cells are contacted along the edge by electrodes. Processes...
8338225 Method to reduce a via area in a phase change memory cell  
A memory cell structure and method to form such structure. The method partially comprised of forming a via within an oxidizing layer, over the center of a bottom electrode. The method includes...
8339849 Semiconductor device and layout method for the semiconductor device  
Provided is a semiconductor device comprising: a plurality of bit line patterns; a plurality of pad patterns that are respectively connected to the plurality of bit line patterns; and at least one...
8338237 Metal-induced crystallization of amorphous silicon in thin film transistors  
The invention provides a method for forming thin film transistors including a polycrystalline semiconducting film. The method comprises depositing a first layer of amorphous semiconducting thin...
8338746 Method for processing a memory link with a set of at least two laser pulses  
A set (50) of laser pulses (52) is employed to sever a conductive link (22) in a memory or other IC chip. The duration of the set (50) is preferably shorter than 1,000 ns; and the pulse width of...
8329512 Patterning method for high density pillar structures  
A method of making a device includes forming a first photoresist layer over a sacrificial layer, patterning the first photoresist layer to form first photoresist features, rendering the first...
8330261 Method to manufacture a silicon wafer electronic component protected against the attacks and such a component  
In general, the invention relates to manufacturing a wafer. The method includes manufacturing a wafer that includes a front side and a back side, thinning the wafer down to a thickness suitable for...
8324039 Reduced silicon thickness of N-channel transistors in SOI CMOS devices  
In sophisticated SOI devices, the thickness of the active semiconductor layer in the N-channel transistor may be reduced compared to the P-channel transistor for a given transistor configuration,...
8325529 Bit-line connections for non-volatile storage  
Bit line connections for non-volatile storage devices and methods for fabricating the same are disclosed. At least two different types of bit line connections may be used between memory cells and...
8318566 Method to seperate storage regions in the mirror bit device  
Devices and methods for isolating adjacent charge accumulation layers in a semiconductor device are disclosed. In one embodiment, a semiconductor device comprises a bit line formed in a...
8315064 Apparatus for detecting pattern alignment error  
An apparatus for detecting pattern alignment error includes a first conductive pattern disposed over a first insulation member with a power source applied of the first conductive pattern; a second...
8309416 Semiconductor device with buried bit lines interconnected to one-side-contact and fabrication method thereof  
A semiconductor device with reduced resistance of a buried bit line, and a method for fabricating the same. The method for fabricating a semiconductor device includes etching a semiconductor...
8304297 Active matrix substrate, method of making the substrate, and display device  
An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed...
8293566 Strained layer superlattice focal plane array having a planar structure  
An infrared focal plane array (FPA) is disclosed which utilizes a strained-layer superlattice (SLS) formed of alternating layers of InAs and InxGa1-xSb with 0≦x≦0.5 epitaxially grown on a GaSb sub...
8293575 Manufacturing method of semiconductor device  
The reliability of a semiconductor device is improved. A sealing resin (sealed body) is formed between a sub-substrate (first base member) and a base substrate (second base member) that are...
8288212 Pixel structure of a thin film transistor liquid crystal display and fabricating method thereof  
A method of fabricating a pixel structure of a thin film transistor liquid crystal display is provided. A transparent conductive layer and a first metallic layer are sequentially formed over a...
8288213 Methods of forming memory arrays  
Some embodiments include methods of forming memory arrays. A stack of semiconductor material plates may be patterned to subdivide the plates into pieces. Electrically conductive tiers may be formed...
8278661 Thin film transistor, display device including the same, and method for manufacturing the same  
A display device and a manufacturing method thereof, include a first thin film transistor including a first control electrode, a first semiconductor disposed on the first control electrode, and a...
RE43652 Substrate processing control method and storage medium  
In a substrate processing control method, a first process acquires a first-reflectance-spectrum of a beam reflected from the first-fine-structure and a second-reflectance-spectrum of a beam...
8258020 Interconnects for stacked non-volatile memory device and method  
A method of forming a vertical interconnect for a memory device. The method includes providing a substrate having a surface region and defining a cell region, a first peripheral region, and a...
8252635 Electronic system modules and method of fabrication  
A trace routing method for a multi-layer interconnection circuit includes the steps of providing stacked contacts with trace stubs at input/output pads of said interconnection circuit, and limiting...
8252623 Phase change memory device with alternating adjacent conduction contacts and fabrication method thereof  
A phase change memory device and an associated method of making same are presented. The phase change memory device, includes first wiring lines, second wiring lines, memory cells, and conduction...
8242807 Scalable non-blocking switching network for programmable logic  
A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect a first plurality of conductors to other multiple sets of conductors...
8242578 Anti-fuse device structure and electroplating circuit structure and method  
Disclosed are embodiments of a circuit and method for electroplating a feature (e.g., a BEOL anti-fuse device) onto a wafer. The embodiments eliminate the use of a seed layer and, thereby, minimize...
8241969 Patterning method for high density pillar structures  
A method of making a device includes forming a first photoresist layer over a sacrificial layer, patterning the first photoresist layer to form first photoresist features, rendering the first...
8237213 Memory arrays having substantially vertical, adjacent semiconductor structures and the formation thereof  
Memory arrays and methods of their formation are disclosed. One such memory array has memory-cell strings are formed adjacent to separated substantially vertical, adjacent semiconductor structures,...
8222091 Damascene method of making a nonvolatile memory device  
A method of making a device includes providing a first device level containing first semiconductor rails separated by first insulating features, forming a sacrificial layer over the first device...
8203173 Semiconductor integrated circuit  
A semiconductor integrated circuit has: a substrate; a basic logic cell placed on the substrate and configured to function as a part of a logic circuit; and a dummy cell placed on the substrate and...