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9024374 3D memory array with improved SSL and BL contact layout  
A 3D memory device includes a plurality of ridges, in some embodiments ridge-shaped, in the form of multiple strips of conductive material separated by insulating material, arranged as bit lines...
9024288 Array substrate and manufacturing method thereof, display device  
Embodiments of the present invention provide an array substrate, a manufacturing method thereof and a display device. The manufacturing method of an array substrate, comprising: forming a gate...
9018694 Methods and systems for gate dimension control in multi-gate structures for semiconductor devices  
Methods and systems are disclosed for gate dimension control in multi-gate structures for integrated circuit devices. Processing steps for formation of one or more subsequent gate structures are...
9018046 Area-efficient distributed device structure for integrated voltage regulators  
An area efficient distributed device for integrated voltage regulators comprising at least one filler cell coupled between a pair of PADS on I/O rail of a chip and at least one additional filler...
9012270 Metal layer enabling directed self-assembly semiconductor layout designs  
Methods for forming a DSA pre-patterned semiconductor transistor layout and the resulting devices are disclosed. Embodiments may include forming a pre-patterned transistor layout by directed...
9012905 Semiconductor device including transistor comprising oxide semiconductor and method for manufacturing the same  
A transistor including an oxide semiconductor with favorable electric characteristics and a manufacturing method thereof are provided. A semiconductor device includes a transistor. The transistor...
9012915 Organic light-emitting display apparatus and method of manufacturing the same  
An organic light-emitting display apparatus includes a buffer layer that is on a substrate and includes nanoparticles including nickel (Ni), a pixel electrode on the buffer layer, an organic...
RE45481 Interconnector line of thin film, sputter target for forming the wiring film and electronic component using the same  
An interconnector line of thin film comprising 0.001 to 30 at % of at least one kind of a first element capable of constituting an intermetallic compound of aluminum and/or having a higher standard...
9012918 Semiconductor device including oxide semiconductor  
The threshold voltage is shifted in a negative or positive direction in some cases by an unspecified factor in a manufacturing process of the thin film transistor. If the amount of shift from 0 V...
9012318 Etching polysilicon  
Methods and compositions for etching polysilicon including aqueous compositions containing nitric acid and ammonium fluoride, and apparatus formed thereby.
8999750 Semiconductor device  
A semiconductor device includes an oxide semiconductor layer provided over a substrate having an insulating surface; a gate insulating film covering the oxide semiconductor layer; a first...
8993430 Manufacturing method of semiconductor device and semiconductor device  
According to one embodiment, a first core pattern is formed in a wiring portion on a process target film and a second core pattern, which is led out from the first core pattern and includes an...
8993377 Semiconductor device and method of bonding different size semiconductor die at the wafer level  
A semiconductor wafer has first and second opposing surfaces. A plurality of conductive vias is formed partially through the first surface of the semiconductor wafer. The semiconductor wafer is...
8987696 Resistance change memory and method of manufacturing the same  
According to one embodiment, a resistance change memory includes a first interconnect line extending in a first direction, a second interconnect line extending in a second direction intersecting...
8987027 Two doping regions in lightly doped drain for thin film transistors and associated doping processes  
A method is provided for fabricating thin-film transistors (TFTs) for an LCD having an array of pixels. The method includes depositing a first photoresist layer over a portion of a TFT stack that...
8987066 Processing unit comprising integrated circuits including a common configuration of electrical interconnects  
A processing unit comprises a plurality of individual integrated circuits (ICs) electrically connected to one another via a common configuration of electrical interconnects (e.g., through-silicon...
8980654 Ion implantation method and ion implantation apparatus  
The ion implantation method includes setting an ion beam scanning speed and a mechanical scanning speed of an object during ion implantation using hybrid scan in advance and implanting ions based...
8980731 Methods of forming a semiconductor device  
Methods of forming a semiconductor device are provided. The methods may include forming first and second layers that are alternately and repeatedly stacked on a substrate, and forming an opening...
8969152 Field-effect transistor (FET) with source-drain contact over gate spacer  
A field-effect transistor (FET) and methods for fabricating such. The FET includes a substrate having a crystalline orientation, a source region in the substrate, and a drain region in the...
8962475 Multi-layer circuit substrate fabrication method providing improved transmission line integrity and increased routing density  
An integrated circuit substrate is designed and fabricated with a selectively applied transmission line reference plane metal layer to achieve signal path shielding and isolation, while avoiding...
8963210 Standard cell for integrated circuit  
An integrated circuit (IC) cell may include first and second semiconductor regions, and parallel electrically conductive lines extending above the first and second semiconductor regions. The IC...
8957512 Oversized interposer  
An embodiment of an interposer is disclosed. For this embodiment of the interposer, a first circuit portion is created responsive to a first printing region. A second circuit portion is created...
8951862 Damascene word line  
The technology relates to a damascene word line for a three dimensional array of nonvolatile memory cells. Conductive lines such as silicon are formed over stacked nonvolatile memory structures....
8951832 Variable-resistance material memories and methods  
Variable-resistance memory material cells are contacted by vertical bottom spacer electrodes. Variable-resistance material memory spacer cells are contacted along the edge by electrodes. Processes...
8945961 Organic light-emitting display device and method of manufacturing the same  
In an organic light-emitting display device and a method of manufacturing the organic light-emitting display device, the method includes forming thin film transistors (TFTs) on a substrate; and...
8945997 Integrated circuits having improved split-gate nonvolatile memory devices and methods for fabrication of same  
Integrated circuits and methods for fabricating integrated circuits are provided. An exemplary method for fabricating an integrated circuit having a split-gate nonvolatile memory device includes...
8945996 Methods of forming circuitry components and methods of forming an array of memory cells  
A method of forming circuitry components includes forming a stack of horizontally extending and vertically overlapping features. The stack has a primary portion and an end portion. At least some of...
8945999 SRAM cell with different crystal orientation than associated logic  
An integrated circuit containing logic transistors and an array of SRAM cells in which the logic transistors are formed in semiconductor material with one crystal orientation and the SRAM cells are...
8945998 Programmable semiconductor interposer for electronic package and method of forming  
Various structures of a programmable semiconductor interposer for electronic packaging are described. An array of semiconductor devices having various values is formed in the interposer. A user can...
8936975 Touch panel, TFT-LCD array substrate and manufacturing method thereof  
A touch display comprising a first substrate formed with a common electrode; a second substrate formed with a gate line and a data line, wherein a first thin film transistor and a pixel electrode...
8934258 Motor controller  
A motor controller comprising multiple types of interfaces assigned automatically, including a mother circuit board and a daughter circuit board. The daughter circuit board is plugged into the...
8932912 One-time programmable device  
According to one embodiment, a one-time programmable (OTP) device having a lateral diffused metal-oxide-semiconductor (LDMOS) structure comprises a pass gate including a pass gate electrode and a...
8932911 Integrated circuits and methods for fabricating integrated circuits with capping layers between metal contacts and interconnects  
Integrated circuits and methods for fabricating integrated circuits are provided. In an exemplary embodiment, a method for fabricating integrated circuits includes forming a metal contact structure...
8927346 Electrically and/or thermally actuated device  
An electrically, thermally, or electrically and thermally actuated device is disclosed herein. The device includes a substrate, a first electrode established on the substrate, an active region...
8927417 Semiconductor package signal routing using conductive vias  
A mechanism is provided by which signal travel distance within and between semiconductor device packages is reduced and substrate size and complexity can be reduced. This capacity is provided by...
8921898 Device including an array of memory cells and well contact areas, and method for the formation thereof  
A device includes an array of a plurality of memory cells, at least one N-well contact area and at least one P-well contact area. The memory cells are arranged in a plurality of rows and a...
8921165 Elimination of silicon residues from MEMS cavity floor  
The present invention generally relates to a MEMS device in which silicon residues from the adhesion promoter material are reduced or even eliminated from the cavity floor. The adhesion promoter is...
8921995 Integrated circuit package including a three-dimensional fan-out/fan-in signal routing  
An integrated circuit (IC) package is disclosed comprising a substrate including a plurality of substrate contacts; a semiconductor die including a plurality of die contacts; and a plurality of...
8912515 Manufacturing method for pipe-shaped electrode phase change memory  
A method for manufacturing a memory cell device includes forming a bottom electrode comprising a pipe-shaped member, a top, a bottom and sidewalls having thickness in a dimension orthogonal to the...
8906743 Semiconductor device with molded casing and package interconnect extending therethrough, and associated systems, devices, and methods  
Methods for making semiconductor devices are disclosed herein. A method configured in accordance with a particular embodiment includes forming a spacer material on an encapsulant such that the...
8907317 Silicon based nanoscale crossbar memory  
The present application describes a crossbar memory array. The memory array includes a first array of parallel nanowires of a first material and a second array of parallel nanowires of a second...
8900900 Array substrate and manufacturing method thereof  
A manufacturing method of an array substrate includes the following steps. A substrate having pixel region and a peripheral region is provided. A plurality of pixel structures are formed in the...
8901530 Nonvolatile memory device using a tunnel oxide as a passive current steering element  
Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has improved device switching performance and...
8901738 Method of manufacturing an enhanced electromigration performance hetero-junction bipolar transistor  
Semiconductor devices with enhanced electromigration performance and methods of manufacture are disclosed. The method includes forming at least one metal line in electrical contact with a device....
8901526 Variable resistive memory device  
A variable resistive memory device capable of reducing contact resistance by including a contact layer having low contact resistance, the variable resistive memory device including a substrate...
8890233 3D memory array with improved SSL and BL contact layout  
A 3D memory device includes a plurality of ridges, in some embodiments ridge-shaped, in the form of multiple strips of conductive material separated by insulating material, arranged as bit lines...
8883569 Continuous mesh three dimensional non-volatile storage with vertical select devices  
A three-dimensional array adapted for memory elements that reversibly change a level of electrical conductance in response to a voltage difference being applied across them. Memory elements are...
8883568 Method providing radial addressing of nanowires  
Disclosed is a method to construct a device that includes a plurality of nanowires (NWs) each having a core and at least one shell. The method includes providing a plurality of radially encoded NWs...
8878253 Semiconductor devices  
A semiconductor device and method of manufacturing a semiconductor device include a plurality of first active regions and a second active region being formed on a substrate. The second active...
8872324 Distributed semiconductor device methods, apparatus, and systems  
Some embodiments include a device having a number of memory cells and associated circuitry for accessing the memory cells. The memory cells of the device may be formed in one or more memory cell...