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8704353 Thermal management of stacked semiconductor chips with electrically non-functional interconnects  
A method of manufacturing is provided that includes fabricating a first plurality of electrically functional interconnects on a front side of a first semiconductor chip and fabricating a first...
8703562 Manufacturing method of random access memory  
A manufacturing method of a random access memory includes the following steps: providing a semiconductor structure having an array region and a peripheral region; forming a plurality of first...
8704204 Ferroelectric nanoshell devices  
Disclosed herein are nanoscale devices comprising one or more ferroelectric nanoshells characterized as having an extreme curvature in at least one spatial dimension. Also disclosed are...
8698519 Scalable non-blocking switching network for programmable logic  
A L-level permutable switching network (L-PSN) having switches and multiple levels of conductors that are used to connect a first plurality of conductors to other multiple sets of conductors within...
8698119 Nonvolatile memory device using a tunnel oxide as a current limiter element  
Embodiments of the invention generally include a method of forming a nonvolatile memory device that contains a resistive switching memory element that has improved device switching performance and...
8697498 Methods of manufacturing three dimensional semiconductor memory devices using sub-plates  
A method of manufacturing a Three Dimensional (3D) semiconductor memory device can be provided by forming at least one trench in a plate stack structure to divide the plate stack structure into a...
8691633 Metal structure for memory device  
A semiconductor device is provided that includes a substrate, a static random access memory (SRAM) unit cell formed in the substrate, a first metal layer formed over the substrate the first metal...
8685799 RRAM structure at STI with Si-based selector  
An RRAM at an STI region is disclosed with a vertical BJT selector. Embodiments include defining an STI region in a substrate, implanting dopants in the substrate to form a well of a first polarity...
8685798 Methods for forming through vias  
Methods for forming through vias in an integrated circuit package are disclosed. A substrate having a first surface is covered with an encapsulation layer of uncured material; the method includes...
8674333 Variable-resistance material memories and methods  
Variable-resistance memory material cells are contacted by vertical bottom spacer electrodes. Variable-resistance material memory spacer cells are contacted along the edge by electrodes. Processes...
8674356 Electrically measurable on-chip IC serial identifier and methods for producing the same  
An apparatus comprising an integrated circuit, an interconnect layer within said integrated circuit, and one or more connections. The integrated circuit may be configured to provide an electrically...
8673692 Charging controlled RRAM device, and methods of making same  
Disclosed herein is a novel charging controlled RRAM (Resistance Random Access Memory), and various methods of making such a charging controlled RRAM device. In one example, a device disclosed...
8674232 Device-embedded flexible printed circuit board and manufacturing method thereof  
A device-embedded flexible printed circuit board (FPCB) and a method of manufacturing the device-embedded FPCB are provided. The device-embedded FPCB includes: a first conductive layer; a first...
8673669 Method of making a CMOS image sensor and method of suppressing dark leakage and crosstalk for a CMOS image sensor  
A CMOS image sensor, in which an implantation process is performed on substrate under isolation structures each disposed between two adjacent photosensor cell structures. The implantation process...
8669155 Hybrid channel semiconductor device and method for forming the same  
A hybrid channel semiconductor device and a method for forming the same are provided. The method includes: providing a first semiconductor layer, the first semiconductor layer including an NMOS...
8669144 Methods of forming memory arrays  
Some embodiments include methods of forming memory arrays. A stack of semiconductor material plates may be patterned to subdivide the plates into pieces. Electrically conductive tiers may be formed...
8664042 Method for fabrication of configurable systems  
A method to construct configurable systems, the method including: providing a first configurable system including a first die and a second die, where the connections between the first die and the...
8643004 Power diode including oxide semiconductor  
With a non-linear element (e.g., a diode) with small reverse saturation current, a power diode or rectifier is provided. A non-linear element includes a first electrode provided over a substrate,...
8642398 Resistive random access memory and method for manufacturing the same  
A resistive random access memory including, an insulating layer, a hard mask layer, a bottom electrode, a memory cell and a top electrode is provided. The insulating layer is disposed on the bottom...
8637876 Light emitting device and light emitting device package having the same  
Disclosed are a light emitting device and a light emitting device package having the same. The light emitting device includes a plurality of light emitting cells including a first conductive...
8637353 Through silicon via repair  
Methods and systems for altering the electrical resistance of a wiring path. The electrical resistance of the wiring path is compared with a target electrical resistance value. If the electrical...
8637897 Semiconductor light emitting device having multi-cell array and method for manufacturing the same  
A semiconductor light emitting device includes a substrate and a plurality of light emitting cells arranged on the substrate. Each of the light emitting cells includes a first-conductivity-type...
8629006 Hybrid integrated circuits and their methods of fabrication  
The present invention provides architectures for hybrid integrated circuits and methods for producing these hybrid integrated circuits that contain both field programmable gate arrays and mask...
8621746 Method for making phase change memory  
A method for making phase change memory is provided. The method includes following steps. A substrate is provided. A plurality of first row electrode leads and the second row electrode leads is...
8614515 Wiring method for semiconductor integrated circuit, semiconductor-circuit wiring apparatus and semiconductor integrated circuit  
A wiring method for a semiconductor integrated circuit has the steps of, separately from a first layer on which a first signal wiring pattern is mainly formed, laying out a first power-supply...
8610176 Standard cell architecture using double poly patterning for multi VT devices  
An apparatus fabricated using a standard cell architecture including devices having different voltage thresholds may include a first set of polylines associated with a first channel length, where...
8609457 Semiconductor device with DRAM bit lines made from same material as gate electrodes in non-memory regions of the device, and methods of making same  
Generally, the present disclosure is directed to a semiconductor device with DRAM bit lines made from the same material as the gate electrodes in non-memory regions of the device, and methods of...
8603866 Method of manufacturing array substrate for uniform and high quality images  
An array substrate includes a substrate, a gate line on the substrate, a data line crossing the gate line to define a pixel region, a thin film transistor connected to the gate and data lines, a...
8598619 Semiconductor light emitting device having multi-cell array and method for manufacturing the same  
A semiconductor light emitting device includes a substrate and a plurality of light emitting cells arranged on the substrate. Each of the light emitting cells includes a first-conductivity-type...
8587985 Memory array with graded resistance lines  
A memory array with graded resistance lines includes a first set of lines intersecting a second set of lines. A line from one of the sets of lines includes a graded resistance along a length of the...
8575675 Nonvolatile memory device  
A nonvolatile memory device includes a first channel comprising a pair of first pillars vertically extending from a substrate and a first coupling portion positioned under the pair of first pillars...
8575703 Semiconductor device layout reducing imbalance characteristics of paired transistors  
In a semiconductor device having paired transistors, an imbalance in characteristics of the paired transistors is reduced or prevented while an increase in circuit area is reduced or prevented....
8569115 Method of forming a compliant bipolar micro device transfer head with silicon electrodes  
A compliant bipolar micro device transfer head array and method of forming a compliant bipolar micro device transfer array from an SOI substrate are described. In an embodiment, a compliant bipolar...
8569763 Display panel device and method of manufacturing the same  
A display panel device having a structure that is more reliable than that of a conventional display panel device includes: a bank and an opening surrounded by an inclined side wall of the bank; a...
8563942 Multi-beam deflector array means with bonded electrodes  
The invention relates to a multi-beam deflector array means for use in a particle-beam exposure apparatus employing a beam of charged particles, said multi-beam deflector array means having an...
8563438 Method for manufacturing semiconductor device  
A manufacturing method of a semiconductor device of which cost can be suppressed by using a nanoimprinting method is provided. In the invention, a gate insulating film, a conductive film, and a...
8558304 Methods and devices for forming nanostructure monolayers and devices including such monolayers  
Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in...
8551816 Direct edge connection for multi-chip integrated circuits  
The present invention allows for direct chip-to-chip connections using the shortest possible signal path.
8545790 Cross-linked carbon nanotubes  
Cross-linked carbon nanotube arrays forming a three-dimensional structure and methods of use including high thermal conductivity, high strength applications where repeated cycling is known, and...
8541812 Semiconductor device and method of manufacture thereof  
A semiconductor device (10) comprising a bipolar transistor and a field effect transistor within a semiconductor body (1) comprising a projecting mesa (5) within which are at least a portion of a...
8541284 Method of manufacturing string floating gates with air gaps in between  
A method of manufacturing a semiconductor device includes forming a plurality of strings spaced a first distance from each other, each string including first preliminary gate structures spaced a...
8542513 Arrays of vertically stacked tiers of non-volatile cross point memory cells, methods of forming arrays of vertically stacked tiers of non-volatile cross point memory cells, and methods of reading a data value stored by an array of vertically stacked tiers of non-volatile cross point memory cells  
An array of vertically stacked tiers of non-volatile cross point memory cells includes a plurality of horizontally oriented word lines within individual tiers of memory cells. A plurality of...
8535991 Methods and systems involving electrically reprogrammable fuses  
An electrically reprogrammable fuse comprising an interconnect disposed in a dielectric material, a sensing wire disposed at a first end of the interconnect, a first programming wire disposed at a...
8535990 SRAM cell with different crystal orientation than associated logic  
An integrated circuit containing logic transistors and an array of SRAM cells in which the logic transistors are formed in semiconductor material with one crystal orientation and the SRAM cells are...
8535965 Silicon nitride film, a semiconductor device, a display device and a method for manufacturing a silicon nitride film  
The present invention provides a method for forming by plasma CVD a silicon nitride film that can be formed over heat-sensitive elements as well as an electroluminescent element and that has...
8530996 Buck regulator structure comprising high-side and low-side voltage HEMT transistors  
A semiconductor device includes a high-side field-effect transistor including a high-side drain electrode, a high-side gate electrode, and a high-side source electrode; and a first low-side...
8525552 Semiconductor integrated circuit device having a plurality of standard cells for leakage current suppression  
A semiconductor integrated circuit device includes cells A-1, B-1, and C-1 that have the same logic. Cell B-1 has cell width W2 larger than a cell width of cell A-1, but gate length L1 of a MOS...
8519392 Light emitting device, driving method of light emitting device and electronic device  
By controlling the luminance of light emitting element not by means of a voltage to be impressed to the TFT but by means of controlling a current that flows to the TFT in a signal line drive...
8519425 Light-emitting device and manufacturing method thereof  
A light-emitting device includes a substrate and a planarizing film above the substrate. The planarizing film has a recessed portion between non-recessed portions. A bottom electrode layer is above...
8513064 Methods of forming memory arrays  
Some embodiments include methods of forming memory arrays. A stack of semiconductor material plates may be patterned to subdivide the plates into pieces. Electrically conductive tiers may be formed...