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7583247 Gate driver for a display device and method of driving the same  
A gate driver for a display device includes a plurality of shift registers to sequentially generate output signals during a frame period in response to multi-phase clocks; and a dummy clock...
7555094 Counter capable of holding and outputting a count value and phase locked loop having the counter  
Example embodiments may provide a counter capable of outputting a count value after holding the count value for an amount of time and a phase locked loop (PLL) including the counter. The counter...
7430264 Method to reduce transient current swings during mode transitions of high frequency/high power chips  
A method, an apparatus, and a computer program are provided to reduce transient current swings during mode transitions. Traditionally, transient supply voltage fluctuations on a chip account for a...
7353371 Circuit to extract nonadjacent bits from data packets  
A method and device to copy data fields from one or more source packets to one or more result packets. In a SET function, adjacent data fields in a source packet is copied to respective destination...
7353356 High speed, low current consumption FIFO circuit  
A FIFO circuit includes a write counter circuit, a memory circuit, a read counter circuit and a selector circuit. The write counter circuit counts a write clock signal during a valid period of...
7350058 Shift and insert instruction for overwriting a subset of data within a register with a shifted result of another register  
A data processing system 2 is provided which supports shift-and-insert instructions SLI, SRI which serve to shift a source data value by a specified shift amount and then insert bits from that...
7345701 Line buffer and method of providing line data for color interpolation  
A line buffer and a method of providing data to a 3×3 line interpolation processor using the line buffer in an image processing system, such as a digital camera, includes a readable and writable...
7203265 Synchronous counting circuit  
A M by N bit synchronous counter for use in advanced applications is provided. The M by N bit synchronous counter comprises an M by N register configured to receive and store data corresponding to...
7042973 Variable dividing circuit  
To provide a variable dividing circuit having a high operational speed. The variable dividing circuit includes a shift register configured by cascade connection of D-type flip-flops (D 11 , D 12 ,...
7024579 Configurable timing system having a plurality of timing units interconnected via software programmable registers  
The timing system includes a plurality of timing units interconnected to perform a count operation. Software programmable registers interconnect the plurality of timing units, and a control circuit...
6985993 Control register assembly  
A control register assembly controls components to be controlled in an electric circuit. The control register assembly includes a control register. The control register is formed by at least one...
6919794 Circuit for controlling the random character of a random number generator  
A circuit for controlling the random character of a bit flow, including an input shift register receiving the bit flow and having its outputs exploited in parallel, at least one element for...
6898261 Method and apparatus for monitoring event occurrences  
Method and apparatus for monitoring event occurrences, e.g., from an event signal, where a register and a counter are employed. In one embodiment, the register is designed to have a capture bit for...
6857043 Shift register implementations of first-in/first-out memories utilizing a double increment gray code counter  
First-in/first-out (“FIFO”) memory circuitry includes first and second Gray-code-based counters for respectively counting write and read clock signals. A Gray code subtractor subtracts from one...
6845274 Communication port control module for lighting systems  
An improved technique of interfacing a computer lighting device to a control computer is disclosed, wherein a hardware device is interposed between the control computer and the lighting device. The...
6839397 Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits  
A circuit configuration for generating control signals for testing high-frequency synchronous digital circuits, especially memory chips, is described. A p-stage shift register which is clocked at a...
6785389 System for bitstream generation  
A bitstream generator including a plurality of linear feed shift registers (LFSRs) operative to generate a bit stream and including: at least a first LFSR operative, when assigned as a generator...
6728330 Register arrangement for a microcomputer with a register and further storage media  
There is provided a register system of a microcomputer having a register that includes at least one register bit and having an additional storage arrangement allocated to the register and on which...
6683932 Single-event upset immune frequency divider circuit  
A single-event upset immune frequency divider circuit is disclosed. The single-event upset immune frequency divider circuit includes a dual-path shift register, a dual-path multiplexor, and a...
6654439 High speed linear feedback shift register  
An apparatus and method for providing a high speed linear feedback shift register is disclosed. The high speed linear feedback shift register of the present invention comprises multiplexer flip...
6621886 Shift register having fewer lines therein, and liquid crystal display having the same  
A shift register has m stages which store one of two states, where m is an integer more than 1, each stage including clock input terminals at which n-phase clock signals are input, where n is an...
6556646 Shift register  
A shift register for driving a pixel row in a liquid crystal display device. In the shift register, a plurality of stages are connected to a high level voltage source, a low level voltage source...
6501817 Area efficient redundancy multiplexer circuit technique for integrated circuit devices providing significantly reduced parasitic capacitance  
An improved integrated circuit area efficient redundancy multiplexer circuit technique provides similar functionality to conventional CMOS transmission, or “pass” gates while concomitantly...
6490332 High speed, low-power shift register and circuits and methods using the same  
A shift register includes a plurality of shift register stages having inputs and outputs coupled to form a chain. Each stage includes enable and disable control inputs, with an output of a selected...
6483889 Shift register circuit  
A shift register circuit is provided that is adaptive for reducing a swing width of a clock voltage. In the shift register, a plurality of stages, one for each scanning line, generate first driving...
6385274 Watchdog timer for resetting microcomputer before runaway  
A watchdog timer includes an instruction decoder, a delay circuit and a counter. The instruction decoder decodes a watchdog timer initialization instruction regularly executed to generate an...
6316976 Method and apparatus for improving the performance of digital delay locked loop circuits  
A method and apparatus for improving the performance and accuracy of a digital delay locked loop (DDLL) by using a unique correction latch and novel reset mechanism circuit for eliminating DDLL...
6301323 Circuit configuration forming part of a shift register  
A circuit arrangement as part of a shift register is proposed for controlling switch elements arranged in the form of a chain or a matrix, including four clock signals that are phase shifted by...
6301322 Balanced dual-edge triggered data bit shifting circuit and method  
A balanced dual-edge triggered bit shifting circuit includes a clock circuit to generate low skew, or edge-aligned, complementary clock signals, and a shift register that shifts a data bit in...
6205197 Programmable supervisory circuit and applications therefor  
The invention herein provides a supervisory circuit which is adapted to monitor an input signal and produce as an output signal, a parametric signal corresponding to the input signal. The circuit...
6167109 Compact buffer design for serial I/O  
A buffer design for use in digital signal processing for providing parallel shifting of digital data and serial output of the shifted data. The buffer includes an input shift register for receiving...
6157695 Counter for performing multiple counts and method thereof  
A loadable counter circuit which is able to perform multiple contiguous counts. The loadable counter circuit uses a counter for monitoring a number of specified events. A data storage device is...
6088422 One-pin shift register interface  
A register using a single pin to provide two or more control signals (e.g., clock and data signals). The present invention decodes a three state input waveform to generate a clock/write signal and...
6057720 High speed sticky signal generator  
The present invention has been made in view of the above mentioned problem, and the present invention provides a sticky signal generator for rapidly generating a sticky signal with a small layout...
6040725 Dynamically configurable variable frequency and duty cycle clock and signal generation  
A variable clock generator includes a clock multiplier that generates from a reference clock at least two clock signals which are out of phase with each other and a clock divider which receives a...
5982840 Swallow counter with modulus signal output control  
Improved PLL frequency synthesizer circuits, including a novel swallow counter, may be operated at high speeds without experiencing internal delays or malfunctions. The swallow counter supplies a...
5960053 Method and apparatus for generating a clock signal having a frequency equal to an oscillator frequency divided by a fraction  
A method and apparatus for dividing a clock circuit employs a device having a first counting element capable of repetitively incrementing through the first plurality of states and a second counting...
5959526 Milking parlor cow identification correction method  
In a milking parlor having a plurality of stalls for simultaneously milking a plurality of cows, and an identification station for identifying cows passing serially therethrough, an identification...
5926519 Semiconductor integrated circuit including dynamic registers  
This invention relates to the structure of multiple registers used in image signal processing, and aims to simplify the register structure and to reduce the power consumption of the registers and...
5909247 Solid-state image pickup apparatus  
An XY-address solid-state image pickup apparatus comprises a pixel array made up a plurality of pixels two-dimensionally arranged and horizontal and vertical scanning circuits for reading the...
5835551 Variable rate output pulse generator  
The invention provides a high speed variable rate output pulse generating circuit for a semiconductor testing device. The circuit includes a shift register formed of 2n number of flip-flops which...
5828256 Multiplexer comprising an N-stage shift register with each stage composed of a dual output D F/F with one output used for multiplexing and the other for next stage  
For time division multiplexing N bit-parallel circuit input signals at a high bit rate such as higher than 2.4 Gb/s, where N represents a predetermined integer greater than one, a multiplexer...
5790625 Mechanism for enabling an array of numerous large high speed counters  
A large number of frequent events may be accurately counted by employing a shift register. The values of several bit positions within the shift register are logically combined to generate an input...
5781171 Shift register, driving circuit and drive unit for display device  
A shift register has four systems of shift registers for bidirectional scans and normal/redundant lines. The respective systems of shift registers are divided into blocks, so that transmission...
5719913 Pseudo-random number generating circuit and bidirectional shift register  
The scale of a pseudo-random number generating circuit that can select normal or reverse order in which pseudo-random numbers are generated is reduced. The outputs of first and second NOR circuits...
5717351 Integrated circuit  
A start signal is given to an SP - - I/O buffer through a terminal SP1, and its pulse width is controlled by an SP control circuit. A selection signal SEL is given to a selector circuit so that the...
5708689 Circuit for detecting a synchronization byte of a transport stream  
A circuit for detecting a synchronization byte when a decoder of a MPEG 2 system performs a parsing on a transport stream. The circuit includes a shift register for receiving a transport packet, 1...
5706322 Precision time of day counter  
A very high speed counter system of operating at frequencies of up to around 800 MHz provides timing measurements with accuracies on the order of (1/f) seconds where f is the frequency of...
5694444 Testable high count counter  
An integrated circuit counter is capable of implementing a relatively high count while being testable using a relatively low number of clock cycles. A linear-feedback shift register (LFSR) having n...
5684849 Digital circuit for detecting coincidence of two successive words of incoming serial data and a method thereof  
In order to effectively detect coincidence of consecutively transmitted adjacent data words, a shift register is provided for converting incoming serial data to n-bit parallel data. The serial data...
Matches 1 - 50 out of 311 1 2 3 4 5 6 7 >