Matches 351 - 400 out of 724 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >
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6407641 Auto-locking oscillator for data communications  
A method for tuning the frequency of oscillation of a clock signal, comprising the steps of (A) analyzing the rate of an incoming data stream to generate one or more control signals and (B)...
6400129 Apparatus for and method of detecting a delay fault in a phase-locked loop circuit  
There is provided a method and an apparatus for detecting a delay fault in a phase-locked loop circuit. A frequency impulse is applied to the PLL circuit under test as a reference clock, and a...
6396545 Method for digital synchronization of video signals  
A Time Based Correction (TBC) method for digital synchronization of video signals. The time based correction method may be used for satellite based communications to keep clocks synchronized in a...
6384772 Wideband phase locking of low offset frequency sources  
A linear phase detector circuit enables locking of two frequency sources which can operate in the range of 10 GHz with a minimal frequency offset, such as from 0 Hz to 50 KHz. With the frequency...
6385267 System and method for locking disparate video formats  
A system and method for the phase alignment of signals of arbitrary relative frequency are described. A phase difference detector detects a phase difference between a first signal pulse and a...
6377585 Precision reference generation system and method  
An apparatus for generating a precision frequency includes a receiver that tracks a CDMA pilot signal and extracts frequency and phase information. This information is then used by a processor to...
6366628 Method and circuit for sampling timing recovery  
A sampling timing recovering circuit free from being troubled by a frequency error is provided. Such recovering circuit includes a phase locking circuit having a local frequency for processing an...
6356610 System to avoid unstable data transfer between digital systems  
A system to avoid unstable data transfer between digital systems. The present invention includes a system that enables digital systems to communicate while avoiding unstable data transfer, which...
6349122 Apparatus and method for data synchronizing and tracking  
An apparatus and method for synchronizing and tracking an input data stream and for generating a synchronous clock therefrom, comprising means for generating a plurality of clock signals...
6341149 Clock control device for a non-disruptive backup clock switching  
A clock control system in a network switching node including an internal reference clock of a low level Stratum and receiving a plurality of high level Stratum clocks (CLOCK 1 , CLOCK 2 , CLOCK...
6320881 Method, architecture and circuit for locking a data transmission frame  
A circuit comprising a first counter, a second counter, a third counter and a decoder, where the decoder may be configured to present a locked output signal. The first counter may present a first...
6320436 Clock skew removal apparatus  
Digital clock deskew apparatus for synchronising the phase of a first and a second clock signal. The deskew apparatus includes a tapped delay line, selector apparatus and a phase detector.
6298104 Clock recovery circuit  
A clock recovery circuit enables a time for obtaining synchronized state of one pair of gate voltage-controlled oscillator to be shortened in a phase locked loop (PLL). In the clock recovery...
6291979 Apparatus for and method of detecting a delay fault  
There is provided a method of and an apparatus for detecting delay faults in phase-locked loop circuits. A frequency impulse is applied to a phase-locked loop circuit under test as the reference...
6292521 Phase lock device and method  
A phase lock device and method applicable to a data transmission system, particularly to a high speed transmission system are provided. Based on that the optimum operation margin for delaying data...
6285726 10/100 mb clock recovery architecture for switches, repeaters and multi-physical layer ports  
A clock recovery architecture for recovering clock and serial data from an incoming data stream of a local area network station. A phase picker architecture augmented by a phase interpolator is...
6278755 Bit synchronization circuit  
A bit synchronization circuit extracts the central phase of an eye opening irrespective of a jitter distribution of input data to maintain an optimum timing adjustment margin. The bit...
6266381 Frequency control arrangement  
In a frequency control arrangement 200 of the type comprising an oscillator 270, a mark or space counter 210, a frequency detector 220 and an error signal calculator 230-260, 290 and in which it is...
6263035 System and method for adjusting a phase angle of a recovered data clock signal from a received data signal  
A system for adjusting a phase angle of a recovered data clock signal from a received data signal includes a plurality of counters and a phase state machine. Each counter within the plurality of...
6263032 Phase detector estimator  
A phase detector for a timing control loop provided in a signal sampling system to control taking samples by a sampler of input signals provided to a signal sampling system to result in a signal...
6259754 Phase frequency detection circuit and method for liquid crystal display  
A phase frequency detection circuit of a phase locked loop (PLL) for liquid crystal display which compares a phase between an external synchronous signal and an internal synchronous signal from the...
6256362 Frequency acquisition circuit and method for a phase locked loop  
A circuit (14) for aiding proper frequency lock in a phase locked loop (12) includes a phase detector (40) adapted for receiving an input signal and an oscillator output signal from the phase...
6249557 Apparatus and method for performing timing recovery  
A timing recovery circuit is disclosed that prevents phase error over-compensation. The timing recovery circuit includes a phase scanner for determining when phase error over-compensation has...
6246737 Apparatus for measuring intervals between signal edges  
An apparatus for measuring a time interval between a start signal edge and a stop signal edge provides a stable clock signal as input to a delay line formed by a series of similar logic gates. The...
6240127 Method for reducing interference, and synthesizer arrangement  
The invention relates to a method for reducing interfering signals from an output signal of a digital synthesizer arrangement and to a synthesizer arrangement which comprises a reception means (10)...
6218868 Phase comparator  
A phase comparator that is configured with a fewer number of gates in an ECL circuit configuration as compared to conventional phase comparator circuits. The phase comparator also operates with...
6184733 Clock synchronizing circuit  
A clock synchronizing circuit provides reduced power consumption. A first phase comparator compares an external clock signal delayed for a predertermined time with a feedback clock signal to detect...
6177959 Circuit and method for generating a clock signal synchronized with time reference signals associated with television signals  
A clock generation circuit for use in a television system displaying images encoded in television signals and images represented by network application data. The clock generation circuit generates...
6169773 System for synchronizing a block counter in a radio-data-system (RDS) receiver  
A device for synchronization of a block counter in an RDS receiver, the decoder of which, after synchronization has been effected, is capable of performing an error correction in the received bits....
6167101 Apparatus and method for correcting a phase of a synchronizing signal  
The present invention discloses an apparatus and a method for correcting the phase of a synchronizing signal. A best clock timing on latching the data input can be achieved by the apparatus and the...
6157691 Fully integrated phase-locked loop with resistor-less loop filer  
A phase-locked loop includes a phase detector, a charge pump, a resistor-less loop filter and a voltage-controlled oscillator ("VCO"). The phase detector has a reference input, a feedback input,...
6154073 Delay locked loop device of the semiconductor circuit  
Delay Locked Loop device generates an internal clock by receiving an external clock. Multiplexer is provided to receive N delay signals outputted from the first to Nth delay elements which receives...
6154508 Method and system for rapidly achieving synchronization between digital communications systems  
A clock synchronization circuit for synchronizing a first communications device and a second communications device to enable digital communication between the devices. The clock synchronization...
6151356 Method and apparatus for phase detection in digital signals  
The invention provides an improved method and apparatus for detecting the phase difference between a digital data signal and a clock signal. By ensuring that no pulse in the output phase signal is...
6144708 Phase-locked loop circuit with equalizer and phase locking method  
A phase-locked loop circuit, which is used in a radio data communication terminal of the type that obtains a transmission line characteristic during a preamble period in a narrow band modulation...
6128357 Data receiver having variable rate symbol timing recovery with non-synchronized sampling  
An adaptable, variable rate symbol timing recovery system for a digital sal receiver comprises an analog to digital (A-D) signal converter having analog signal input and digital data signal output...
6125158 Phase locked loop and multi-stage phase comparator  
The disclosure describes a multi-stage phase comparator and a phase-locked loop incorporating such a comparator. The comparator measures a phase difference between a reference signal and an output...
6115438 Method and circuit for detecting a spurious lock signal from a lock detect circuit  
A method and circuit for detecting a spurious lock signal from a lock detect circuit are disclosed. The method includes generating a lock signal (16, 58, 84) having two states: lock and unlock. The...
6097766 Timing phase synchronization detecting circuit and demodulator  
A demodulator is made compact, and with a simple circuit arrangement, and also having a better bit error rate characteristic. A timing phase synchronization detecting circuit 219 judges any one of...
6088402 QAM spread spectrum demodulation system  
A demodulation arrangement is disclosed which comprises a mixing circuit for deriving in-phase (I) and quadrature (Q) signals in a digital form from a received signal. The I and Q signals can then...
6088414 Method of frequency and phase locking in a plurality of temporal frames  
A frequency and phase locking method for fine phase locking of a plurality of temporal frames, such as synchronous optical network (SONET) frames, includes the steps of fine phase tracking of the...
6084933 Chip operating conditions compensated clock generation  
A clock generating system used to generate a clock signal which compensates for chip operating conditions. The system includes a delay line oscillator and a reference clock which determines the...
6081572 Lock-in aid frequency detector  
Circuit and method for generating a signal for use in locking a second signal on a first signal. The first and second signals have an associated frequency. A first beat note signal and a second...
6072846 Method and apparatus for distributing a clock signal to synchronous memory elements  
A clock supply device for distributing a source clock signal to memory elements in a synchronous memory system reduces skew and improves accuracy by transmitting a first clock signal from a...
6067334 Device for and method of aligning in time digital signals, for example a clock signal and data stream  
A device and a method for aligning in time two essentially isochronous digital signals are provided, in which a plurality (2 n ) of replicas (CK1-CK4) of the first signal (CKIN), separated by a...
6067328 High precision hardware carrier frequency and phase aiding in a GPS receiver  
A GPS system (12) including an antenna (12), a GPS receiver (14), and a baseband subsystem (16) is disclosed. The receiver (14) includes a reference clock (20), a down converter (22), and a...
6028902 Clock phase detecting circuit  
A clock phase detecting circuit is provided which is arranged in a receiving section of a multiplex radio apparatus. Difference detecting unit detects the difference between input and output...
6016069 Attenuating systems and methods for acquiring synchronization in phase locked loops  
A phase locked loop includes a controlled oscillator that is responsive to a control signal to generate an output signal, the frequency of which is a function of the control signal. A phase...
6014417 On-chip phase step generator for a digital phase locked loop  
A method and circuitry are provided for generating a phase shift in the recovered clock in a high speed, digital data recovery phase locked loop. Since phase step injection can be done in a closed...
6002709 Verification of PN synchronization in a direct-sequence spread-spectrum digital communications system  
In a direct sequence spread spectrum digital communication receiver, a system and method for recovering and verifying the timing or phase of a pseudo-random noise (PN) sequence used for despreading...
Matches 351 - 400 out of 724 < 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >