Matches 201 - 250 out of 365 < 1 2 3 4 5 6 7 8 >
Match Document Document Title
4876697 Three-part decoder circuit  
Novel electrical circuits suitable for decoding an encoded binary data stream. The electrical circuits include digital circuitry, and are preferably employed to decode magnetic information or...
4843617 Apparatus and method for synchronizing a communication system  
Apparatus and method for synchronizing a local clock signal with a remote clock signal. The local clock signal is divided by a digital counter for generating a phase increment signal. The phase...
4841548 Method and apparatus for extracting an auxiliary data clock from the clock and/or the clock-phase of a synchronous or plesiochronic digital signal  
A method and apparatus for recovering the clock and/or the clock phase of a synchronous or plesiochronic digital signal provide that logic circuits in gate arrays or cell arrays recover the clock....
4841551 High speed data-clock synchronization processor  
The present invention generates a data clock for data processing circuitry by developing an optimum locally generated clock signal which is selected with each received data message. This is...
4833695 Apparatus for skew compensating signals  
A clock signal is transmitted to nodes of each of several interconnected circuits through a separate adjustable delay circuit, the time delay of each delay circuit being adjusted so that the clock...
4809304 Method of extracting a synchronous clock signal from a single- or double-density coded signal, and apparatus for performing the method  
The invention relates to a method for extracting a synchronous clock signal from a single- or double-density coded signal via a modulation frequency corresponding to the time interval T separating...
4797951 Parallel optical data transmission system  
Data transmission apparatus is described in which data is transmitted over a communication link consisting of a bundle of optical fibres. Each message is transmitted as a sequence of groups of data...
4788695 System for decoding self-clocking data signals  
A coherent detection and decoding circuit coherently recovers data embedded in a self-clocking data signal by recovering the clock in one integrate and dump circuit and recovering the data in a...
4787096 Second-order carrier/symbol sychronizer  
A synchronizer circuit for recovering a clock signal from synchronizing strobes derived from a modulated dibit phase shift keying (PSK) input signal. A phase detector samples the output of a number...
4779268 Frame decoding for digital signal transmission  
A method and apparatus for frame decoding, in a system which has a series bit data flow with a frame structure including a periodically occurring item of synchronizing information which...
4749937 Phase detector independent of clock duty-cycle  
An improved phase detector for generating a measurement signal indicating the extent to which the actual distance (τ) between the flanks of data pulses generated for serial data transmission and...
4733404 Apparatus and method for signal processing  
A transmission control circuit for use in a data terminal equipment receiver section is disclosed. The output of a phase locked loop or narrow band tuned filter input register clocking circuit...
4726043 Data decision-directed timing and carrier recovery circuits  
The performance of carrier and/or timing recovery circuits which control the recovery of data signals from modulated quadrature-related carrier signals is improved by the use of a phase detector...
4715049 Clock recovery and retiming scheme with saw filter phase trimming to achieve desired system phase adjustment  
A clock recovery and data retiming circuit is disclosed which utilizes a SAW filter to form the recovered clock signal. The phase shift of the received data signal associated with various...
4712131 Sync apparatus for image multiplex transmission system  
A sync apparatus for an image multiplex transmission system includes a first means for determining a fetch phase of each teletext signal packet, and a second means for re-determining the fetch...
4707842 Apparatus and method for acquiring data and clock pulses from asynchronous data signals  
A digital phase control circuit incorporates a phase detector and a controllable oscillator controlled by an internal clock. The oscillator is formed as a presettable counter which is counted by...
4704721 Real time network system  
A phase locking system operative to phase lock a local clock to incoming data bits in a packet of short duration within a specified accuracy range, using no more than a few initial bits of the...
4700084 Digital clock recovery circuit apparatus  
A circuit for using a high speed clock and a counter to obtain a recovered clock with incoming data resetting the counter whenever a logic "1" of more than a predetermined number of high speed...
4688246 CATV scrambling system with compressed digital audio in synchronizing signal intervals  
A CATV television system has the sync and color subcarrier reference information replaced in the horizontal blanking intervals with compressed digital audio data. The digital audio data is in the...
4675881 Arrangement for recovering a clock signal from an angle-modulated carrier signal having a modulation index m=0.5  
An arrangement for recovering a clock signal of frequency 1/T from an angle-modulated carrier signal having a modulation index m=0.5 comprises a frequency doubler, a circuit for generating a clock...
4670890 Method of and/or apparatus for encoding and decoding sequential information in data handling systems  
The specification discloses a method and apparatus for encoding and decoding a variable length augmented code for use in the transmission of sequential information as an indefinite length string of...
4663769 Clock acquisition indicator circuit for NRZ data  
A clock acquisition indicator circuit for NRZ "data", "which requires" two clock signals advanced and retarded by 90-degrees from the recovered clock. The circuit partitions each cycle of recovered...
4661657 Method and apparatus for transmitting and receiving encoded data  
Method and apparatus for transmitting encoded data from a transmitting station to a receiving station wherein the transmitting and receiving data stations contain data terminal equipment, cipher...
4653074 Bit sync generator  
A system for synchronizing information bits to any frequency signal chain with low jitter correction and adapted for gate array implementation.
4653075 BPSK synchronizer using computational analysis  
A bit synchronizer for a BPSK input signal having a sinusoidal carrier frequency f that is much greater than the modulating signal bit rate. The synchronizer comprises means (29, 31) for...
4648133 Synchronization tracking in pulse position modulation receiver  
A clock pulse generator for decoding pulse position modulation in an optical communication receiver is synchronized by a delay tacking loop which multiplies impulses of a data pulse by the...
4641324 Signal correction apparatus  
A closed loop circuit corrects digital data baseline shift resulting from perturbing interferences. Samples of the signal amplitude are stored at each clock time; and a correction signal is derived...
4633488 Phase-locked loop for MFM data recording  
A phase-locked loop (PLL) for use in decoding MFM data recordings. The loop uses a counter to generate timing signals which divide bitcells into data and clock windows and which define times within...
4627080 Adaptive timing circuit  
An adaptive timing technique is disclosed for adjusting the sampling times of a received digital signal for fewer regeneration errors. In accordance with the disclosed technique, a sequence of...
4622665 Synchronizing system  
Each of a plurality of stored program controlled stations associated with a digital telecommunication network includes: a plurality of clocks and an adjustable oscillator for generating...
4612653 Delay modulation phase coding  
The use of delay modulation (or "Miller") phase coding to encode transmitted data is disclosed in a multinodal, peer network communication system. The use of delay modulation provides bandwidth...
4606056 Method of encoding and serially transmitting self-clocking data and control characters  
A method of sending self-clocking data characters and control characters in a sequence from a first communications node to a second node includes the steps of: encoding each data character as...
4599736 Wide band constant duty cycle pulse train processing circuit  
A wide band constant duty cycle pulse train processing circuit where the pulse train frequency varies is proposed. The circuit serves primarily to obtain the basic clock in decoding signals encoded...
4599735 Timing recovery circuit for synchronous data transmission using combination of L Bi phase and modified biphase codes  
A timing recovery circuit for synchronous data transmission using a signal which, in the baseband, is formed by a succession of two-level signal elements, without overlap, and of duration T, able...
4584693 QPSK system with one cycle per Baud period  
In a QPSK system using one cycle of a squared-off sinusoid per Baud period to represent the data dibits, the following are disclosed: (1) a direct detection circuit using samples taken only...
4584690 Alternate Mark Invert (AMI) transceiver with switchable detection and digital precompensation  
A high-speed digital transceiver is provided for use in a PBX environment comprising twisted-pair wire cables interconnecting like transceivers, each transceiver being operative to exchange voice,...
4543531 Digital data detecting apparatus  
A digital data detecting apparatus comprises means for sampling an input digital signal at a frequency which is M times (M>1) higher than a channel bit rate, means responsive to two adjacent...
4531222 Clock extraction circuit for a PCM signal  
A clock extraction circuit for PCM NRZ signals which delivers substantially constant power and comprising at least one energy storage device charged by a constant current and discharged into a full...
4524445 Method and circuit arrangement for synchronous detection  
A digital signal comprising a plurality of data blocks each comprising a plurality of data words and a parity word is transmitted without a synchronous word or signal indicative of the boundary...
4521883 Telephony apparatus having filter capacitor switched to undergo discrete phase jumps  
A telephony audio signal is transmitted as a digital signal by a transmitter that derives: (1) a master clock of frequency F MC , (2) a time slot signal of frequency F TS =F MC ÷2 N ', and (3) a...
4507779 Medium speed multiples data  
Synchronization can be acquired between a transmitting node and a receiving node on a time division multiple access communication link without the necessity for additional data bits in the data...
4497060 Self-clocking binary receiver  
Binary data is transmitted as signals of two different pulsewidths to respectively represent logic "0" and "1". At the data receiver, the ratio of the pulsewidths is converted into a corresponding...
4468788 Digital frequency translator for offset frequency generation of unmodulated signals  
A frequency translator receives an input frequency signal and an offset frequency signal, and processes the signals digitally in order to obtain an output from a multiplexer. Pulse trains derived...
4466099 Information system using error syndrome for special control  
Special control within a data processing system is signalled by a predetermined unique combination of data and error correcting code (ECC) bits. The predetermined combination, received from a...
4458206 Circuit for synchronizing the demodulation of phase modulated transmission bursts  
An energy synchronized demodulator circuit is disclosed having a differential input to single ended converter coupled to a sync detect circuit which provides a detection signal in response to the...
4456884 Phase-lock loop and Miller decoder employing the same  
A phase-lock loop is disclosed for synchronizing an oscillator signal with a train of input signal pulses, some of which may be missing. The phase-lock loop is of particular use in a decoder for...
4457005 Digital coherent PSK demodulator and detector  
An improved digital demodulator and detector for phase-shift-keyed digital signals providing coherent detection with high sensitivity and stability on noisy channels. Digital sampling is used in...
4455665 Data modem clock extraction circuit  
A digital timing recovery circuit operative upon digital samples of the input signal to a data receiver provided at the sample rate to produce a clock correction signal at the symbol rate utilizing...
4435687 Clock signal recovery circuit  
An absolute differentiator receives a self-clocking digital input signal, and its output is applied to a series of delay elements. The outputs of the differentiator and the delay elements are...
4414663 Time division multiplex system having transmitted pulses in time channels distributed over and co-transmitted with a frame clock signal component  
In a time division multiplex system having chronological grouping of optically transmittable PPM signals, the PPM signals of one half of the time channels are transmitted as pulses in one half of...
Matches 201 - 250 out of 365 < 1 2 3 4 5 6 7 8 >