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7502428 |
Pseudo-noise encoded digital data clock recovery
An apparatus is disclosed. The apparatus includes a correlator that correlates a pseudo-noise sequence with a received clip stream in order to generate a correlated output. The apparatus further...
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7499511 |
Clock recovery systems and methods for adjusting phase offset according to data frequency
A clock recovery system includes a sampler that is configured to sample an input data signal in synchronization with a modulated clock signal to generate a sample of the input data signal. A phase...
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7499514 |
Communication system, reception apparatus and method, recording medium and program
A communication system, reception apparatus and method, recording medium and program are provided. A technique is provided wherein, even where means for synchronizing a reception clock with a...
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7496158 |
Swept bandpass filter frequency modulated continuous wave (FMCW) receiver and related method
A swept bandpass filter for receiving frequency varying input signals is disclosed. More particularly, a swept bandpass filter frequency modulated continuous wave (FMCW) receiver and related method...
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7492848 |
Method and apparatus for efficient multi-stage FIR filters
An interpolation filter without a FIFO memory is configured as a cascade arrangement of simpler interpolation sub-filters that are operated in reverse order. The interpolation sub-filter that...
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7492847 |
Analog front end circuit with automatic sampling time generation system and method
An automatic clock generation system is used for automatically outputting a sampling signal and a holding signal to an analog front end circuit and for sampling the analog signal. The clock...
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7493095 |
PMA RX in coarse loop for high speed sampling
A device and a method for processing high data rate serial data includes circuitry for recovering a clock based on the high data rate input data stream. A transceiver includes a coarse loop of a...
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7489724 |
System and method for connecting a host and a target
A system for controlling communications between a host and a target, the system having a data input for receiving a data signal, a clock input for receiving a clock signal, an oversampling circuit...
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7489739 |
Method and apparatus for data recovery
A method for recovering data includes oversampling an input data signal to provide sample sets, and storing a plurality of sample sets in addressable memory. The sample sets are processed, using...
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7489749 |
Optimum phase timing recovery in the presence of strong intersymbol interference
A data communication device with a receiver for receiving and processing incoming signal having intersymbol interference component to produce resultant signals with less interference. The processor...
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7489745 |
Reconfigurable direct RF bandpass sampling receiver and related methods
Reconfigurable direct radio frequency (RF) bandpass sampling receivers are disclosed that provide direct RF sampling of an input signal spectrum passed through a bandpass filter that is tunable...
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7486756 |
Phase detector
A phase detector is applied for detecting the phase difference between a data signal and a clock signal, and outputting a first up signal whose pulse width is between 1/2 and 3/2 period of the...
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7486753 |
Synchronization establishment circuit and synchronization establishment method
A terminal is wirelessly connected to a base station. The terminal has a timer and a controller. The timer has a register for storing a beacon interval as a comparison value. The timer also...
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7486752 |
Alignment of clock signal with data signal
A multi input multi output (MIMO) receiver for receiving signals having a synchronization (SYNC) module being responsive to a plurality of received baseband signals for processing the same to...
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7486747 |
Digital timing recovery operable at very low or less than zero dB Eb/No
A receiver ( 20 ) for performing timing recovery over at least one complex channel at low or less than zero SNR (signal power to noise power, in dB) has at least one receive element such as an...
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7480234 |
Initial timing estimation in a wireless network receiver
A method that includes wirelessly receiving a signal, and detecting a start of packet (SOP) for a packet that conforms to a wireless networking standard. The detecting from the received signal uses...
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7480359 |
Symbol clock regenerating apparatus, symbol clock regenerating program and symbol clock regenerating method
To provide a technique for regenerating a symbol clock based on a digital modulation signal in which the symbol timing is accurately detected without need of using a synchronization word. A symbol...
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7480360 |
Regulating a timing between a strobe signal and a data signal
A technique includes in response to a training mode, communicating between a device and a processor of a computer system over a data bit line of a bus. The technique includes based on the...
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7477683 |
Periodic DMT signals with cyclic extension
A method for digital communication includes generating time-domain symbols having a predetermined symbol duration in accordance with a discrete multi-tone (DMT) modulation scheme. A cyclic...
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7477711 |
Synchronous undersampling for high-frequency voltage and current measurements
A power source may generate signals (RF or microwave), when driven by a drive signal from a controller. A sensor may measure the voltage and current of the signals generated by the power source,...
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7477712 |
Adaptable data path for synchronous data transfer between clock domains
Systems and methods for implanting synchronous data transfer between clock domains are disclosed. An exemplary system may comprise an adaptable data path having an input for receiving a signal from...
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7474610 |
OFDM automatic frequency control device and method thereof
An OFDM frequency control device converts an incoming signal from analog to digital and calculates a correlation value between the guard interval and data part from which the guard interval is...
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7474714 |
Phase/frequency detector for tracking receivers
A receiving device within a digital electronic system includes a sampling unit, a voter block, and a local clock phase adjustment unit. The sampling unit samples an input line at three points in...
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7474637 |
Signal supply apparatus and method for public and private mobile communication system
A signal supply apparatus for a public and private mobile communication system. The apparatus has Internet protocol base transceiver subsystems, and a private base station controller that controls...
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7474720 |
Clock and data recovery method and digital circuit for the same
A clock data recovery circuit has a good jitter tolerance characteristic and a broad data recovery range in the event of a wander, that is, a good wander-tracking characteristic of a recovered...
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7474722 |
Systems and methods for sample rate conversion using multiple rate estimate counters
Systems and methods for using multiple rate estimate counters in converting input data streams having variable sample rates to an output sample rate that are used in processing the data streams. In...
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7474721 |
Sliding-window based signal monitoring
The invention is generally directed towards monitoring of a signal (m), such as a clock signal or a data signal, by sampling the signal to obtain a discrete sample representation of the signal and...
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7471755 |
Methods and arrangements for link power reduction
Methods, and arrangements for extension of clock and data recovery (CDR) loop latency and deactivation of CDR circuits are disclosed. In particular, embodiments address situations in which a...
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7471718 |
Circuit for following up synchronization of a spread-coded signal by power comparison and phase adjustment
A synchronous follow-up circuit carries out correlation operation with a spread code on a receive signal, generated from a received signal in a symbol timing generator, by three symbol correlators,...
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7471754 |
Method and device for fine synchronization of a digital telecommunication receiver
A method for the synchronization of a digital telecommunication receiver comprises the steps of:—storing a plurality of consecutive samples E−1, E, M, L, L+1 of an incoming spread spectrum...
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7469028 |
Asymmetrical digital subscriber line system
An asymmetrical digital subscriber line (ADSL) communication system enhances the signal-to-noise ratio (SNR) of the received signals by conducting a PLL process with a tone conditioned on the most...
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7469027 |
Symbol timing search algorithm
A system is described for establishing timing synchronism between a local receiver symbol clock and a transmitter symbol clock. A prescribed number of offset values are calculated for desired...
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7466747 |
Method and apparatus for wireless data transfer
A method and apparatus for wirelessly transmitting data between two devices ( 101. 102 ) is provided herein. During data transmission, a data and a strobe signal are transmitted simultaneously on...
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7466782 |
Methods, apparatus and computer program products for determining the timing of bits based on frequency error
Determining timing for bits in sampled data includes determining a bit error in the sampled data, determining a phase error in the sampled data, determining a frequency error of the sampled data...
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7463701 |
Fast symbol timing recovery for transmitted digital data
A system and method of recovering symbol timing from a high symbol rate TDD or TDMA broadband transmission. A correlator operating at a fraction of the symbol rate receives in-phase and quadrature...
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7457375 |
Timing extractor, timing extraction method, and demodulator having the timing extractor
In a timing component extractor for a digital modulated signal, a frequency converting section 30 receives a complex baseband signal having a symbol rate fs and formed from an I signal and a Q...
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7454674 |
Digital jitter detector
In one embodiment, a jitter detector comprises a logic circuit coupled to receive a plurality of inputs indicative of states captured from a plurality of outputs of a delay chain responsive to a...
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7453968 |
Dynamic phase alignment methods and apparatus
Dynamic phase alignment circuitry selects from among several, phase-distributed, candidate clock signals the one of those signals that is currently best for use in controlling the timing of...
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7453969 |
PLL circuit and phase control method of PLL circuit
A PLL circuit having a phase build-out function and a phase control method of the PLL circuit, in which a phase build-out detector monitors the input phase of a PLL device and detects a transient...
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7450530 |
Cross link multiplexer bus configured to reduce cross-talk
A cross link multiplexer bus comprising a plurality of cross link multiplexers and a plurality of interconnects. The plurality of cross link multiplexers has a destination port configured to...
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7450677 |
Clock and data recovery apparatus and method thereof
A clock and data recovery apparatus and the method thereof are applied for burst mode clock and data recovery (CDR) in a passive optical network (PON). A phase-locked loop induces a first control...
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7450651 |
Multi-carrier transmission system
Multi-carrier transmission system comprises transmitter including acquisition unit configured to acquire 2 m (m: a natural number) modulated signals including no-information signals which are...
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7450038 |
Determining oversampled data to be included in unit intervals
In some embodiments, a chip includes sampling circuitry to produce oversampled data from a received signal, and logic to determine which of the oversampled data are to be part of different unit...
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RE40568 |
Synchronization symbol structure using OFDM based transmission method
The present invention proposes a method for generating synchronization bursts for OFDM transmission systems. The symbols of a predefined symbol sequence are mapped according to a predefined mapping...
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7450529 |
Cross link multiplexer bus
A cross link multiplexer bus comprising a plurality of cross link multiplexers and a plurality of interconnects. The plurality of cross link multiplexers has a destination port configured to...
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7447289 |
Signal timing adjustment device, signal timing adjustment system, signal timing adjustment amount setting program, and storage medium storing the program
Delay time between an input of data to a circuit block and an output of the data from the data block is measured in accordance with a timing at which the data from the circuit block is acquired by...
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7447282 |
System and method for pre-FFT OFDM fine synchronization
A synchronization unit for performing timing synchronization in the time domain includes storage, a multiplier, a signal analyzer, and a timing error estimation unit. The storage stores a reference...
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7443935 |
Apparatus and method for dynamically adjusting receiver bandwidth
An apparatus for adjusting bandwidth for a receiver includes: (a) a receiver clock operating according to receiver clock parameters related to received signals for sampling received signals; (b) a...
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7443941 |
Method and system for phase offset cancellation in systems using multi-phase clocks
A system for use with a multi-phase clock generator is disclosed. It should also be understood that the multiphase clock generator can be a phase lock loop (PLL), delay lock loop (DLL), or any...
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7441139 |
Skew adjusting circuit and method for parallel signals
The skew adjusting circuit for parallel signals includes: a deskew signal generating circuit which generates a deskew signal by performing a predetermined logical operation and transmits the deskew...
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