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6611219 |
Oversampling data recovery apparatus and method
An open-loop data recovery apparatus and method utilizing an oversampling technique is provided, by which the occurrence of data transitions is counted and a proper sampling clock phase is decided....
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6611570 |
Programmable digital intermediate frequency transceiver
A monolithic CMOS programmable digital intermediate frequency receiver includes a programmable memory, a clock generator, a sigma delta converter, a digital downconverter, and a decimation filter...
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6606361 |
Circuits, systems, and methods for providing a single output clock and output data stream from an interface having multiple clocks and an input data stream
A circuit ( 10 ) for producing a single output data (D OUT ) stream and a corresponding single clock signal (CLK OUT ). This circuit comprises an input for receiving a single input data stream (D...
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6603830 |
Synchronization method for a receiving unit and a receiving unit corresponding thereto
A receiving unit is more precisely synchronized to a transmitting unit by transmitting synchronization signals from the transmitting unit, adjusting a clock-pulse generator of a phase-locked loop,...
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6590948 |
Parallel asynchronous sample rate reducer
A parallel asynchronous sample rate reducer ( 26 ) for converting a synchronous parallel digital input signal (INP_DAT) into a parallel digital output signal (OUT_DAT) having an average aggregate...
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6587500 |
Symbol sampling time settlement of a hard decision radio receiver
A method and apparatus for improving bit error performance within a hard decision radio interface processing environment is provided, whereby a sampling unit collects a number of samples per...
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6587526 |
Apparatus and method for timing synchronization in OFDM-based wireless systems
A prescribed signal transmission channel parameter is estimated by employing a unique arrangement and/or method that does not require the estimation of all the signal channel parameters....
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6584163 |
Shared data and clock recovery for packetized data
A shared data and clock recovery circuit including a clock synthesizer for generating sampling signals having different phases, a multiple transition detector for receiving a data stream and...
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6583822 |
Timing recovery device of digital TV
A timing recovery device in a digital television receiver using a VSB system is disclosed. In the present invention, the timing recovery device independently determines whether the detected hsync...
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6584162 |
Method and apparatus sample rate conversions in an analog to digital converter
A method and apparatus for sample rate conversion in an analog to digital converter. Such a method and apparatus include processing that begins by receiving an input digital stream at a first clock...
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6580770 |
Information regenerating apparatus and information regenerating method
Input data is converted into digital data in a A/D converter in synchronization with a regenerated clock, a zero-cross detecting signal of the digital data is detected in a zero-cross detector, a...
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6580773 |
Method and device for aligning synchronous digital signals
The phase of digital signals is aligned to simplify their acquisition in synchronous systems, by means of a process comprising the following steps: to apply a pulse-width distortion to the incoming...
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6580775 |
Method of detecting frequency of digital phase locked loop
A method of detecting a frequency of a digital phase locked loop in an optical disc reproduction and/or recording apparatus, which includes (a) detecting an edge point of an input signal, (b)...
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6577873 |
Apparatus and method for extending service area in mobile communication system
An apparatus and method for extending the service area in a mobile communication system is provided, in which the service area is defined with a normal mode or an extension mode based on a distance...
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6567484 |
Burst synchronizing circuit
A burst synchronizing circuit synchronizes a received data signal in a burst fashion and sampling phases with which the received data signal is sampled. A first part samples a data pattern with...
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6563894 |
Method and apparatus for acquiring and tracking the sampling phase of a signal
Apparatus for providing an optimized sampling phase to a received signal in a given channel, the received signal including inter-symbol interference. The apparatus includes a voltage controlled...
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6563895 |
Optical bit rate converter
An optical bit rate for communication systems. The optical bit rate converter converts an ultra-high speed optical data stream to a lower rate optical data stream. In one embodiment, the optical...
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6563888 |
Data transmission/reception system and data reception device
A data transmission/reception system made up of a transmission device for transmitting data according to a transmission clock signal and a reception device for receiving the data according to a...
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6560276 |
Synchronization techniques using an interpolation filter
The taps of an equalizer are used as inputs to a discrete Fourier transform (DFT). Certain spectral components are extracted from the DFT and used to estimate the frequency difference. The...
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6560298 |
Method and apparatus for concurrent synchronization and improved automatic frequency control in a communication device
A method ( 1400 ) of enabling automatic frequency control (AFC) concurrent with time alignment of information in a communication device includes a first step ( 1402 ) of providing a data stream to...
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6556592 |
Correction method for clock synchronization with ISDN in cell station for use in private-network-use PHS and a circuit therefor
This invention intends to provide a correction method for synchronization between an air side and a network side of a PHS cell station. The correction method and apparatus enables a continued...
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6556560 |
Low-latency audio interface for packet telephony
In a method for reducing latency in packet telephony caused by buffering at the conversion stage between analog audio signals and digital audio data, analog audio is sampled at a rate far greater...
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6556639 |
Method and apparatus for determining transmission mode and synchronization for a digital audio broadcasting signal
A method is provided for transmitting control information in a digital audio broadcasting system. The method comprises the steps of transmitting a plurality of control bits in each of a plurality...
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6553087 |
Interpolating bandpass filter for packet-data receiver synchronization
An interpolating bandpass filter for packet-data receiver synchronization comprises a single delay line that delays the passband-sampled data from the analog-to-digital converter, and a convolving...
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6549594 |
Timing phase recovery method and apparatus
A method for timing phase recovery including the steps of first, estimating an open-eye sequence of a received signal, second, estimating a channel response using the open-eye sequence, and third,...
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6549593 |
Interface apparatus for interfacing data to a plurality of different clock domains
Interface apparatus for interfacing data to a plurality of different clock domains where the clock signals in the different domains are phase locked together and respective clock signals have...
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6549591 |
Method and apparatus for digital interference rejection
Digital interference rejection of a signal is accomplished by first converting the signal to digital. Then a second signal is generated and mixed with the first signal. This combined signal is then...
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6549589 |
Digital audio broadcasting receiver
A DAB (Digital Audio Broadcasting) receiver includes a delay circuit for delaying a received DAB signal by a prescribed period, a correlation circuit for taking correlation between a delayed output...
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6549587 |
Voice and data exchange over a packet based network with timing recovery
A signal processing system which discriminates between voice signals and data signals modulated by a voiceband carrier. The signal processing system includes a voice exchange, a data exchange and a...
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6549595 |
High-speed serial data communication system
A serial communication system transfers respective first and second signals via respective parallel signal carriers from a transmitter circuit to a receiver circuit. In synchronization with a clock...
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6545532 |
Timing recovery circuit in a QAM demodulator
A timing recovery circuit in a QAM demodulator which uses a symbol rate continuously adaptive interpolation filter. The method of interpolation used in the present invention is defined as a...
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6539070 |
Clock synchronizing circuit
A clock synchronizing circuit enables initial synchronization of clock in spite of the case of modulation system except for quadrature modulation with simple constitution. A cosine/sine output...
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6539071 |
Frequency correction at the receiver end in a packet transmission system
The invention relates to a system for transmitting packets from interactive terminals to a head station. The terminals intended for consumers are provided with local oscillators which are not very...
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6529549 |
System and method for an equalizer-based symbol timing loop
An equalizer based symbol timing loop system incorporates existing receiver architecture to modify an input sample stream to match a transmitter's symbol rate. The system includes a phase detector...
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6529570 |
Data synchronizer for a multiple rate clock source and method thereof
A data synchronizer ( 60 ) receives a data ready signal ( 40 ) at a selector ( 82 ). The selector ( 82 ) selects either the data ready signal ( 40 ) or a delayed version of the data ready signal (...
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6529571 |
Method and apparatus for equalizing propagation delay
An apparatus for and method of generating a signal for equalizing propagation delay among parts of a transceiver are disclosed. The parts each have a plurality of channels, and each channel is...
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6519303 |
Clock reproduction circuit
A clock reproducing circuit for reproducing a clock signal accurately from a PSK modulated signal so as to sample the I's aperture point. The phase of the PSK modulated signal is rotated by a phase...
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6519302 |
Method and apparatus for regenerating data
The invention provides a method and apparatus for efficiently regenerating an incoming data signal at a sampling point which is continually optimized independently of the regeneration process....
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6512804 |
Apparatus and method for multiple serial data synchronization using channel-lock FIFO buffers optimized for jitter
The invention provides an apparatus, and related method, for receiving and synchronizing parallel data transmitted over multiple serial data channels. The synchronization technique uses a channel...
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6512473 |
Clock synchronizing circuit
A clock synchronizing circuit of the present invention includes a first AD (Analog-to-Digital) converter for converting a first-channel baseband signal, which is subjected to orthogonal detection...
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6510190 |
Method and apparatus for estimating fading distortion of a signal propagating in a communication channel
The present invention relates to a method and an apparatus for compensating a signal that has experienced fading distortion in a communication channel. The signal that can be a TDMA (Time Division...
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6507626 |
Bandpass phase tracker that automatically samples at prescribed carrier phases when digitizing VSB I-F signal
A bandpass phase tracker automatically samples at prescribed carrier phases when digitizing a vestigial-sideband intermediate-frequency signal, which VSB I-F signal is modulated in accordance with...
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6504869 |
Mechanism for interpolating among samples of received communication signal using asynchronous high speed clock which is a nominal multiple of recovered signalling baud rate
An analog input to an interpolation scheme for a digital signal processing receiver is digitized by an oversampling sigma-delta modulator running at a clock frequency that is a multiple of the...
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6493408 |
Low-jitter data transmission apparatus
For restraining jitter amount of a transmission clock signal ( 16 ) generated by a digital PLL ( 8 ), a data transmission apparatus comprises a {fraction (1/24)} clock generator ( 6 ) for dividing...
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6489909 |
Method and apparatus for improving S/N ratio in digital-to-analog conversion of pulse density modulated (PDM) signal
A method and apparatus for improving an S/N ratio in a digital-to-analog conversion of a PDM signal are provided. A digital-to-analog conversion system comprises an S/N ratio improving section. The...
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6487252 |
Wireless communication system and method for synchronization
An orthogonal frequency division multiplexed wideband communication system provides improved time and frequency synchronization by inserting an unevenly spaced pilot sequence within the...
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6487193 |
Path searched device and CDMA receiver with the same
The present invention is directed to a path searching device and a CDMA receiver employing the same, having a reduced circuit scale and operating to carry out a smaller number of operations. For a...
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6477215 |
Sampling control loop for a receiver for digitally transmitted signals
To optimize the sampling of individual symbols (S 0 to S 3 ), a sampling control loop ( 1 ) for a circuit ( 2 ) for receiving digitally transmitted signals (s) is connected to a timing error...
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6466589 |
Apparatus for verifying data integrity and synchronizing ATM cell data format for processing
The present invention presents an anti-meta trap (AMT) circuit for maintaining the data integrity of transmitted bit data in various applications. The anti-meta trap (AMT) circuit implement bit...
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6466803 |
Multi-mode communications system with efficient oscillator synchronization
A system for synchronizing a second receive chain relative to a first receive chain in a multi-mode communication system. The system includes a first circuit that measures a first frequency...
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