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7623606 |
Decoding of bi-phase encoded data
A method for decoding bi-phase encoded data begins by interpreting a first bit boundary of a bit of the bi-phase encoded data to produce a first boundary value. The method continues by interpreting...
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7623594 |
Satellite receiver system
An SDARS receiver for use with at least two antennae, each of which receives bitstreams from a first satellite, bitstreams from a second satellite, and bitstreams from a terrestrial repeater,...
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7623482 |
System and method for effectuating the transfer of data blocks including a header block across a clock boundary
A system and method for effectuating the transfer of data blocks including a header block across a clock boundary between a first clock domain and a second clock domain. In one embodiment, a first...
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7620137 |
System and method for clock drift correction for broadcast audio/video streaming
A clock rate used in rendering broadcast streaming audio/video data is adjusted to converge on a clock rate associated with broadcasting the streaming data. The clock rate is adjusted by monitoring...
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7620135 |
Data processing apparatus that identifies a communication clock frequency
A data processing apparatus receives a message containing a sync break interval with a unique bit pattern and a sync field interval identified by the sync break interval. A timing property of the...
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7620133 |
Method and apparatus for a digital-to-phase converter
A DPC ( 300 ) includes: a frequency source ( 310 ) for generating a clock signal; a delay line ( 320 ) for receiving the clock signal and generating phase-shifted clock signals at output taps; a...
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7620131 |
Digital clock controller, radio receiver, and methods for use therewith
A digital clock generator includes a base clock generator for generating a base clock signal at a variable base clock frequency in response to a control signal. A digital clock controller generates...
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7619547 |
Serial-to-parallel converter circuit and liquid crystal display driving circuit
A serial-to-parallel converter circuit comprising: an m-bit serial data holding unit to be input with serial data whose input bit number is set to m or n (<m) bits within a transfer period and a...
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RE40990 |
Data transmission across asynchronous time domains using phase-shifted data packet
A method and apparatus is provided for transmitting multi-bit data across asynchronous time domains. In one embodiment, the apparatus includes a first delay circuit to generate a selector signal...
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7616724 |
Method and apparatus for multi-modulation frame synchronization in a digital communication system
A method and apparatus for frame synchronization in digital communication systems using multiple modulation formats perform a search for a differential frame alignment sequence (FAS) to frame-align...
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7616723 |
Method for symbol timing synchronization and apparatus thereof
A method for symbol timing synchronization is provided. The method comprises the following steps. First, a correlation between a sample sequence and a delayed sample sequence is calculated to...
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7616721 |
Apparatus and method for checking network synchronization clock signal in communication system
In an apparatus and method for checking a network synchronization clock signal in a communication system, the apparatus generates a divided clock signal which is the same as an externally inputted...
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7616719 |
Compensation for residual frequency offset, phase noise and sampling phase offset in wireless networks
Improved performance, particularly gain in signal-to-noise ratio (SNR), in high-bandwidth Orthogonal Frequency Division Multiplexing (OFDM) receivers, software and systems is achieved by...
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7616707 |
Methods and apparatus for reducing a sampling rate during a sampling phase determination process
A received signal is sampled at a sampling period of T+m*(T/n) during a sampling phase determination process. T is a symbol or chip period of the received signal, n is a number of phases of the...
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7613264 |
Flexible sampling-rate encoder
A method for implementing a flexible sampling-rate encoder, comprising the steps of (A) sampling an input signal at a regular time-interval to produce sampled data, (B) generating a pseudo-random...
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7613261 |
Method of estimating symbol synchronization in OQPSK demodulator
The present invention relates to a method of estimating symbol synchronization for an Offset Quadrature Phase Shift Keying (OQPSK) demodulator applicable to a Zigbee receiver. More particularly,...
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7613257 |
Synchronizing method for impulse radio network
A method to synchronize impulse radio signal in a receiver based on a cross-correlation between an input signal and a template pulse train is described. The method comprises the steps of receiving...
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7613237 |
Built-in test feature to facilitate system level stress testing of a high-speed serial link that uses a forwarding clock
A method of ensuring robust operation of a differential serial link is provided. The method provides a first integrated circuit having 1) a phase generator constructed and arranged to provide a...
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7609795 |
Interpolation module, interpolator and methods capable of recovering timing in a timing recovery apparatus
The invention relates to an interpolation module, an interpolator, and methods capable of recovering timing, and in particular, to an interpolation module, an interpolator, and methods capable of...
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7609751 |
Method and apparatus to initiate communications between an unknown node and an existing secure network
A first node initiating communications with a second node already in a secure network sends a discovery burst having a preamble portion and a payload portion. The preamble portion is sent at a...
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7606342 |
Tracking the phase of a received signal
The tracking of the phase of a received signal having a known preamble is accomplished by the steps of: initializing a phase-locked loop in accordance with estimated phase parameters, which are...
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7606341 |
Circuit for bit alignment in high speed multichannel data transmission
An alignment circuit is configured to receive a reference clock signal (ref_clk) derived from a main clock having a period T and successive sets of 2n data bits that are transmitted in parallel on...
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7606340 |
Phase detection device and method thereof
A phase detection device comprising an analog-digital converter, an interpolator, and a determining unit. The analog-digital converter receives an analog signal and converts the analog signal to a...
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7606333 |
Method and device for frame detection and synchronizer
The IEEE 802.11a standard uses OFDM, where the transmission is divided into several orthogonal sub-carriers. Here, an algorithm is used for the frame detection; a simplified differentiator obtains...
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7602874 |
Providing accurate time-based counters for scaling operating frequencies of microprocessors
A mechanism provides accurate time-based counters for scaling operating frequencies of microprocessors. The mechanism makes use of a time-based counter circuit configuration in which a fixed...
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7602868 |
Asynchronous transmission device, asynchronous transmission method
The present invention provides an asynchronous transmission device and asynchronous transmission method which reduce the synchronization processing overhead. The asynchronous transmission device...
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7602859 |
Calibrating integrating receivers for source synchronous protocol
An embodiment of the present invention is a technique to calibrate an integrating receiver. A delay calibration circuit calibrates an adjusting code of a chain of delay elements and positioning of...
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7602852 |
Initial parameter estimation in OFDM systems
A coarse estimate of a location of an information carrying part of a symbol in a received signal in a telecommunication system is generated. This involves generating correlation values by...
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7599459 |
Receiving apparatus, data transmission system and receiving method
A receiving apparatus receives data sequences, each of which includes plural data blocks, from plural transmission lines, respectively. The apparatus includes plural elastic buffers and a deskew...
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7599456 |
Input/output data rate synchronization using first in first out data buffers
An input/output data rate synchronization system includes a first data buffer that receives input data at a first rate, that temporarily stores the input data, and that outputs the input data at a...
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7599309 |
Method and apparatus for managing cell-by-cell demodulation timings of a user equipment in an asynchronous mobile telecommunication system
A method and an apparatus are provided for managing cell-by-cell demodulation timing of an asynchronous user equipment (UE) for demodulating multipath signals, received from a plurality of cells,...
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7596196 |
Timing recovery in error recovery for iterative detection
A decoding system includes a timing loop for use in error recovery mode operations, in which “fast decode” bit values that are used for timing recovery purposes in the normal modes of operation...
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7593500 |
Apparatus for coordinating triggering of analog-to-digital conversions relative to pulse width modulation cycle timing
A pulse width modulation (PWM) generator featuring very high speed and high resolution capability and the ability to generate standard complementary PWM, push-pull PWM, variable offset PWM,...
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7593495 |
Method for performing high resolution phase alignment of multiple clocks using low resolution converters
The offset between a reference clock output signal and a target clock output signal are measured during a predetermined period. Based on the measurement, an offset signal is generated. The offset...
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7590397 |
Signal processing apparatus and signal processing method, program, and recording medium
An IC chip allows first communication for performing communication with all of the other IC chips, and second communication for performing communication while restricting communication parties....
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7590208 |
Circuit and method for generating a timing signal, and signal transmission system performing for high-speed signal transmission and reception between LSIs
A signal transmission system has a plurality of signal lines, a plurality of transmitting circuits, a plurality of receiving circuits, and a timing adjusting circuit. The transmitting circuits are...
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7590207 |
Modular serial interface in programmable logic device
A serial interface for a programmable logic device can be used as a conventional high-speed quad interface, but also allows an individual channel, if not otherwise being used, to be programmably...
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7590184 |
Blind preamble detection for an orthogonal frequency division multiplexed sample stream
A method for determining a presence of a preamble for an orthogonal frequency division multiplexed (OFDM) complex valued sample stream may include capturing a portion of the OFDM complex valued...
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7590183 |
Generating signals for transmission of information
A method for generating a signal is presented. The method includes selecting a first set of carrier frequencies that are integral multiples of a first frequency interval, and selecting a second set...
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7589586 |
High frequency signal detection circuit
A high frequency signal detection circuit includes an input terminal for a high frequency signal to be detected, a switch transferring the high frequency signal as intermittent ringing signal to a...
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7587014 |
Digital frequency/phase recovery circuit
A digital frequency/phase recovery circuit includes a comparator with hysteresis, a counter, a frequency determiner, a multi-phase clock generator, a transition detector, a phase adjuster, and a...
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7587013 |
Apparatus for updating gain of loop filter
For updating a gain of a loop filter from a timing error signal, a timing signal estimator generates a current timing signal estimation value from a prior timing error estimation value, a prior...
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7587012 |
Dual loop clock recovery circuit
A clock recovery circuit for digital data transmission includes a delay lock loop having a first loop which generates a phase difference signal which is indicative of a quantized phase difference...
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7587011 |
Digital-data receiver synchronization method and apparatus
Digital data receiver synchronization is provided with composite phase-frequency detectors, mutually cross-connected comparison feedback or both to provide robust reception of digital data signals....
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7586976 |
Initial ranging detection for OFDMA systems
An initial ranging detection for an orthogonal frequency division multiple access (OFDMA) wireless communication system entails removing data sub-carriers from samples of an OFDMA signal in order...
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7586954 |
Communication system
In a communication system where a terminal operates in clock synchronization with a global time used on a network, a period of time required for establishing clock synchronization when the terminal...
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7583774 |
Clock synchroniser
A clock synchronizer, for generating a local clock signal synchronized to a received clock signal, is described and claimed, along with a corresponding clock synchronization method. The clock...
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7583772 |
System for shifting data bits multiple times per clock cycle
A system and method are used to allow for phase rotator control signals to be produced that rotate bits in the signals more than one step per clock cycle. This can be done through the following...
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7583720 |
Wireless communication method and apparatus for assigning multi-paths to rake receiver fingers
A wireless communication method and system for assigning multi-paths to Rake receiver fingers. A Rake finger assignment database is established in which multi-path signals are categorized into a...
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7580494 |
Low wander timing generation and recovery
Systems, apparatuses, and methods for low wander timing generation and/or recovery are disclosed here. In one aspect, embodiments of the present disclosure include a communication system for high...
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