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7263148 |
Source synchronous CDMA bus interface
A wireless IC interconnect system and a source synchronous CDMA (SS-CDMA) bus interface facilitate interconnections between first and second IC locations. A signal conveyed using the wireless...
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7263149 |
Apparatus and method for generating a distributed clock signal
The present invention provides a method and apparatus for synchronizing signal transfers between two clock domains, where the clock domains have a gear ratio relationship. A gear ratio means that...
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7263151 |
High frequency loss of signal detector
Methods and circuitry for implementing high speed loss-of-signal detectors for use in Gb/s telecommunication applications. The invention measures bit error rate (BER) of the incoming data by...
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7263080 |
Architecture of an integrated circuit for streaming media over wireless networks
An integrated circuit for streaming media over wireless networks is disclosed. The integrated circuit includes a media module that is designed to process media data. When non-media data is in,...
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7260165 |
Method for synchronization through accelerated advance of counters
A method for synchronizing counters in a terminal device, such as a cable modem in a DOCSIS-based system, with those of an administrative device, such as a headend. A cable modem advances its frame...
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7260166 |
Systems for synchronizing resets in multi-clock frequency applications
Methods and systems for synchronizing a reset signal with a local clock that drives a circuit. In the circuit, the reset signal can be used to reset one or more flip-flops, memory devices, and/or...
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7257497 |
Sequential frequency band acquisition apparatus for test and measurement instruments
An acquisition apparatus for a test and measurement instrument includes an input to receive an input signal, a digitizer to digitize a selected signal, a bypass path to selectively couple the input...
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7254206 |
Device and method for comma detection and word alignment in serial transmission
The invention is applied in a gigabit network environment. During the process of converting serial data into parallel data, a method is proposed to use the comma pattern in a data pipeline...
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7254202 |
Method of synchronizing an independent data device of a wireless data communications system on an incident pulsed signal of the ultra wide band type, and corresponding independent data device
An incident signal contains a preamble including a training sequence having a series of pulses whose polarity and time shifts are defined by respective polarity code and time-hopping code. A method...
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7254201 |
Clock and data recovery circuit and method
In a clock and data recovery circuit and method, the clock and data recovery circuit comprises a clock signal generator for generating N clock signals, each clock signal having phase difference of...
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7250797 |
Event edge synchronization system and method of operation thereof
The present invention provides an event edge synchronization system and a method of operating the same. In one embodiment, the event edge synchronization system includes: (1) a first clock zone...
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7251304 |
Bit synchronizing circuit configured to obviate errors from meta-stability
A bit synchronizing circuit that provides highly reliable data transmission at a high speed is provided. The circuit facilitates testing by using a plurality of clock signals that are generated...
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7248802 |
Distribution of a synchronization signal in an optical communication system
The invention relates to the distribution of a synchronization signal in an optical communication system which is inherently asynchronous. In order to accomplish a cost-efficient mechanism for...
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7245684 |
System and method for compensating for skew between a first clock signal and a second clock signal
A system and method for compensating for skew in a programmable clock synchronizer for effectuating data transfer between first circuitry disposed in a first clock domain and second circuitry...
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7246286 |
Testing methods and chips for preventing asnchronous sampling errors
Testing methods and chips preventing sampling errors caused by asynchronous effect. The chip comprises a first logic portion driven by a first clock signal with a first operating frequency, and a...
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7245930 |
Acquisition mechanism for a mobile satellite system
A method for enabling synchronization of a communications terminal in a wireless communication system, and a corresponding acquisition system of the communications terminal, wherein the method...
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7245681 |
Receiving terminal, receiver and receiving method for CDMA system
A receiving terminal for CDMA system for receiving received signals from a plurality of signal propagation channels is disclosed. The electric field level of the received signal from each signal...
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7245685 |
Filtering for timing distribution system in networking products
A timing distribution apparatus. The apparatus includes a source for producing a signal. The apparatus includes a first filter for removing jitter from the signal. The apparatus includes a second...
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7245687 |
Digital phase-locked loop device for synchronizing signal and method for generating stable synchronous signal
A phase-locked loop (PLL) device is disclosed. The PLL device includes an interpolator receiving and processing an input signal by an interpolation operation in response to an interpolation timing...
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7242735 |
Data recovery system and the method thereof
A data recovery system and method is disclosed, which comprises an oversampler, a phase detection circuit, a data pick circuit, a data overlap/skip detection circuit and a data correction circuit....
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7242741 |
Delay phase-locked loop device and clock signal generating method
A PLL device of a core logic chip includes a controlled delay circuit having a plurality of controlled delay lines interconnected in series and outputting therefrom a plurality of output clock...
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7242731 |
Method for synchronizing a receiver, a system, and an electronic device
A method for synchronizing a receiver ( 1 ) with a transmitted code-modulated spread spectrum signal, uses at least one reference code (r(x)), which corresponds to a code used in the modulation,...
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7242736 |
Data transfer
A receiver for digital data is provided. The receiver comprises a ring buffer operable to store received data. The receiver also comprises a write pointer controller for the buffer, operable to...
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7239581 |
Systems and methods for synchronizing the internal clocks of a plurality of processor modules
In a multiprocessor system that includes a plurality of processor modules, each one of which includes its own internal clock, one of the plurality of processor modules is designated as a master...
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7239813 |
Bit synchronization circuit and central terminal for PON systems
A bit synchronization circuit composed of a multiphase data sampling unit for converting each received burst data sets to multiphase data trains, a phase determination unit for generating a control...
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7239681 |
System and method for maintaining a stable synchronization state in a programmable clock synchronizer
A system and method for maintaining a stable synchronization state in a programmable clock synchronizer for effectuating data transfer between first circuitry disposed in a first clock domain and...
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7236551 |
Linear half-rate phase detector for clock recovery and method therefor
There is a clock recovery circuit to correct the timing relationship between a data signal and clock signal. The clock recovery circuit comprises a phase detector having an input for receiving a...
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7236552 |
Data transmission
A circuit for receiving multiple serial datastreams in parallel is disclosed. A bit clock is recovered from each data stream, there being one data bit for ach transition of the clock signal both...
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7233615 |
Timing correcting device and timing correcting method
In the timing correcting device, a RAKE path detecting circuit 1 detects a plurality of path candidates to be tracked, from a reception signal, and outputs a “timing of a path” and a...
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7233635 |
Apparatus and method for digital symbol synchronization
A symbol synchronization apparatus and method for synchronizing symbol digitally is disclosed. In the present invention, digital symbols are generated by an A/D converting unit. Based on digital...
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7231009 |
Data synchronization across an asynchronous boundary using, for example, multi-phase clocks
Additional information on the phase of an external clock signal is obtained by using clock signals to determine if a phase difference between an external clock signal and a first internal sampling...
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7231008 |
Fast locking clock and data recovery unit
A method of synchronizing a transmitter and a receiver, comprising: receiving a transmitted serial data stream. Creating an N-bit data sample from the serial data stream. Decoding the N-bit data...
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7227886 |
Synchronization strategy and architecture for spread-spectrum receivers
An apparatus for synchronizing the reception of a spread-spectrum signal includes a synchronization apparatus having a code-matched filter, a running average unit coupled to the filter, a peak...
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7228372 |
Data communication system with an SPI bus having a plurality of devices wherein data communications are enabled using communication protocols optimum to respective devices
A data communication system includes a master device, a plurality of slave devices, at least either a data transmission bus which connects the master device to a plurality of slave devices to...
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7224715 |
Method and system for maximum likelihood clock and carrier recovery in a direct sequence spread spectrum communication system
The present invention provides a method and system for clock and carrier recovery in a direct sequence spread spectrum communication system. The process involves the receiver receiving a digital...
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7224739 |
Controlled frequency signals
In some embodiments, a transmitter includes first encoding controlled frequency output circuitry to creates a magnitude encoded controlled frequency signal (CFS) and second encoding controlled...
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7224757 |
Method and apparatus for improving the performance of delta-sigma modulators
A delta-sigma modulator that provides improved SNR performance in applications such as low-power mobile wireless communications and high frequency radar applications is disclosed. Multiple...
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7221724 |
Precision timing generation
A precision timing generator and an associate method provide a precise clock signal based on a reference clock signal. Using the reference clock signal in a phase locked loop or delay locked loop,...
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7221911 |
Multi-band ultra-wide band communication method and system
The present invention provides ultra-wide band communication systems and methods, including multi-band ultra-wide band communication systems and methods. Methods and systems are provided in which...
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7216047 |
Time-delay discriminator
A method of determining the delay between two corresponding noise-like signals comprises determining events at which the level of a first of the signal crosses a predetermined threshold, using each...
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7212596 |
Data detection circuit and method
A data detection circuit and method detect a first bit that is the least significant among bits having a value 1 in N-bit input binary data and a second bit that is the second least significant...
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7206597 |
Transmission apparatus and auto gain control method
A transmission control section 101 temporarily stores a transmission signal, outputs the stored transmission signal to a coding section 102 and outputs transmission timing information to a...
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7206367 |
Apparatus and method to synchronize multimedia playback over a network using out-of-band signaling
An apparatus and method to synchronize devices in a network to a sub-millisecond timing accuracy. In a first embodiment, the transmission of data is synchronized between a first source device and...
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7203254 |
Method and system for synchronizing in a frequency shift keying receiver
The invention provides a method and apparatus for achieving timing synchronization during signal acquisition and for achieving frequency synchronization in a digital communication receiver after...
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7203260 |
Tracked 3X oversampling receiver
A method of receiving data, in accordance with an embodiment of the present invention, includes the acts of generating a data sampling clock signal and comparing a received clock signal to the data...
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7203259 |
Phase interpolator
An arrangement for generating a clock signal. Embodiments provide a method, apparatus, system, and machine-readable medium to interpolate phases of a reference clock signal to output an...
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7199989 |
Digital protection relay with time sync function
In a digital protection relay with a time sync function, the sampling timing of which is specified based on a reference timing transmitted from a time signal generator to a time sync unit, with a...
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7200196 |
Interpolation based timing recovery
The present invention provides a solution that eliminates both the voltage-controlled oscillator (“VXCO” 105 ) and its associated D/A converter ( 120 ) from the timing recovery scheme, thereby...
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7200197 |
Semiconductor integrated circuit
A semiconductor integrated circuit includes first and second data paths, first to third flip flops and logic circuits. The first data path transfers input data. The first flip flop is coupled to...
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7200195 |
Received data recovering device
A received data recovering device that can follow a rapid change in phase of data in data communication, thereby to prevent lowering of the data transmission efficiency, samples a baseband signal...
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