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7616708 |
Clock recovery circuit
A clock recovery circuit comprising an initial delay select circuit, a delay locked loop and a clock synthesizer circuit is provided. The initial delay select circuit comprises an initial timing...
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7603095 |
Apparatus and method of switching intervals
The present invention provides a way of hysteretic switching for efficiently reducing the heavy switching between two adjacent coarse intervals. The present invention disposes a number of fine...
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7593707 |
Method and system for compensation of DC offset in an RF receiver
Aspects of compensating for DC offset in an RF receiver may comprise sampling data from at least one of a plurality of output paths, selecting a sampled data and generating at least one feedback...
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7590212 |
System and method for adjusting the phase of a frequency-locked clock
A clock signal regeneration system and method to adjust the phase of a frequency-locked clock signal is provided. The system includes a numerically controlled oscillator, a clock source, and an...
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7590194 |
Information handling system capable of detecting frequency lock of signals downstream from a signal synthesized by frequency synthesizer
An information handling system including a frequency synthesizer lock detection system is disclosed that distributes a frequency synthesizer output signal across a distribution network to one or...
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7587188 |
Radio wave reception device, radio wave clock, and repeater
A received low-frequency standard radio wave, which is an amplitude modulation signal, is converted to an intermediate frequency signal Sa, and is output to a detection circuit and an AGC circuit....
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7583946 |
Wireless communication system and method using clock swapping during image rejection calibration
A wireless communication receiver is disclosed that operates in a test mode to determine image correction information that is used to suppress undesired image signals when the receiver switches to...
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7583734 |
Two-wire type data communication method and system, controller and data recording apparatus
When a controller transmits a clock pulse of a positive phase as a first transmit signal (a) and a clock pulse of an opposite phase as a second transmit signal (b), the controller modulates the...
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7580691 |
System and method for reducing self interference
A system for reducing self interference in a mobile terminal is provided. In general, the system includes a receiver including downconversion circuitry that converts a received radio frequency (RF)...
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7580498 |
Closed loop control system and method of dynamically changing the loop bandwidth
The invention provides a method for dynamically changing the loop bandwidth of a closed loop control system. At least one loop bandwidth parameter controls the loop bandwidth of the closed loop...
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7580483 |
Trimming of local oscillation in an integrated circuit radio
A method and apparatus for trimming of a local oscillation within a radio frequency integrated circuit (RFIC) includes processing that begins when an RFIC receives a radio frequency (RF) signal...
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7577219 |
Apparatus for communications
An apparatus for communications includes, a front processor for outputting a digital formatted base band signal with quadrature demodulating a modulated signal; an interpolation processor for...
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7577215 |
Angle demodulation apparatus, local oscillation apparatus, angle demodulation method, local oscillation signal generating method, recording medium and computer data signal
An FM modulation signal is mixed with a pair of first local oscillation signals to be converted to a pair of base band signals. The base band signals are respectively mixed a pair of second local...
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7577206 |
OFDM signal receiving apparatus and method for estimating common phase error of OFDM signals using data subcarriers
An Orthogonal Frequency Division Multiplexing (OFDM) signal receiving apparatus and method of estimating a common phase error (CPE) using data subcarriers (and pilot subcarriers) instead of only...
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7573955 |
Digital phase locked loop for sub-μ technologies
A digital phase locked loop has a digitally controlled oscillator for generating an output frequency, a phase detector device for detecting the phase difference between a reference frequency and an...
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7570722 |
Carrier frequency offset estimation for OFDM systems
A system comprises a receiver module that receives a signal that is modulated using coherent orthogonal frequency division multiplexing (OFDM) modulation. A signal to noise ratio (SNR) module...
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7567642 |
Phase detector with extended linear operating range
A method and apparatus for extending the linear range of a phase detector. In one embodiment, a limited range phase difference is generated between selected edges of first and second input signals,...
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7564928 |
System and method of frequency synthesis to avoid gaps and VCO pulling in direct broadcast statelite systems
A system and method for designing a broadband tuner such that VCO pulling is minimized and gaps in frequency coverage are avoided, while total power consumption is reduced, is disclosed. A...
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7542535 |
Method and apparatus for recovering a clock signal
A method includes receiving a serial data signal including a preamble and an embedded clock signal having an embedded clock signal frequency, and processing the preamble using logic to determine...
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7536160 |
Wideband phase shift device
The invention relates to a wideband phase shift device. A phase shift φ is introduced on the fixed frequency local oscillator. The principle of the invention is to realise a double translation of...
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7535981 |
Clock generation circuit and method thereof
The present invention generates an output clock signal CLKreq having a frequency freq between the frequency fref/A of a divided clock signal CKL 1 and the frequency fref/(A+1) of a divided clock...
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7535977 |
Sigma-delta based phase lock loop
A sigma-delta based phase lock loop device is provided that includes a phase frequency detector (PFD), a charge pump and a voltage controlled oscillator. The PFD to receive a reference signal and a...
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7535976 |
Apparatus and method for integration of tuner functions in a digital receiver
A receiver to process a RF input signal having a plurality of channels includes a direct down conversion circuit, a demodulation circuit, and a local oscillator circuit. The direct down conversion...
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7535953 |
Time information transmitter-receiver, and time information transmission-reception integrated circuit
A time information transmission-reception integrated circuit includes: a reception control circuit for detecting a signal obtained by receiving and amplifying an external radio wave, and generating...
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7532697 |
Methods and apparatus for clock and data recovery using a single source
A receiver circuit reduces the need for external clock sources such as crystal oscillators. The receiver circuit makes use of only a single source, the data input, for performing clock and data...
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7529331 |
Wobble clock generator and driving method thereof
A wobble clock generator with a protective mechanism that can avoid interference generated from a phase-modulated wobble signal. The wobble clock generator has an arithmetic/logic circuit and a...
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7529314 |
Carrier phase detector
Carrier phase detector for calculation of a feedback signal (D) for a carrier phase loop in a receiver,
which loop detects a phase error (Δφ) between a phase (φ in ) of a received signal (E in...
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7529290 |
Radar apparatus
A radar apparatus has a code generator, a transmission section, a reception section, a delay section, a despreading processor, a correlation value detector, a target detector, and an adjustment...
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7519113 |
Noise detection device
Noise detection is performed by using the output of the phase comparator that the PLL comprises. The phase comparator outputs a signal that is based on the phase difference between the output of...
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7515653 |
Digital broadcasting receiver, driving method thereof, and self-diagnosis method thereof
A digital broadcasting receiver, a driving method, and a self-diagnosis method thereof, are provided. The digital broadcasting receiver includes: a digital demodulator for demodulating a digital...
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7512202 |
Harmonic detector system and method
A harmonic detector including a pattern detector circuit responsive to a clock signal and a data signal configured to detect a target bit pattern from said data signal, and a time-out circuit...
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7508888 |
Method and apparatus for precise open loop tuning of reference frequency within a wireless device
A communications subsystem for a wireless device for correcting errors in a reference frequency signal. The communications subsystem comprises a frequency generator for generating the reference...
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7508860 |
Pulse signal generator for ultra-wideband radio transception and radio transceiver having the same
Provided are a pulse signal generator for UWB radio transception and a radio transceiver having the same. The pulse signal generator includes: an envelope generator generating a plurality of...
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7505533 |
Clock data recovery circuit with phase decision circuit
A clock data recovery circuit with feedback type phase discrimination. The clock data recovery circuit has an output signal of B bits and comprises a sampler, a phase region decision circuit, a...
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7489743 |
Recovery circuits and methods for the same
A recovery circuit may include a phase detector, a quadrant decision unit, a quadrant controller, a charge pump unit, and a phase interpolator. The phase detector may compare a phase of input data...
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7489660 |
Circuit for preventing signal quality degradation in CDMA system and method thereof
A system for preventing signal quality degradation in a CDMA system includes a phase locking unit for controlling a phase of an oscillating frequency signal by controlling a voltage control...
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7486718 |
Architectures, circuits, systems and methods for reducing latency in data communications
Circuits, architectures, systems and methods for facilitating data communications and/or reducing latency in data communications. The architecture includes a clock recovery loop receiving data from...
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7483508 |
All-digital frequency synthesis with non-linear differential term for handling frequency perturbations
An all-digital frequency synthesizer architecture is built around a digitally controlled oscillator (DCO) that is tuned in response to a digital tuning word (OTW). In exemplary embodiments: (1) a...
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7474878 |
Closed loop polar modulation system with open loop option at low power levels
A polar transmitter that is configurable as either a closed loop polar transmitter or an open loop polar transmitter is provided. In general, the polar transmitter is configured as an open loop...
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7474718 |
Frequency control for a mobile communications device
A mobile station in a TDMA network can perform automatic frequency using burst in all or any slot in a control channel. This is achieved by identifying the training sequence of an arbitrary set of...
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7463710 |
Fractional-N synthesizer and method of programming the output phase
A fractional-N synthesizer with programmable output phase including a phase locked loop having an output signal whose frequency is a fractional multiple of an input reference signal, the phase...
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7460587 |
Electronic circuit for performing fractional time domain interpolation and related devices and methods
A clock offset compensation arrangement may include a fractional interpolator for applying a trigonometric interpolation to a sampled input signal according to a clock offset signal. It uses...
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7457375 |
Timing extractor, timing extraction method, and demodulator having the timing extractor
In a timing component extractor for a digital modulated signal, a frequency converting section 30 receives a complex baseband signal having a symbol rate fs and formed from an I signal and a Q...
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7450921 |
Communication semiconductor integrated circuit device for use in a mobile communication device for correcting variations in the oscillation frequency of a transmission oscillator by calibrating a current of the charge pump
The invention provides a communication semiconductor integrated circuit (RF IC) that, when a transmission oscillator is incorporated into a semiconductor chip, secures the oscillation operation...
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7450920 |
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
Method and system for compensation of DC offset in an RF receiver
Aspects of compensating for DC offset in an RF receiver may comprise sampling data from at least one of a plurality of output paths, selecting a sampled data and generating at least one feedback...
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7447511 |
Method and device for equalizing mode selection
A method and a device for equalizing mode selection are disclosed. The method comprises steps of: providing first sampling pulses in response to an equalized signal; providing second sampling...
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7443930 |
Complex digital phase locked loop for use in a demodulator and method of optimal coefficient selection
A complex digital phase locked loop for use in a digital demodulator includes a phase detector for producing a phase error indicative of a difference in phase between a complex digital input signal...
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7443929 |
Method and circuit for adaptive control of the bandwidth of a carrier recovery loop in radio transmission systems
A method for adaptively controlling bandwidth of a carrier recovery loop in radio transmission systems, wherein the phase error in a PLL is adjusted to a minimum level by means of a loop filter...
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7443879 |
Communication between user agents through employment of codec format unsupported by one of the user agents
An apparatus in one example comprises one or more network controllers that serve to allow a second user agent to communicate with a first user agent through employment of a codec format unsupported...
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7440518 |
Phase-locked loop circuit
A PLL circuit comprises a controller (DRC) adjusting the frequency of frequency modulated signals (u DIV ) provided by a frequency modulator (DIV) on the basis of signals provided by a linear range...
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