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7035367 |
Fractional multi-modulus prescaler
A fractional multi-modulus prescaler is disclosed wherein the output of the VCO is separated into four signals 90 degrees phase-related to one another. The phase signals are selected by a...
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7019599 |
Apparatus for continuous phase quadrature amplitude modulation and demodulation
An apparatus for continuous phase quadrature amplitude modulation and demodulation to continuously process phases and amplitudes at symbol change points in an M-ary quadrature amplitude modulation...
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7020228 |
DLL circuit
A DLL (delay locked loop) circuit for outputting a phase lock signal having a predetermined phase relationship with an input signal. The DLL circuit has: a functional block having a...
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7003270 |
Electronic apparatus having radio transmitter
An electronic apparatus comprising a radio transmitter is disclosed. In a computer system ( 1 ) having a radio transmission circuit ( 3 ) of a phase modulation type supplied with power from a power...
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6999544 |
Apparatus and method for oversampling with evenly spaced samples
The architecture and the method of operation of a receiver core are described. The core performs clock and data recovery on an incoming serial data stream transmitted across a wired media, such as...
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6993306 |
Determination and processing for fractional-N programming values
Determination and processing for fractional-N programming values. The present invention is operable to receive a clock signal (CLK) and to transform that CLK into a new CLK, when necessary, for use...
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6993095 |
Phase-locked loop initialization via curve-fitting
A method and apparatus for accurately estimating the carrier frequency offset and the carrier phase offset of a digitally modulated signal using a signal processing algorithm to initialize the...
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6988227 |
Method and apparatus for bit error rate detection
A bit error rate detector detects whether at least one transition of an input data stream occurs in a predetermined phase zone of a sample clock used to sample the input data stream. Over multiple...
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6968167 |
Adaptive radio transceiver with calibration
An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a...
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6959064 |
Clock recovery PLL
A multimode clock recovery circuit for providing constant bit rate services in a cell relay network has an embedded digital phase locked loop including an input circuit capable of generating a...
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6947499 |
Angle demodulation apparatus, local oscillation apparatus, angle demodulation method, local oscillation signal generating method, recording medium and computer data signal
An FM modulation signal is mixed with a pair of first local oscillation signals to be converted to a pair of base band signals. The base band signals are respectively mixed a pair of second local...
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6940923 |
Demodulating device, broadcasting system, and semiconductor device
A demodulating device capable of high-efficiency, high-accuracy phase noise correction control and improved in quality and reliability. A digital signal generating portion synchronously detects a...
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6940936 |
Alternate timing signal for a vestigial sideband modulator
A remodulator timing signal ( 35 ) is generated by a phase locked loop ( 33 ) which is coupled to a broadcast vestigial sideband signal ( 5 ). Within the signal ( 5 ) is highly accurate timing data...
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6937670 |
Digital tuner
A digital tuner has an input tuning range with lower and upper limit frequencies. An up converter converts an input signal to an intermediate frequency signal whose frequency is higher than the...
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6937683 |
Compact digital timing recovery circuits, devices, systems and processes
A digitally implemented timing recovery circuit for recovering a clock signal from an input bit stream. The recovery circuit comprising an edge detector for detecting a transition from “0” to...
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6931082 |
Digital phase locked loop
A technique that enables the sine and cosine branches within a PLL module to be obtained relatively easily and efficiently is described. According to the technique, the computation operations...
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6925294 |
Antenna receiver in which carrier-to-noise ratio of demodulation signal is improved
An antenna receiver includes a plurality of mixers for frequency-converting signals received by a plurality of antennas into intermediate-frequency signals; a plurality of local oscillators, which...
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6914935 |
Fractional N synthesizer with reduced fractionalization spurs
A fractional N synthesizer is disclosed. The synthesizer includes a phase detector that receives first and second input signals and generates a pulse width modulated (PWM) output signal having a...
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6904098 |
Linear phase robust carrier recovery for QAM modems
In a QAM demodulator including an adaptive equalizer, a method of carrier tracking comprising the following steps is disclosed: (A) sampling a QAM signal received from a transmission channel; (B)...
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6891907 |
Frequency offset correction system and correction method
A frequency offset correction system includes a phase shift estimation unit and correction unit. The phase shift estimation unit estimates a pilot phase shift from pilot signal data for a plurality...
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6891420 |
Method and apparatus for digital frequency synthesis
A digital frequency synthesizer includes one or more reference clocks ( 104, 1316, 1502 A, 1504 A, 1506 A) optionally coupled through one or more pulse width reducers ( 106 ) to one or more main...
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6879629 |
Method and apparatus for enhanced timing loop for a PRML data channel
Methods and apparatus for enhanced timing loop are provided for a partial-response maximum-likelihood (PRML) data channel in a direct access storage device (DASD). An acquisition timing circuit for...
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6879623 |
Method and apparatus for timing recovery in a communication device
A receiving communication device synchronizes to a timing reference of a transmitting communication device based on a determined timing error. The receiving communication device determines the...
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6870892 |
Diversity receiver with joint baud clock recovery
First and second RF signals in the respective first and second channels of a multiple channel diversity receiver are processed jointly in a joint timing loop filter for baud clock recovery. The...
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6839388 |
System and method for providing frequency domain synchronization for single carrier signals
There is disclosed an improved system and method for providing frequency domain synchronization for a single carrier signal such as a vestigial sideband signal. The system comprises a...
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6829469 |
Method and a device for producing a signal
A method for producing an output signal ( 42 ) with a specific frequency from an input signal ( 40 ) received, the frequency of which changes quickly in steps of the size of an input frequency...
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6829311 |
Complex valued delta sigma phase locked loop demodulator
A complex valued delta sigma Phase Locked Loop (PLL) demodulator. The demodulator is a multiple stage demodulator. The first stage is a conversion stage which converts an incoming signal into a...
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6826246 |
Phase locked loop with control voltage centering
A phase-locked loop (PLL) with reduced jitter is provided. The PLL includes dual path voltage-controlled oscillator inputs, with a control voltage from a loop filter sent through a low gain path...
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6823033 |
&Sgr &Dgr delta modulator controlled phase locked loop with a noise shaped dither
This disclosure is directed to a frequency synthesizer for use in a wireless communication device. The frequency synthesizer includes an oscillator, such as a voltage controlled oscillator (VCO)...
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6819880 |
Loss of signal detection circuit for light receiver
An increase in the code error rate in a received signal is detected in a light receiver. An loss of signal detector circuit for a light receiver 20 comprises a main discrimination circuit 8 a ...
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6807245 |
PLO device
There is provided a PLO device which performs high-accuracy, high-quality clock recovery. A shifted data generation part generates shifted data, and a first phase comparison part outputs first...
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6807237 |
Radio apparatus and transmission/reception method
At the time of ordinary communication, up-mixer 108 combines a signal with a frequency f2 from frequency synthesizer 124 with I and Q signals for transmission that are quadrature modulated in...
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6807244 |
Frequency synthesizer
The invention proposes a frequency synthesizer for generating an output signal having a frequency associated with that of a reference clock, in which a control oscillating circuit generates a clock...
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6801585 |
Multi-phase mixer
A wireless receiver apparatus including a voltage controller oscillator and mixer. The voltage controlled oscillator generates a first signal having a first frequency, and a second signal having...
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6798855 |
Method and arrangement for fast synchronization of two carrier signals
During the synchronization, a first, analog carrier signal (bs) exhibits a predetermined phase position at least temporarily. A further reference carrier signal (rs) is modulated with the same...
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6785346 |
Complex phase-locked loop demodulator for low-IF and zero-IF radio receivers
A digital demodulator which coherently demodulates a low-IF or zero-IF complex signal using a complex-valued phase-locked loop (CPPL). The CPPL includes a numerical controlled oscillator, four...
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6785345 |
Frequency dithering for DDS spectral purity
A frequency dither technique is used for reducing spurs due to phase increment errors in a direct digital synthesizer output sinusoid. The spurs for a desired output frequency are calculated and,...
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6782068 |
PLL lockout watchdog
A circuit that may be configured to detect a lockout condition of a phase lock loop (PLL) circuit. The circuit may be configured to forcibly correct an operating frequency of the PLL circuit.
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6771729 |
Clock recovery circuit and transmitter-receiver therewith
A clock recovery circuit, according to the present invention, generates a clock signal that continuously maintains a fixed phase to an input data signal. It is made up of a phase comparator, charge...
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6771715 |
Demodulator using cordic rotator-based digital phase locked loop for carrier frequency correction
A digital data demodulator employs a cordic rotator-based, digital phase locked loop for carrier frequency tracking. Digitized I and Q channels downconverted to baseband using a fixed frequency...
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6771713 |
Data aided carrier phase tracking system for precoded continuous phase modulated signals
Data aided carrier phase and symbol timing synchronizers are implemented at baseband as digital modulators isolating input signal inphase and quadrature component signals fed into inphase and...
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6765977 |
Offset mode phase locked loop frequency synthesizer with reduced divide ratio
A phase locked loop (PLL) frequency synthesizer includes a voltage controlled oscillator (VCO) to provide a VCO frequency signal, a frequency offset circuit including a mixer accepting the VCO...
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6760076 |
System and method of synchronization recovery in the presence of pilot carrier phase rotation for an ATSC-HDTV receiver
There is disclosed a system and method for recovering a recurring data segment synchronization pattern in the presence of an arbitrary phase rotation of a pilot carrier by detecting and...
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6759838 |
Phase-locked loop with dual-mode phase/frequency detection
A phase-locked loop with dual-mode phase/frequency detection is provided. The phase-locked loop circuit includes a dual-mode phase/frequency detector, a loop filter, a voltage-controlled...
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6754289 |
Synthesizer receiver
A synthesizer receiver includes a variable bandpass filter having a variable width passband to which an intermediate frequency signal is supplied; a first detection circuit for detecting a level of...
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6738582 |
Synchronization system for all optical slotted ring dynamic networks
A method for communicating data over a network having a plurality of nodes thereupon is discussed. A time slot clock signal is transmitted from one node of the plurality of nodes to other nodes of...
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6738444 |
Apparatus and method of generating clock signal
A clock signal generating apparatus has a phase-lock loop circuitry. A phase comparator compares, in phase, an input digital signal with a clock signal that has already been generated. A...
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6738608 |
Frequency-timing control loop for wireless communication systems
A frequency-timing control loop comprising (1) a frequency control loop to acquire and track the frequency of a given signal instance in a received signal and (2) a timing control loop to acquire...
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6731698 |
Quadrature demodulation circuit capable for canceling offset
When a clock reproduction circuit ( 6 ) is locked, a phase comparator ( 9 ) detects a level difference ΔE between a zero crossing point and a true 0 level. The level difference ΔE represents an...
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6717462 |
QPSK and 16 QAM self-generating synchronous direct downconversion demodulator
A system for recovering and demodulating a carrier includes a carrier recovery loop and a data detector. The carrier recovery loop receives the carrier as an input and produces a recovered carrier...
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