Match Document Document Title
9230614 Separate microchannel voltage domains in stacked memory architecture  
Separate microchannel voltage domains in a stacked memory architecture An embodiment of a memory device includes a memory stack including one or more coupled memory dies, wherein a first memory...
9147462 Signal processing circuit and method for driving the same  
It is an object to provide a memory device for which a complex manufacturing process is not necessary and whose power consumption can be suppressed and a signal processing circuit including the...
9076505 Memory device  
A memory device including first to fourth memory cell arrays and a driver circuit including a pair of bit line driver circuits and a pair of word line driver circuits is provided. The first to...
9070466 Mismatch error reduction method and system for STT MRAM  
The invention relates to methods and systems for reading a memory cell and in particular, an STT MRAM. In accordance with one aspect of the invention, a method for reading a memory cell includes...
9058869 Applying a bias signal to memory cells to reverse a resistance shift of the memory cells  
Data is written to cells of a resistance-based, non-volatile memory. An activity metric is tracked since the writing of the data to the cells. In response to the activity metric satisfying a...
9047973 Group word line erase and erase-verify methods for 3D non-volatile memory  
An erase operation for a 3D stacked memory device assigned storage elements to groups according to an expected erase speed. The storage elements are then erased according to their group to provide...
9042157 Programmable volatile/non-volatile memory cell  
The invention concerns a memory device comprising at least one memory cell comprising: a first transistor (102) coupled between a first storage node (106) and a first supply line (GND, VDD); a...
9042183 Non-volatile semiconductor memory device having non-volatile memory array  
According to one embodiment, a non-volatile semiconductor memory device which is provided with a memory cell array, bit lines, word lines, and a sense amplifier circuit is presented. The memory...
9043740 Fabrication of a magnetic tunnel junction device  
A magnetic tunneling junction device and fabrication method is disclosed. In a particular embodiment, a non-transitory computer-readable medium includes processor executable instructions. The...
9042161 Memory device  
In a memory device, memory capacity per unit area is increased while a period in which data is held is ensured. The memory device includes a driver circuit provided over a substrate, and a...
9042192 Semiconductor device and semiconductor system including the same  
A semiconductor device includes two or more memory chips electrically coupled. Each of the memory chips includes global lines, a MUX unit, a selection unit, and an output unit. The global lines...
9042150 Programmable and flexible reference cell selection method for memory devices  
An exemplary system includes an array of interconnected cells and a flexible decoder. The array is configured to receive a selection signal as input, select a cell based upon the selection signal,...
9042191 Self-repairing memory  
A memory array has a plurality of rows including a plurality of memory words. Each first bit of a plurality of first bits is associated with a memory word of the each row. A state of the each...
9042189 Semiconductor memory device  
A semiconductor memory device includes: a burst start signal generation unit configured to generate a first burst start signal by delaying a write pulse by a first period, generate a second burst...
9042184 Non-volatile memory programming  
Some embodiments include a memory device and a method of programming memory cells of the memory device. One such method includes applying voltages to data lines associated with different groups of...
9039206 Projection display apparatus to store data using capacitor charges  
A projection display apparatus may include a light source, a power supply unit, a detecting unit, a nonvolatile memory, a capacitor, and a control unit. The power supply unit supplies power from...
9042176 Semiconductor memory device, system having the same and program method thereof  
The present invention relates to a semiconductor memory device and a program method thereof. The program method according to an embodiment of the present invention includes: precharging a...
9042182 Nonvolatile semiconductor memory device and verification control method for the same  
A nonvolatile semiconductor memory device includes a memory cell array, a plurality of local sense amplifiers, a global sense amplifier and an address decoder. The address decoder is configured to...
9042164 Anti-tampering devices and techniques for magnetoresistive random access memory  
A system may include circuitry and a magnetoresistive random access memory (MRAM) die including at least one MRAM cell. The circuitry may be configured to detect attempted tampering with the MRAM...
9042195 Control of inputs to a memory device  
A memory device includes a command decoder and control interface logic. One or more external inputs, such as row and column address strobes, communicate with the command decoder through the...
9042185 Row driver circuit for NAND memories including a decoupling inverter  
Devices, methods, and circuits for row driver architectures that can improve an existing row driver circuit including a boosting capacitor and a level shifter circuit. For example, the improvement...
9040953 Storage device  
According to one embodiment, a storage device includes first electrodes, second electrodes, a resistance change layer provided between the first electrodes and the second electrodes, and ion metal...
9042190 Apparatuses, sense circuits, and methods for compensating for a wordline voltage increase  
Apparatuses, sense circuits, and methods for compensating for a voltage increase on a wordline in a memory is described. An example apparatus includes a bitline, a memory cell coupled to the...
9042159 Configuring resistive random access memory (RRAM) array for write operations  
A system includes a resistive random access memory cell and a driver circuit. The resistive random access memory cell includes a resistive element and a switching element, and has a first terminal...
9042153 Programmable resistive memory unit with multiple cells to improve yield and reliability  
A method and system for a programmable resistive memory to improve yield and reliability has a plurality of programmable resistive units. Each programmable resistive unit can have at least one...
9042186 Solid state drive and data erasing method thereof  
A data erasing method of a solid state drive is provided. The solid state drive includes a memory module. The memory module includes a block. A data to be erased is stored in the block. The data...
9043539 Semiconductor device having a memory and calibration circuit that selectively adjusts an impedance of an output buffer dependent upon refresh commands  
A semiconductor device having a circuit that selectively adjusts an impedance of an output buffer. A calibration operation can be performed automatically without issuing a calibration command from...
9042148 Content addressable memory  
An entry including multiple bits of unit cells each storing data bit is coupled to a match line. The match line is supplied with a charging current having a restricted current value smaller than a...
9042170 Off-die charge pump that supplies multiple flash devices  
A system and method for storing data uses multiple flash memory dies. Each flash memory die includes multiple flash memory cells. A charge pump is adapted to supply charge at a predetermined...
9042158 Nonvolatile semiconductor memory device with protective resistance film  
A nonvolatile semiconductor memory device according to an embodiment includes a memory cell block that includes a memory cell array, the memory cell array including: a plurality of first lines; a...
9041436 Semiconductor device having pull-up circuit and pull-down circuit  
To reduce power supply noises occurring in a control circuit unit for controlling an output buffer. A semiconductor device includes unit buffers for driving a data output terminal, impedance...
9042171 Integrated circuit including a voltage divider and methods of operating the same  
An integrated circuit includes at least one memory array and at least one capacitor array over a substrate. The at least one capacitor array includes a plurality of capacitor cell structures. The...
9042194 Refresh method, refresh address generator, volatile memory device including the same  
A refresh method for a volatile memory device includes refreshing memory cells of a first set of rows of an array at a first refresh rate having a first refresh period, the first refresh rate...
9042165 Magnetoresistive effect element, magnetic memory cell using same, and random access memory  
A magnetoresistive effect element uses a perpendicularly magnetized material and has a high TMR ratio. Intermediate layers composed of an element metal having a melting point of 1600° C. or an...
9040178 TMR device with novel free layer structure  
A TMR sensor that includes a free layer having at least one B-containing (BC) layer made of CoFeB, CoFeBM, CoB, COBM, or CoBLM, and a plurality of non-B containing (NBC) layers made of CoFe,...
9042154 Non-volatile memory including reference signal path  
Some embodiments include apparatuses and methods having a first memory element and a first select component coupled to the first memory element, a second memory element and a second select...
9042173 Efficient memory sense architecture  
Memory architecture, such as for a flash EEPROM memory embedded within a processor or other large scale integrated circuit, and including differential sense circuitry. The memory includes an array...
9042197 Power fail protection and recovery using low power states in a data storage device/system  
Systems and methods for early warnings of power loss in solid state storage drives are disclosed. Early warnings of power loss can be used to power the drive to force the drive into a low power...
9043661 Memories and methods for performing column repair  
Memory devices adapted to repair single unprogrammable cells during a program operation, and to repair columns containing unprogrammable cells during a subsequent erase operation. Programming of...
9042181 Periodic erase operation for a non-volatile medium  
An apparatus, system, and method are disclosed for managing erase operations for a data storage medium. A method includes determining whether a use threshold for one or more non-volatile storage...
9042198 Nonvolatile random access memory  
According to one embodiment, a memory includes a memory cell array with banks, each bank including rows, a first word lines provided in corresponding to the rows, an address latch circuit which...
9042152 Data read circuit, a non-volatile memory device having the same, and a method of reading data from the non-volatile memory device  
A non-volatile memory device including a cell array, which includes a plurality of memory cells, and a sense amplification circuit. The sense amplification circuit is configured to receive a data...
9042162 SRAM cells suitable for Fin field-effect transistor (FinFET) process  
A static random access memory (SRAM) cell includes first and second n-channel transistors, first and second p-channel transistors, first and second enable transistors, and first and second pass...
9042180 Charge pump redundancy in a memory  
An integrated circuit includes a circuit block to utilize a load current at a load voltage from a power input and two or more charge pump arrays. The outputs of the charge pump arrays are coupled...
9042175 Non-volatile memory device and read method thereof  
Disclosed is a nonvolatile memory device which includes a memory cell connected to a bit line and a word line; a page buffer electrically connected to the bit line and sensing data stored in the...
9042166 Magnetoresistive effect element and method of manufacturing magnetoresistive effect element  
A magnetoresistive effect element includes first and second conductive layers, a first magnetic layer between the first and second conductive layers having a magnetization direction that is...
9040952 Semiconductor device and method of fabricating the same  
A semiconductor device includes a first conductive layer extending in a first direction, a second conductive layer extending in a second direction and disposed over the first conductive layer, the...
9042188 Memory controller and method of calibrating a memory controller  
A memory controller transmits a data signal, a data strobe signal and a mask signal to a memory, wherein each transition of the data strobe signal indicates a sample point for the data signal and...
9042163 Memory device having a local current sink  
A memory device having a local current sink is disclosed. In a particular embodiment, an electronic device is disclosed. The electronic device includes one or more write drivers. The electronic...
9042149 Volatile memory access via shared bitlines  
A memory includes an array of memory cells that form rows and columns. The rows of the array include memory cell pairs. The memory cells may include two cross-coupled inverters and two...