Matches 1 - 50 out of 366 1 2 3 4 5 6 7 8 >
Match Document Document Title
7623367 Read-only memory device and related method of design  
A ROM comprises several bit output lines and X address decode lines, and stores a data set. Each address decode line stores a unique data word. Addresses in the data set that have the same data...
7619913 Device, method and program for managing area information  
In an apparatus for managing area data, the first data structure for area management includes: a first index data structure including a first root node corresponding to a first set of areas...
7593817 Calculating confidence levels for peptide and protein identification  
Computer programs and methods for defining a misidentification probability for an experimental protein divisible into experimental peptides. The invention receives data representing a set of...
7577011 Optimization of ROM structure by splitting  
A method for designing a read-only memory (ROM), and related device, includes partitioning a dataset into two or more sub-datasets that each have the same address space, but are of a smaller...
7576407 Devices and methods for constructing electrically programmable integrated fuses for low power applications  
Electrically programmable integrated fuses are provided for low power applications. Integrated fuse devices have stacked structures with a polysilicon layer and a conductive layer formed on the...
7573077 Thyristor-based semiconductor memory device with back-gate bias  
In accordance with an embodiment of the present invention, a thyristor-based semiconductor memory device may comprise an array of thyristor-based memory formed in an SOI wafer. A supporting...
7570505 Memory based computation systems and methods for high performance and/or fast operations  
A high performance logic circuit optimizes a digital logic function by dividing the function into smaller blocks. Thus, the logic circuit is divided into smaller blocks. The smaller blocks are...
7567478 Leakage optimized memory  
A method of power optimization in a memory is disclosed. The method generally includes the steps of (A) dividing a plurality of bit cells in a design of the memory into (i) a plurality of first...
7566941 Magnetoresistive memory cell and process for producing the same  
A magnetoresistive memory cell includes a tunnel barrier region between first and second electrode devices. The first electrode device includes a natural antiferromagnet region. A diffusion barrier...
7565249 Method for the determination of a light transport parameter in a biological matrix  
A method is proposed for the selective determination of a light transport parameter which is characteristic for the light scattering in a biological matrix ( 5 ), in particular for the purpose of...
7561971 Methods and devices relating to estimating classifier performance  
Methods and devices, including methods and devices for estimating classifier performance such as generalization performance, are disclosed. One method includes providing multiple samples. Each...
7561456 Memory array including programmable poly fuses  
According to one exemplary embodiment, a memory array includes a memory cell having a programmable poly fuse coupled between a designated program node and a ground node, where the programmable poly...
7554831 Integrated circuit device with a ROM matrix  
A read only memory matrix in an integrated circuit contains data transistors coupled to both the bit lines and the word lines in data dependent ones of the cells of the matrix. A differential sense...
7535758 One or multiple-times programmable device  
Methods and apparatus, including computer program products, for a one or multiple-times programmable memory device. A semiconductor may include an active region of a substrate, a thin oxide layer...
7532533 Antifuse circuit and method for selectively programming thereof  
An antifuse circuit provides on a per bit basis a signal that indicates whether an MTJ (magnetic tunnel junction) antifuse has been previously programmed to a low resistance state in response to a...
7532496 System and method for providing a low voltage low power EPROM based on gate oxide breakdown  
A system and method are disclosed for providing an electrically programmable read only memory (EPROM) in which each memory cell comprises an NMOS select transistor and a PMOS program transistor...
7525871 Semiconductor integrated circuit  
Fuse data is supplied to each of a plurality of function blocks through a transfer path using shift registers. When the reliability of fuse elements is low, there is a possibility that a part of...
7522443 Flat-cell read-only memory structure  
The integrated circuit memory comprises a memory array including a plurality of memory cells in rows and columns, the memory array being divided into a plurality of blocks of the memory cells. Each...
7508693 One-time-programmable (OTP) memory device and method for testing the same  
An OTP memory device and method for testing the same is disclosed. The memory device includes a number of memory cells and each memory cell has an initial threshold voltage. Each memory cell is...
7505325 Low voltage low capacitance flash memory array  
In a p-type flash memory array, separate programming and read bit lines are provided. The programming bit line is used only to program the floating gate transistors in the memory cells connected to...
7505300 Nonvolatile semiconductor memory device using nonvolatile storage elements to which data can be written only once  
A nonvolatile semiconductor memory device includes a nonvolatile storage element to which data is inhibited from being rewritten, a read operation control circuit which captures a read operation...
7499355 High bandwidth one time field-programmable memory  
A one-time field programmable (OTP) memory cell with related manufacturing and programming techniques is disclosed. An OTP memory cell in accordance with one embodiment includes at least one...
7480166 Memory cell structure of metal programmable read only memory having bit cells with a shared transistor cell  
A memory cell structure of a metal (or via) programmable ROM whereby a transistor is shared between bit cells of the programmable ROM. Such a memory cell structure may include: a word line; a bit...
7466578 Methods and systems for read-only memory  
One embodiment of the present invention relates to a read only memory (ROM) that includes a memory cell pair. The memory cell pair includes a first memory cell and a second memory cell that share a...
7461371 General purpose memory compiler system and associated methods  
An enhanced memory compiler system and associated methods are provided. In one example, a method for accessing a plurality of memory compiler units includes: prompting, via a multi-compiler...
7457144 Memory device and method for verifying information stored in memory cells  
A memory device comprises a plurality of first and second non-volatile memory cells arranged as an array. Each memory cell stores information. The memory device further comprises an access unit...
7457143 Memory device with shared reference and method  
A memory device has a first core memory array, a second core memory array, a third core memory array and a fourth core memory array, and a first common reference section for the first core memory...
7443719 Superconducting circuit for high-speed lookup table  
A high-speed lookup table is designed using Rapid Single Flux Quantum (RSFQ) logic elements and fabricated using superconducting integrated circuits. The lookup table is composed of an address...
7443706 High-performance memory and related method  
In memory array of a memory circuit, a discharging module and an auxiliary module are disposed on each column line. While accessing an objective memory unit on a column line of the memory, the...
7440306 Method for programming one-time programmable memory of integrated circuit  
A method for programming a one-time programmable memory of an integrated circuit includes the following steps: writing an instruction set into the one-time programmable memory via a first...
7423905 Read-only memory using linear passive elements  
A read-only memory (ROM) is disclosed that uses the presence or absence of linear passive electrical elements, such as resistors or capacitors, to encode zeros and ones, permitting a large-area ROM...
7411833 Nitride trapping memory device and method for reading the same  
A nitride trapping memory device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias unit is...
7411808 Method for reading ROM cell  
A method for reading data stored in a multiple bit memory cell, the memory cell comprising a switch located within an array of switches arranged in columns and rows, each switch having a control...
7388770 One-time programable memory with additional programming time to ensure hard breakdown of the gate insulating film  
A nonvolatile semiconductor memory device includes a storage element which is programmed with information by breaking an insulating film by application of electrical stress to the storage element,...
7386652 User-configurable pre-recorded memory  
In a user-configurable pre-recorded memory (UC-PM), a user can select contents he is interested in, and pay copyright fees accordingly. With large capacity, low cost and great integratibility,...
7382640 High-speed programmable ROM, memory cell structure therefor, and method for writing data on/reading data from the programmable ROM  
A high-speed programmable ROM, a memory cell structure therefor, and a method for writing data on/reading data from the programmable ROM are provided. The programmable ROM system has a plurality of...
7379332 Systems-on-chips including programmed memory cells and programmable and erasable memory cells  
An integrated circuit memory device includes programmed memory cells and programmable and erasable memory cells. The memory device includes a first memory array block in which programmed memory...
7356417 Methods, systems and computer program products for dynamic scheduling and matrix collecting of data about samples  
Data is collected about samples that possess characteristics that change over time and that are contained in any array of containers arranged in a container spatial relationship. A matrix of cells...
7355878 Programmable logic devices optionally convertible to one time programmable devices  
Programmable logic devices (PLDs) that can be repeatedly erased and reprogrammed, e.g., during the testing and/or design phases, and then converted to one-time programmable (OTP) devices on a...
7352604 Memory and driving method of the same  
According to the invention, mounting area is decreased and yield is improved by decreasing the number of elements, and a memory with less burden on peripheral circuitry and a driving method thereof...
7327594 Read-only memory with twisted bit lines  
Bit lines (BL 0 , BL 0 R, BL 1 , BL 1 R, . . . ) of a ROM memory array with differential detection reading are arranged within two overlaid metallization levels so as to increase the read...
7327593 ROM memory cell having defined bit line voltages  
The invention relates to a ROM memory cell of a ROM memory, which provides a first predetermined potential or a second predetermined potential in the driven state at a memory cell output in a...
7324397 Semiconductor integrated circuit  
A semiconductor integrated circuit has a nonvolatile memory and a logic circuit which uses information stored in the nonvolatile memory to perform logical operation. The nonvolatile memory...
7321502 Non volatile data storage through dielectric breakdown  
A method is described that induced dielectric breakdown within a capacitor's dielectric material while driving a current through the capacitor. The current is specific to data that is being written...
7319627 Memory device  
A sense amplifier circuit for a non-volatile semiconductor memory device is used to output data written in a selected non-volatile memory cell and is constructed as a current mirror circuit...
7317643 Semiconductor memory device  
Disclosed herein is a semiconductor memory device which prevents the voltage of a select bit line from being reduced due to the action of coupling capacitance between the select bit line and a...
7310261 Nitride read-only memory (NROM) device and method for reading the same  
A nitride read-only memory (NROM) device includes a comparator, a bias unit, a memory cell, a cycling cell, a compensation cell and a control unit. The comparator has a reference voltage. The bias...
7302348 Method and system for quantifying and removing spatial-intensity trends in microarray data  
A method and system for quantifying and correcting spatial-intensity trends for each channel of a microarray data set having one or more channels. The method and system of one embodiment of the...
7298639 Reprogrammable electrical fuse  
A electrically blowable fuse is programmed using an electro-migration effect and is reprogrammed using a reverse electro-migration effect. The state (i.e., “opened” or “closed”) of the...
7283912 DNA probe design device and information processing method for DNA probe design  
The number of times of manifestation of each of a plurality of partial base sequences obtained from own base sequence data containing a target base sequence is counted, and held as an own frequency...
Matches 1 - 50 out of 366 1 2 3 4 5 6 7 8 >