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6434035 Memory system  
The memory system has data lines for transmitting data between memory components and at least one control unit. The memory system is a distributed system with at least one central control unit and...
5680341 Pipelined record and playback for analog non-volatile memory  
A non-volatile analog memory contains multiple recording pipelines for sampling and storing values representing an analog signal and/or multiple playback pipelines for playing a recorded signal....
5612964 High performance, fault tolerant orthogonal shuffle memory and method  
A high performance fault tolerant orthogonal shuffle memory comprising a plurality of memory cells arranged to form a two-dimensional array of rows and columns. Each memory cell includes a data...
5485597 A CCD array memory device achieving high speed accessing by writing and reading data through a cache memory  
A memory device for storing analog or multilevel data which is easy to produce and of a small scale. The memory device according to the present invention circulates data between a plurality of...
5373464 CCD array memory device having dual, independent clocks of differing speeds  
The present invention provides a memory device for preventing data circulating on a plural number of linear CCD array from being corrupted, for accessing data at a high speed, and for reducing the...
5155779 Optical circulating shift register  
An all-optical circulating shift register encodes a received optical clock signal with a value derived from an encoded optical signal received at a control port thereof. A data input to the shift...
4923267 Optical fiber shift register  
An optical shift register constructed from at least two optical memory cells connected in cascade, each memory cell having an optical combiner, a 1×2 optical switch, a clock, and an optical...
4415991 Multiplexed MOS multiaccess memory system  
Multiaccess memory modules are each connected by means of a bus to a system ddress multiplexer and to a system data multiplexer/demultiplexer. Each module includes a multiaccess memory connected to...
4388701 Recirculating loop memory array having a shift register buffer for parallel fetching and storing  
A recirculating loop memory array is disclosed adapted for the parallel as well as serial fetching and storing of data while requiring only a single input and single output data terminal. Each loop...
RE31153 Mass memory access method and apparatus  
A method and apparatus for transferring digital data between a mass memory and a random access memory. The mass memory has a plurality of memory loops, each having a plurality of memory cells, and...
4321694 Charge coupled device memory with enhanced access features  
A circulating shift register memory, particularly adaptable to charge coupled device technology, wherein a plurality of circulating shift registers are arranged to provide a matrix of data bits...
4236227 Data storage system  
A storage system stores information in the form of records each having a key portion and a data portion. These records are stored in key order. The records are stored in a shift register,...
4215423 Fast access charge coupled device memory organizations for a semiconductor chip  
This disclosure relates to fast access CCD memory organizations with parallel loops or tracks wherein the total number of data bits which can be stored on a single calculator chip is dependent on...
4165541 Serial-parallel-serial charge-coupled device memory having interlacing and ripple clocking of the parallel shift registers  
A serial-parallel-serial organized charge-coupled device memory incorporates interlacing and ripple clocking of the parallel shift registers to achieve a high density of bits per unit area. The...
4165539 Bidirectional serial-parallel-serial charge-coupled device  
A bidirectional serial-parallel-serial charge-coupled device wherein each serial section is both an input register and an output register, and serial streams of charge packets flow simultaneously...
4164041 Memory organization to distribute power dissipation and to allow single circuit pack memory growth  
A word organized random access memory comprises a plurality of circuit packs arranged such that the memory capacity can be easily increased or decreased in increments corresponding to the word...
4156287 Fast access charge coupled device memory organizations for a semiconductor chip  
This disclosure relates to fast access CCD memory organizations with parallel loops or tracks wherein the total number of data bits which can be stored on a single calculator chip is dependent on...
4152781 Multiplexed and interlaced charge-coupled serial-parallel-serial memory device  
An interlaced charge-coupled serial-parallel-serial memory device unscrambles the scrambled bit sequence produced by conventional interlacing, so that the output serial data bit stream has the same...
4118795 Two-phase CCD regenerator - I/O circuits  
Insulated gate field effect transistor charge regenerator amplifiers respectively cross-couple the output regions of a pair of two-phase CCD structures with the input regions of those structures....
4112504 Fast access charge coupled device memory organizations for a semiconductor chip  
This disclosure relates to fast access CCD memory organizations with parallel loops or tracks wherein the total number of data bits which can be stored on a single calculator chip is dependent on...
4101973 Random access memory with volatile data storage  
The invention provides a random access memory which consists of a plurality of recirculating sub-memories each having a fixed number of cells for volatile information storage and a further cell,...
4088876 Error correcting circuits and methods for shift register type memories  
This disclosure relates to error correcting circuits and methods employed thereby for shift register type memories which are formed of a plurality of loops that may be accessed in parallel. Such...
3984821 Associative memory using recirculatory shift register cells  
In an associative memory, each cell 20 (FIG. 2) includes a recirculatory shift register 30 in which information is stored, a comparator 31 for comparing the stored information with a key fed on...
3940749 Circulatory storage network for coded data  
A network for the temporary storage of binary code words, such as calling digits accompanied by line-identification signals in a telecommunication system, includes a multistage shift register...
3906455 Associative memory device  
Apparatus for storing and associatively manipulating a large (10 × 10 6 character) data base is disclosed. Said apparatus providing access control to devices constructed to operate in a block...
3889245 Metal-insulator-semiconductor compatible charge transfer device memory system  
A semiconductor charge transfer device memory system is provided which is compatible with metal-insulator-semiconductor circuitry and which can be organized into a variety of configurations, on a...
3859640 CONCURRENT DATA ADDRESS AND REFRESH CONTROL FOR A VOLATILE LSI MEMORY SYSTEM  
A novel internal organization of an LSI memory chip for optimum refresh control is disclosed. The chip is organized in a plurality of N similar memory loops in which the M data bits that are stored...
3812476 MEMORY DEVICE  
A memory device is disclosed. The memory device is comprised of a plurality of shift registers and a plurality of majority voters. The outputs of each of said shift registers are connected to the...
3810126 RECIRCULATION MODE ANALOG BUCKET-BRIGADE MEMORY SYSTEM  
A bucket-brigade delay line (BBDL) is selectively operable in an analog signal read-in mode or memory recirculate mode with signal storage (hold) intervals therebetween. A clock control logic...
3668662 ACOUSTIC DELAY LINE MEMORY SYSTEM  
An information storage system utilizing an acoustic medium having its surface subdivided into a plurality of individually isolated acoustic transmission channels upon which a plurality of transmit...
3656122 TIME-SHARED SHIFT REGISTER COUNTER WITH COUNT MODIFIED EACH Nth RECIRCULATION  
Numbers representing time periods are stored in a plurality of shift registers, each register being associated with a digit of the stored number. Each shift register has a plurality of stages,...
3523284 INFORMATION CONTROL SYSTEM  
3520000 TWO-DIMENSIONAL DELAY LINE MEMORY  
3493938 RECIRCULATING DELAY LINE SIGNAL STORAGE SYSTEM  
3471835 INFORMATION STORAGE DEVICES USING DELAY LINES  
3462745 APPARATUS FOR TRAVERSING DIGITAL INFORMATION ACROSS BAND-PASS TRANSMISSION MEDIA  
3430211 SYSTEM FOR STORING CODED CHARACTER REPRESENTATIONS  
3413615 Delay line buffer storage circuit  
3405397 Multi-channel dynamic memory system for analog signals  
3387284 Long digital delay  
3366935 Automatic contour display  
3302176 Message routing system  
3280332 Ferroelectric amplifier for driving light emitting load  
3275993 Multiple shift register buffer store  
3262102 Information buffer input circuit  
3231867 Dynamic data storage circuit  
3229258 Digital storage system  
3153776 Sequential buffer storage system for digital information  
3144638 Time compression storage circuit  
3108193 Storage register  
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