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7610447 Upgradable memory system with reconfigurable interconnect  
Described herein is a point-to-point memory communications architecture, having a point-to-point signal line set associated with each of a plurality of connectors or module positions. When the...
7603510 Semiconductor device and storage cell having multiple latch circuits  
A semiconductor storage device including a first latch circuit for latching stored data and a storage cell part including a plurality of second latch circuits that operate with inverted logic from...
7599205 Methods and apparatus of stacking DRAMs  
Large capacity memory systems are constructed using stacked memory integrated circuits or chips. The stacked memory chips are constructed in such a way that eliminates problems such as signal...
7599167 Active balancing circuit modules, systems and capacitor devices  
Circuit modules, systems and devices for controlling voltages across capacitors.
7577789 Upgradable memory system with reconfigurable interconnect  
Described are systems that employ configurable on-die termination elements that allow users to select from two or more termination topologies. One topology is programmable to support rail-to-rail...
7558096 Stacked memory  
A stacked memory is configured such that a ratio between data and ECC bits, a ratio between quantities of data layers and ECC layers, and a ratio between quantities of data activated mats and ECC...
7546397 Systems and methods for allowing multiple devices to share the same serial lines  
Methods and systems for allowing multiple devices to share the same serial lines (e.g., SDIO, SEN and SCLK) are provided. Such devices can be located, e.g., on an optical pick-up unit. Each device...
7542322 Buffered continuous multi-drop clock ring  
A method, system and apparatus to distribute a clock signal among a plurality of memory units in a memory architecture. A buffer chip is coupled to a plurality of memory units each by a point to...
7539034 Memory configured on a common substrate  
A memory includes a first macro chip, a spine chip, and a common substrate. The common substrate is configured to pass signals between the first macro chip and the spine chip. The first macro chip,...
7515451 Memory apparatus with a bus architecture  
A system comprises a board, memory units that are arranged on the board, a control unit configured to control memory access to the memory units, at least one control/address bus configured to...
7489579 Device and method for controlling refresh rate of memory  
A control device and method are used for adjusting the refresh rate of a memory module in a computer system. The device includes a thermo sensor and a control circuit. In the control method, the...
7489534 Semiconductor package for forming a double die package (DDP)  
A semiconductor package for forming a Double Die Package (DDP) with a plurality of single chips includes: a buffer configured to buffer an external address to generate a row address which is...
7480201 Daisy chainable memory chip  
A memory chip suitable for use in a daisy chain of memory chips. The memory chip receives an address/command word on a first input, determines if the address command word is directed to the memory...
7480165 Microcontroller with programmable logic  
A programmable logic, a memory and a microcontroller. The memory is coupled to the programmable logic circuit via the microcontroller. The programmable logic circuit, the memory and the...
7477545 Systems for programmable chip enable and chip address in semiconductor memory  
Memory die are provided with programmable chip enable circuitry to allow particular memory die to be disabled after packaging and/or programmable chip address circuitry to allow particular memory...
7471538 Memory module, system and method of making same  
A memory module, system and method of making the same includes a memory module including a plurality of memory devices having a first portion of memory devices cooperatively forming a first rank of...
7440349 Integrated semiconductor memory with determination of a chip temperature  
An integrated semiconductor memory capable of determining a chip temperature includes first control terminals for driving the integrated semiconductor memory with first control signals for...
7433229 Flash memory device with shunt  
A shunt activation signal is transmitted by an external control terminal through an external transmission interface to switch a flash memory controller in a shunt mode. The shunt activation signal...
7420830 Memory card module  
A memory card module includes a first circuit board, and a second circuit board. On one surface of the first circuit board, there are flash memories and a controller. The second circuit board is...
7411806 Memory module and memory system  
A memory module has a plurality of DRAMs ( 115 ), which share a bus line, on the front surface and the back surface of a board. The bus line is connected through a via hole ( 113 ) from a terminal...
7411794 Carrier unit for a semiconductor device and semiconductor socket using the same  
In a carrier unit, a posture-stabilizing member 30 for stabilizing a bare chip to be generally parallel to a flat surface of an electrode sheet 32 is placed on the electrode sheet 32 in a...
7408798 3-dimensional integrated circuit architecture, structure and method for fabrication thereof  
An integrated circuit design, structure and method for fabrication Thereof includes at least one logic device layer and at least two additional separate memory array layers. Each of the logic...
7405993 Control component for controlling a semiconductor memory component in a semiconductor memory module  
A semiconductor memory module includes a control component connected via various buses to semiconductor memory components on the top and bottom of a module board. Depending on the storage capacity...
7394713 Fuse memory cell with improved protection against unauthorized access  
A memory device is provided, the memory device having a memory cell, a programming unit for programming the memory cell, and a switching unit for optionally connecting or isolating a terminal of...
7391635 Method and apparatus for variable-resolution memory  
An apparatus and method for storage and retrieval of memory content including a storage structure containing a plurality of memory elements addressable as a two-dimensional array of memory content...
7379334 Memory card, semiconductor device, and method of controlling memory card  
A semiconductor device includes a transfer section which receives, from an external source, a second program for modifying a function of a first program stored in a read-only memory (ROM) and...
7379316 Methods and apparatus of stacking DRAMs  
Large capacity memory systems are constructed using stacked memory integrated circuits or chips. The stacked memory chips are constructed in such a way that eliminates problems such as signal...
7362603 Stagger memory cell array  
A memory device includes a first memory cell area having a first latch area where one or more electronic components are constructed for storing a value, and a first peripheral area surrounding the...
7362564 Docking assembly for coupling a nonvolatile memory device to an electronic device  
An apparatus, system, and method for a tray to receive and couple a nonvolatile memory device to an electronic device disposed within a housing, are disclosed herein.
7353316 System and method for re-routing signals between memory system components  
A plurality of memory modules used in a computer system each include a memory hub that is connected to a plurality of memory devices. The memory modules are connected to each other in series so...
7349238 Ferroelectric memory device  
An operation switch circuit receives a command specifying operational specifications from a host. An operation control circuit controls the time of voltage application to a plate line based on an...
7342815 DQS signaling in DDR-III memory systems without preamble  
A data transmission system, particularly as part of a DDR-III memory chip communication circuit, performs a data transmission operation without preamble. The data transmission system includes at...
RE40147 Memory card device including a clock generator  
Disclosed herein is a card having a controller and a clock control circuit. The controller incorporates a core logic, and the clock control circuit incorporates a PLL. When a card becomes idle to...
7333355 Techniques for implementing accurate operating current values stored in a database  
Memory modules and methods for fabricating and implementing memory modules wherein unique operating current values corresponding to specific memory devices on the memory modules are accessed from a...
7324364 Layout techniques for memory circuitry  
An integrated circuit includes memory circuitry with a number of bit line structures, each including at least three bit lines; a number of word lines that intersect with the bit line structures at...
7286435 Memory card device having low consumed power in the consumed power state  
A card device has a regulator ( 5 ), a first internal circuit ( 6 ) and a second internal circuit ( 7 ), and the regulator supplies, to the second internal circuit, an internal voltage generated by...
7286396 Bit line selection transistor layout structure  
A BLT can include a different channel length, channel width, or both to compensate for bit line loading effects. The channel length and/or channel width of the transistor structure can be...
7286386 Semiconductor device  
A semiconductor device uses a package substrate on which bonding leads are formed respectively corresponding to bonding pads for address and data which are distributed to opposing first and second...
7269043 Memory module and impedance calibration method of semiconductor memory device  
Disclosed is a memory module and a method of calibrating an impedance of a semiconductor memory device of the memory module, where the memory module includes semiconductor memory devices each...
7262983 Semiconductor memory  
A DRAM adopting a single-intersection memory cell array having randomly accessible data registers accessed whenever the chip is accessed externally. When data items recorded in the data registers...
7224595 276-Pin buffered memory module with enhanced fault tolerance  
A dual inline memory module (DIMM) includes a card having a length of about 151.2 to about 151.5 millimeters, a plurality of individual local memory devices attached to the card, and a buffer...
7215561 Semiconductor memory system having multiple system data buses  
The semiconductor memory system includes a memory controller, N system data buses, and first through P-th memory module groups. The N system data buses are connected to the memory controller and...
7212423 Memory agent core clock aligned to lane  
Memory apparatus and methods align a core clock for a memory agent to one of a plurality of lanes. A memory agent may have logic circuit between the lanes and a core clock generator to align the...
7212422 Stacked layered type semiconductor memory device  
To provide laminated type semiconductor memory devices that can improve the yield of chips without complicating wirings and components. There are provided a plurality of laminated semiconductor...
7200023 Dual-edged DIMM to support memory expansion  
A method and system for expanding the number of memory modules that can be coupled to a motherboard such as a server blade is presented. A stack of multiple Dual In-line Memory Modules (DIMMs) is...
7167967 Memory module and memory-assist module  
A computer body outputting a predetermined number of address signals A 0 to A 11 and a plurality of select signals CSO and CSI, generates a memory select signal CS and an additional address...
7161820 Memory module and memory system having an expandable signal transmission, increased signal transmission and/or high capacity memory  
A memory module has a plurality of DRAMs ( 115 ), which share a bus line, on the front surface and the back surface of a board. The bus line is connected through a via hole ( 113 ) from a terminal...
7143207 Data accumulation between data path having redrive circuit and memory device  
Memory apparatus and methods accumulate data between a data path and a memory device. A memory agent may have a data accumulator between a redrive circuit and a memory device or interface. The data...
7113417 Integrated memory circuit  
In a memory circuit integrated on a semiconductor chip, an interface system is formed between the connection pads and associated internal signal lines and contains a respective separate and...
7106611 Wavelength division multiplexed memory module, memory system and method  
A computer system includes a controller linked to a plurality of memory modules each of which has an optical memory hub and several memory devices coupled to the memory hub. The controller...
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