Patents in Class 365/51

Matches 1 - 50 out of 1162

Match	Document	Document Title
1	7623365	Memory device interface methods, apparatus, and systems Apparatus and systems may include a substrate, an interface chip disposed on the substrate, a first memory die having a plurality of memory arrays disposed on the interface chip, the first memory...
2	7623364	Semiconductor device A technology that makes it possible to reduce fluctuation in operating voltage for operating the circuits formed in the core region of a semiconductor device is provided. This semiconductor device...
3	7619912	Memory module decoder A memory module connectable to a computer system includes a printed circuit board, a plurality of memory devices coupled to the printed circuit board, and a logic element coupled to the printed...
4	7616630	Semiconductor memory device A semiconductor memory device resolves skew problem due to delay difference between the case when data that is inputted through data input/output (IO) pin is transferred to one global I/O bus and...
5	7609538	Logic process DRAM A semiconductor integrated circuit device includes a dynamic random access memory (DRAM) unit. The DRAM unit comprises a plurality of bit line pairs. Each bit line pair includes a first bit line...
6	7606992	High performance data rate system for flash devices A Flash memory system includes N flash devices, where N is an integer, each flash device having a flash device interface consisting of a control signal line, a R/B signal line, and a I/O signal...
7	7606057	Metal line layout in a memory cell A memory cell includes polysilicon gates 2 running in a first direction. A sequence of layers metal lines includes a layer of bit lines 4 running in a second direction substantially orthogonal...
8	7606055	Memory architecture and cell design employing two access transistors An improved memory array architecture and cell design is disclosed in which the cell employs two access transistors. In one embodiment, the two access transistors in each cell are coupled at one of...
9	7603510	Semiconductor device and storage cell having multiple latch circuits A semiconductor storage device including a first latch circuit for latching stored data and a storage cell part including a plurality of second latch circuits that operate with inverted logic from...
10	7599239	Methods and systems for reducing heat flux in memory systems Systems and methods for reducing heat flux in memory systems are described. In various embodiments, heat flux reductions are achieved by manipulating the device IDs of individual memory devices...
11	7599205	Methods and apparatus of stacking DRAMs Large capacity memory systems are constructed using stacked memory integrated circuits or chips. The stacked memory chips are constructed in such a way that eliminates problems such as signal...
12	7596047	Memory card and control chip capable of supporting various voltage supplies and method of supporting voltages thereof A memory card and a control chip capable of supporting various voltage supplies and a method of supporting voltages are discussed. The memory card includes a flash memory and a control chip for...
13	7596011	Logic process DRAM An integrated circuit device comprises a plurality of bit line pairs. First and second bit lines are aligned with each other in an end-to-end arrangement. The first and second bit lines are...
14	7594123	Data recording apparatus and method and data reproducing apparatus and method A recording method for a recording medium, wherein an encrypting process is executed to inputted contents data by using either key data, which becomes key data only for use of the recording medium...
15	7593246	Low cost high density rectifier matrix memory A high density memory device is fabricated three dimensionally in layers. To keep points of failure low, address decoding circuits are included within each layer so that, in addition to power and...
16	7590020	Semiconductor memory, semiconductor memory system and method of monitoring dynamic temperature thereof A memory hub control block may be configured to decode a command packet received from a host and determine whether the command packet has designated the memory hub. If the command packet does not...
17	7580273	Digital memory with controllable input/output terminals Methods and apparatus for controlling an input/output (I/O) driver of an I/O terminal based at least in part on the values being provided to the I/O terminal is disclosed. In various embodiments, a...
18	7577010	Integrated circuits, methods for manufacturing integrated circuits, integrated memory arrays The present invention relates generally to integrated circuits, to methods for manufacturing integrated circuits, and to integrated memory arrays.
19	7573775	Setting threshold voltages of cells in a memory block to reduce leakage in the memory block In one embodiment, a memory block includes one or more bit lines that each include two or more cells. Each cell in each bit line has a distance from a sense amplifier coupled to the bit line, and...
20	7570511	Semiconductor memory device having a three-dimensional cell array structure A semiconductor memory device includes a plurality of cell array layers including a plurality of word lines extending in a first direction, a plurality of bit lines extending in a second direction...
21	7570504	Device and method to reduce wordline RC time constant in semiconductor memory devices A semiconductor memory device and a method of making and using a semiconductor memory device containing a word line design, which is used in ultra-large scale integrated (ULSI) circuits, that...
22	7558124	Memory interface to bridge memory buses A memory interface to bridge a parallel memory bus and a serial memory bus. A printed circuit board includes at least one memory interface buffer chip to connect a memory controller of core logic...
23	7558096	Stacked memory A stacked memory is configured such that a ratio between data and ECC bits, a ratio between quantities of data layers and ECC layers, and a ratio between quantities of data activated mats and ECC...
24	7554829	Transmission lines for CMOS integrated circuits Improved methods and structures are provided for impedance-controlled low-loss lines in CMOS integrated circuits. The present invention offers a reduction in signal delay. Moreover, the present...
25	7551467	Memory device architectures and operation Non-volatile memory devices utilizing a modified NAND architecture where ends of the NAND string of memory cells are selectively coupled to different bit lines may facilitate increased memory...
26	7551465	Reference cell layout with enhanced RTN immunity A reference cell layout includes a plurality of active areas, in parallel to each other, and a first contact of the active areas, and a first gate, the first contact shorting the active areas. A...
27	7548477	Method and apparatus for adapting circuit components of a memory module to changing operating conditions A method adapts circuit components of a memory module to changing operating conditions within a predefined range. According to one embodiment, a memory module provides a sensor arrangement and a...
28	7548444	Memory module and memory device In a memory module including a plurality of DRAM chips which transmit/receive a system data signal with a predetermined data width and at a transfer rate and which transmit/receive an internal data...
29	7545664	Memory system having self timed daisy chained memory chips A memory system having a memory controller and a memory. The memory comprises one or more daisy chains of self timed memory chips. An address/command word is chained through a daisy chain of memory...
30	7545651	Memory module with a predetermined arrangement of pins A memory module according to one implementation includes a support substrate, plural memory devices mounted on the support substrate, and pins having a predetermined arrangement on the support...
31	7542364	Semiconductor memory device A semiconductor memory device includes a plurality of sense amplifiers each supplying a higher write potential and a lower write potential to each of memory cells; a driver circuit supplying the...
32	7542321	Semiconductor memory device with power supply wiring on the most upper layer A memory cell array in a semiconductor substrate has a plurality of memory cells arranged in rows and columns. A first circuit is located at one end of the memory cell array in a column direction....
33	7542320	Semiconductor memory device A semiconductor memory device includes a plurality of word lines arranged above a semiconductor substrate to extend in a row direction; a plurality of digit lines arranged above the semiconductor...
34	7539036	Semiconductor memory device including plurality of memory mats A semiconductor memory device includes a plurality of memory mats each including a memory cell storing data, a sense latch portion performing detection of data stored by the memory cell, and a...
35	7535743	SRAM memory cell protected against current or voltage spikes A memory cell is protected against current or voltage spikes. The cell includes a group of redundant data storage nodes for the storage of information in at least one pair of complementary nodes....
36	7532537	Memory module with a circuit providing load isolation and memory domain translation A memory module includes a plurality of memory devices and a circuit. Each memory device has a corresponding load. The circuit is electrically coupled to the plurality of memory devices and is...
37	7529114	Semiconductor memory device A semiconductor memory device includes a bit line which is provided above a semiconductor substrate and runs in a first direction, a source line which is provided above the semiconductor substrate...
38	7525829	Semiconductor storage device A semiconductor storage device that is capable of utilizing dummy cells effectively and enhancing the memory cell density. Every second row of bit lines (second bit lines) in terminal memory mats ...
39	7522440	Data input and data output control device and method A data input and data output control device and method in which a plurality of write or read data composed of m (2 n +k) bits (where m, n, and k are all integers) may be accessed within one clock...
40	7518898	Semiconductor memory device with strengthened power and method of strengthening power of the same In a semiconductor memory device the power level of which is strengthened by using data input/output pads in a no connection state, and a method of strengthening the power of the semiconductor...
41	7515450	Nonvolatile semiconductor storage device A flash memory 1 based on the multilevel storage technology for storing the information of two or more bits is provided with four banks 2 a to 2 d . For example, in the left side of the bank ...
42	7495975	Memory system including on-die termination unit having inductor Provided is a memory system with an inductor. In the memory system, the inductor is connected to an on-die termination unit of a memory chip, thereby realizing constant gain characteristics without...
43	7489579	Device and method for controlling refresh rate of memory A control device and method are used for adjusting the refresh rate of a memory module in a computer system. The device includes a thermo sensor and a control circuit. In the control method, the...
44	7489546	NAND architecture memory devices and operation Non-volatile memory devices utilizing a modified NAND architecture where both ends of the NAND string of memory cells are selectively coupled to the same bit line may facilitate increased memory...
45	7486532	Semiconductor multi-chip package including two semiconductor memory chips having different memory densities A semiconductor multi-chip package includes: a first semiconductor memory chip having n address pads, a first control pad, and a first address controller; and a second semiconductor memory chip...
46	7483286	Semiconductor memory device with high permeability lines interposed between adjacent transmission lines A memory device is provided with a structure for improved transmission line operation on integrated circuits. The structure for transmission line operation includes a first layer of electrically...
47	7483285	Memory devices using carbon nanotube (CNT) technologies Structures for memory devices. The structure includes (a) a substrate; (b) a first and second electrode regions on the substrate; and (c) a third electrode region disposed between the first and...
48	7480165	Microcontroller with programmable logic A programmable logic, a memory and a microcontroller. The memory is coupled to the programmable logic circuit via the microcontroller. The programmable logic circuit, the memory and the...
49	7477535	3D chip arrangement including memory manager Systems, apparatuses and methods involving centralized memory management capable of allocating and de-allocating memory for all subsystems dynamically. One embodiment involves a base substrate, a...
50	7474550	Dynamic RAM-and semiconductor device A semiconductor memory includes a plurality of first regions arranged along a first direction, each of which corresponds to a memory array including a plurality of word lines, bit lines and memory...

Matches 1 - 50 out of 1162

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