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7619911 |
Semiconductor integrated circuit device
In a memory array structured of memory cells using a storage circuit STC and a comparator CP, either one electrode of a source electrode or a drain electrode of a transistor, whose gate electrode...
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7586771 |
Tree-style and-type match circuit device applied to content addressable memory
A tree-style AND-type match circuit device applied to the content addressable memory (CAM) is provided. In this tree-style AND-type match circuit device, a plurality of AND-type match circuit...
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7525827 |
Stored don't-care based hierarchical search-line scheme
In the proposed stored don't-care hierarchical search-line scheme, a content-addressable memory (CAM) is divided into several blocks. Each block contains a plurality of local search-lines, a global...
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7516271 |
Obtaining search results based on match signals and search width
Content addressable memory (CAM) in which search results such as an address code and an array match signal can be obtained for multiple search widths. The CAM includes a CAM array that can provide...
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7505295 |
Content addressable memory with multi-row write function
A content addressable memory (CAM) device having a multi-row write function. The CAM device includes a CAM array and an address circuit. The CAM array includes a plurality of CAM cells and word...
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7486531 |
Low power content addressable memory array (CAM) and method of operating same
A content addressable memory (CAM) system that includes a row of NAND-type CAM cells divided into a plurality of segments. Each segment includes a plurality of series-connected switching...
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7486530 |
Method of comparison between cache and data register for non-volatile memory
A non-volatile memory device and data comparison circuit are described that facilitate the comparison of data between two blocks of data, such as the I/O buffer or data cache of a memory and the...
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7471536 |
Match mismatch emulation scheme for an addressed location in a CAM
A novel match/mismatch emulation scheme for an addressed location in a CAM system that includes a plurality of CAM blocks. The plurality of CAM blocks are organized into at least one rectangular...
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7463501 |
Semiconductor memory device
A CAM (Content Addressable Memory) cell includes first and second data storage portions storing data, horizontal port write gates for storing data applied through a match line pair in the data...
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7414872 |
Segmented search line circuit device for content addressable memory
A segmented search line circuit device for content addressable memory is provided. This device includes a content addressable memory and a segmented unit, wherein the content addressable memory has...
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7298636 |
Packet processors having multi-functional range match cells therein
A multi-functional match cell is responsive to first and second n-bit operands and configured so that the match cell operates as an n-bit range match cell when the first and second n-bit operands...
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7286381 |
Non-volatile and-type content addressable memory
In order to speed up the search for a data item in a content addressable memory and to simplify the circuit structure of the memory having associated with each row of cells a ground control line, a...
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7274581 |
Array fault testing approach for TCAMs
A novel array fault testing for a TCAM system that includes a plurality of TCAM blocks that is organized into at least one rectangular array having rows each having a plurality of TCAM blocks, a...
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7257023 |
Hybrid non-volatile memory device
The present invention discloses a memory device that includes a first memory cell array for storing one or more codes; a second memory cell array for storing one or more data, which are updated...
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7237059 |
Performing lookup operations on associative memory entries
Methods and apparatus are disclosed for performing lookup operations using associative memories, including, but not limited to modifying search keys within an associative memory based on...
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7237067 |
Managing a multi-way associative cache
Methods for storing replacement data in a multi-way associative cache are disclosed. One method comprises logically dividing the cache's cache sets into segments of at least one cache way;...
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7230840 |
Content addressable memory with configurable class-based storage partition
A content addressable memory (CAM) device having a plurality of CAM blocks and a block selection circuit. Each of the CAM blocks includes an array of CAM cells to store data words having a width...
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7139182 |
Cutting CAM peak power by clock regioning
A CAM device architecture where CAM cells are divided into at least two arrays and each array is operated in a different clock domain so that at no time are the arrays simultaneously drawing...
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7120732 |
Content addressable memory structure
A structure, apparatus and method for reducing the power requirement of CAM memories, where the memory cells of the memory array are divided into groups of rows of multiple memory segments. Each...
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7113415 |
Match line pre-charging in a content addressable memory having configurable rows
A content addressable memory (CAM) device includes a CAM array and a configuration circuit. The CAM array has a plurality of rows of CAM cells, each row segmented into a plurality of row segments,...
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7082492 |
Associative memory entries with force no-hit and priority indications of particular use in implementing policy maps in communication devices
Methods and apparatus are disclosed for defining and using associative memory entries with force no-hit and priority indications of particular use in implementing policy maps in communication...
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6972978 |
Content addressable memory (CAM) devices with block select and pipelined virtual sector look-up control and methods of operating same
A CAM array block is configured to perform a search operation in a staged segment-to-segment manner using a plurality of hybrid comparands that are pipelined into the CAM array block during...
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6967856 |
Content addressable memory (CAM) devices that utilize segmented match lines and word lines to support pipelined search and write operations and methods of operating same
CAM devices include a segmented CAM array that is configured to support a long word search operation (e.g., x8N search) as a plurality of overlapping segment-to-segment search operations that are...
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6950899 |
Associative memory device returning search results of a plurality of memory groups successively upon one search instruction
Data stored in a memory of an associative memory device is input therein as a key. The memory includes entries divided logically in a plurality of groups. The associative memory device returns an...
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6867991 |
Content addressable memory devices with virtual partitioning and methods of operating the same
CAM devices and methods of operating CAM devices include mapping search word portions to partitions and virtual subpartitions in a CAM core. Some embodiments of the invention can provide, for...
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6795892 |
Method and apparatus for determining a match address in an intra-row configurable cam device
A method and apparatus for determining a match address in an intra-row configurable CAM system. For one embodiment, the CAM system includes a CAM array and priority encoding circuitry. The CAM...
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6768659 |
Circuit and method for reducing power usage in a content addressable memory
A content addressable memory (CAM) including a plurality of rows, each of the rows has a plurality of matchline segments having a plurality of CAM cells coupled thereto. A circuit is provided for...
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6763425 |
Method and apparatus for address translation in a partitioned content addressable memory device
A CAM device having plurality of CAM blocks includes circuitry to disable one or more defective CAM blocks, and to selectively translate address space in the disabled CAM blocks to the remaining...
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6732227 |
Network translation circuit and method using a segmentable content addressable memory
A translation circuit for translating addresses between computer networks and an associated method of performing address translation for a computer system are provided. The translation circuit...
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6631445 |
Cache structure for storing variable length data
A cache architecture is adapted to store data items of variable length. Given appropriate circumstances, the cache architecture permits multiple data items to be retrieved from the cache in single...
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6597596 |
Content addressable memory having cascaded sub-entry architecture
A growable CAM array and an ASIC-compatible CAM architecture based on modular cascadable CAM blocks, each CAM block containing a sub-entry including a segment of the match line of a CAM entry, each...
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6549987 |
Cache structure for storing variable length data
A cache architecture is adapted to store data items of variable length. Given appropriate circumstances, the cache architecture permits multiple data items to be retrieved from the cache in single...
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6516383 |
Techniques for efficient location of free entries for TCAM inserts
Techniques for the efficient location of free entries for use in performing insert operations in a binary or ternary content addressable memory. As used in data communications and packet routing,...
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6499081 |
Method and apparatus for determining a longest prefix match in a segmented content addressable memory device
A method and apparatus for determining a longest prefix match in a segmented content addressable memory (CAM) device. The CAM device includes multiple CAM array blocks that each may be arbitrarily...
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6477071 |
Method and apparatus for content addressable memory with a partitioned match line
The present invention provides a content addressable memory (CAM) circuit that includes at least one row of memory cells storing data to be subjected to search data for a compare operation, with...
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6415293 |
Memory device including an associative memory for the storage of data belonging to a plurality of classes
A memory device having an associative memory for the storage of data belonging to a plurality of classes. The associative memory has a plurality of memory locations aligned along rows and columns...
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6404691 |
Semiconductor memory device for simple cache system
A semiconductor memory device comprises a DRAM memory cell array comprising a plurality of dynamic type memory cells arranged in a plurality of rows and columns, and an SRAM memory cell array...
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6374326 |
Multiple bank CAM architecture and method for performing concurrent lookup operations
Content-addressable memory (CAM) architectures and methods of use are disclosed for enabling multiple concurrent lookups within a CAM array. One implementation arranges CAM arrays into multiple...
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6370073 |
Single-port multi-bank memory system having read and write buffers and method of operating same
A method and apparatus for handling the refresh of a DRAM array or other memory array requiring periodic refresh operations so that the refresh does not require explicit control signaling nor...
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6330177 |
CAM/RAM memory device with a scalable structure
The present invention relates to a CAM/RAM memory device with scalable structure with a CAM (Content Addressable Memory) mode and a RAM (Random Access Memory) mode, where selectable parts of the...
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6324087 |
Method and apparatus for partitioning a content addressable memory device
A CAM device having a plurality of CAM blocks is partitioned into a number of individually searchable partitions, where each partition may include one or more CAM blocks of the CAM device. In one...
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6215685 |
Sequentially comparing content addressable memory
A content addressable memory (CAM) (30) and a method of using it to sequentially match tags stored in the CAM to a target tag. The CAM (30) has a tag memory (20) comprised of tag cells (10, 10a)...
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6181591 |
High speed CAM cell
A high speed and low power consumption associative memory (CAM) cell and CAM word circuit which provides an associative memory (CAM) word circuit 40. The circuit includes a word match line 20 and a...
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6166938 |
Data encoding for content addressable memories
Input partitioning logic is coupled to bit-lines of a content addressable memory (CAM) array having four-transistor (4-T) non-volatile Flash CAM cells. Prior to a program or search operation on the...
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6134135 |
Mask arrangement for scalable CAM/RAM structures
The invention relates to a CAM/RAM memory device with a scalable and flexible structure. The device has a number of rows of memory cells. At least one address decoder is connected by word lines to...
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6065091 |
Translation look-aside buffer slice circuit and method of operation
For use in an x-86 processor having a physically-addressable cache and an associated translation look-aside buffer (primary TLB) that stores corresponding logical and physical addresses for...
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6061262 |
Large-capacity content addressable memory
A large-capacity CAM (content addressable memory) is disclosed. RAM core cells are used to store the CAM data. The comparison function is not performed in the core cells, but rather in comparators...
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6047354 |
Data processor for implementing virtual pages using a cache and register
A data processor capable of supporting a plurality of page sizes without increasing the chip occupation area or the power consumption. This data processor for supporting a virtual memory is...
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6006310 |
Single memory device that functions as a multi-way set associative cache memory
A memory device provides for multi-way set associative burst SRAM (static random access memory) cache memory in a single device or package. In one embodiment input address bit A2 is used to...
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5706224 |
Content addressable memory and random access memory partition circuit
A semiconductor memory device is disclosed which is partitionable into random access memory (RAM) and content addressable memory (CAM) subfields, and with which incremental comparisons may be...
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