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7619944 Method and apparatus for variable memory cell refresh  
Devices allow a system using a memory array, or the memory itself, to more efficiently control refresh intervals. This reduces standby current and the overhead associated with refresh operations....
7616520 Integrated circuit device and electronic instrument  
An integrated circuit device having a display memory which stores data for at least one frame from among image information displayed in a display panel which has a plurality of scan lines and a...
7606111 Synchronous page-mode phase-change memory with ECC and RAM cache  
Phase-change memory (PCM) cells store data using alloy resistors in high-resistance amorphous and low-resistance crystalline states. The time of the memory cell's set-current pulse can be 100 ns,...
7606091 Method for non-volatile memory with reduced erase/write cycling during trimming of initial programming voltage  
High performance non-volatile memory devices have the programming voltages trimmed for individual types of memory pages and word lines. A group of word lines within each erasable block of memory...
7590027 Nonvolatile semiconductor memory device  
A nonvolatile semiconductor device includes a plurality of word lines, a plurality of bit lines, a plurality of memory cell arrays having a plurality of electrically reprogrammable memory cells...
7586784 Apparatus and methods for programming multilevel-cell NAND memory devices  
Methods and apparatus are provided. A first data value is read from a first memory cell and is stored. An attempt is made to add a second data value to the first memory cell. If the attempt to add...
7583559 Two transistor wordline decoder output driver  
A wordline decoder scheme for a memory device is generally described. In one example, a memory device includes a distributed logical NOR gate to decode addressing signals to generate wordline...
7580322 High speed programming for nonvolatile memory  
A nonvolatile memory device is programmed by selectively scanning input data bits to detect data bits to be programmed, and programming the detected data bits. The detected data bits may be...
7577059 Decoding control with address transition detection in page erase function  
Circuits and methods are provided for controlling multi-page erase operations in flash memory. The page address of each address of a multi-page erase operation is latched in wordline decoders. A...
7570505 Memory based computation systems and methods for high performance and/or fast operations  
A high performance logic circuit optimizes a digital logic function by dividing the function into smaller blocks. Thus, the logic circuit is divided into smaller blocks. The smaller blocks are...
7554859 Nonvolatile memory system and associated programming methods  
A nonvolatile memory system includes a host system, a memory controller, and a flash memory chip including multi-level flash memory cells. The memory controller includes a backup memory adapted to...
7542365 Apparatus and method for accessing a synchronous serial memory having unknown address bit field size  
An apparatus and method are provided for accessing a serial memory without knowing the required number of address bits. The apparatus comprises a pull circuit, a data out control circuit and a...
7535792 Data transmission control device, and data transmission control method  
A data transmission control device includes: a memory control unit that is connected to a DRAM, and accesses to the DRAM in accordance with a read/write request from various devices that request...
7525870 Methods for optimizing page selection in flash-memory devices  
The present invention discloses methods for storing data in a flash-memory storage device, the method including the steps of: receiving, by the device, primary data to be stored in the device and...
7515831 System and method for auto-configuring a telecommunication device with an embedded controller  
The present invention is a telecommunication device with an auto-configurable capability that supports both serial and parallel data interfaces. The telecommunication device can transfer...
7505358 Synchronous semiconductor memory device  
A synchronous semiconductor memory device can perform an internal operation for an input address with reliability regardless of the frequency of a system clock. The semiconductor memory device...
7471576 Method of transferring data in an electrically programmable memory  
A method is provided for transferring data in a memory that includes memory cells forming memory pages, and a page buffer that includes a register, with signal lines selectively transferring data...
7466623 Pseudo SRAM capable of operating in continuous burst mode and method of controlling burst mode operation thereof  
A pseudo SRAM which can perform read and write operations of data in a continuous burst mode in such a manner that it continuously generates burst row and column address signals, which gradually...
7453731 Method for non-volatile memory with linear estimation of initial programming voltage  
In a non-volatile memory, a selected page on a word line is successively programmed by a series of voltage pulses of a staircase waveform with verifications in between the pulses until the page is...
7440338 Memory control circuit and memory control method  
A memory control circuit that controls m (=L/k) memories (first to mth memories), each of which has a k-bit width, the m memories storing data having a data width (D bits) of an integral multiple...
7437501 Combining the address-mapping and page-referencing steps in a memory controller  
A method and apparatus for parallelizing address-mapping and page referencing in a memory controller. The page referencing may apply an input address to two separate content addressable memory...
7433246 Flash memory device capable of storing multi-bit data and single-big data  
There is provided a flash memory device capable of manipulating multi-bit and single-bit data. The flash memory device can include a memory cell array with a plurality of memory blocks. The flash...
7400549 Memory block reallocation in a flash memory device  
A non-volatile memory device has the pages of a certain memory block reallocated to other blocks in order to increase decrease disturb and increase reliability. Each of the reallocation blocks that...
7400534 NAND flash memory and data programming method thereof  
A semiconductor integrated circuit device includes even-numbered bit lines, odd-numbered bit lines, cell source lines, first memory elements electrically connected between the even-numbered bit...
7397727 Write burst stop function in low power DDR sDRAM  
A write burst stop command function is provided for a semiconductor memory device, and in particular for a memory device having a write latency, such as is common in a low power double data rate...
7391645 Non-volatile memory and method with compensation for source line bias errors  
Source line bias is an error introduced by a non-zero resistance in the ground loop of the read/write circuits. During sensing the source of a memory cell is erroneously biased by a voltage drop...
7385849 Semiconductor integrated circuit device  
A semiconductor integrated circuit device is disclosed. The device includes a memory cell array, an I/O buffer, a read/write buffer, an error checking and correcting circuit, and an initialization...
7376041 Semiconductor memory device and data read and write method of the same  
A semiconductor memory device includes a memory cell array to store data; a data input portion to output data to the memory cell array in response to a write control signal; a data output portion...
7369432 Method for implementing a counter in a memory with increased memory efficiency  
A method for implementing a counter in memory, e.g., non-volatile memory such as flash memory. A first number of first binary values indicating a first portion of a current number of the counter in...
7317654 Non-volatile memory devices having multi-page programming capabilities and related methods of operating such devices  
Methods of programming a non-volatile memory device having at least one memory block with a plurality of memory cells located at intersections of rows and columns is disclosed. Pursuant to these...
7310262 Ferroelectric memory capable of continuously fast transferring data words in a pipeline  
A storage device including a ferroelectric memory cell array including a plurality of memory cells; sense amplifiers connected to the bit lines and selected by a column address; an internal counter...
7298650 Page buffer for a programmable memory device  
A page buffer is provided for an electrically programmable memory that includes multiple memory cells forming multiple memory pages. The page buffer includes a register for at least temporarily...
7280391 Phase change memory device for use in a burst read operation and a data reading method thereof  
A phase change memory device for use in a burst read operation and a data reading method are provided. The memory device includes a plurality of bit lines and a plurality of word lines. A memory...
7272070 Memory access using multiple activated memory cell rows  
For one or more disclosed embodiments, a plurality of rows of memory cells in a memory bank are activated, and a column of memory cells in the memory bank is selected to select memory cells common...
7266034 Data recording device  
An data recording device according to an aspect of the present invention includes a memory cell array in a memory chip, a refresh circuit which executes a refreshing of the memory cell array, a...
7257046 Memory data access scheme  
A bitline selection network is composed of a plurality of bitlines and a plurality of global bitlines. The bitlines are grouped into bytes with eight bitlines per byte. The bitlines provide access...
7203116 Semiconductor memory device  
With the objective of providing a semiconductor memory device which is made identical in usability to a static RAM by use of dynamic memory cells and realizes a high-speed memory cycle time, there...
7196962 Packet addressing programmable dual port memory devices and related methods  
In a packet addressing method, one or more memory blocks are selected from a plurality of memory blocks and one or more data I/O pads are selected from a plurality of data I/O pads via which data...
7193918 Process for refreshing a dynamic random access memory and corresponding device  
The content of a few pages of the dynamic random access memory is backed up, then one tries to refresh them less quickly, for example two times less quickly, and one observes whether this does or...
7184322 Semiconductor memory device and control method thereof  
A semiconductor memory device has common terminals shared between a part or all of address terminals for receiving n bits of an address signal and data terminals for outputting a data signal with...
7180824 Semiconductor memory device with a page mode  
A sense amplifier and a latch for sense data output the former 4 words of sense data to a latch for page data, and during a page mode reading period of the former 4 words of data as external data...
7180783 Non-volatile memory devices that include a programming verification function  
A non-volatile semiconductor memory device includes a cell array including a plurality of memory cells arranged in a plurality of rows and columns. A page buffer circuit includes a plurality of...
7106651 Semiconductor memory device and method of reading data from semiconductor memory device  
A semiconductor memory device is arranged so that its circuit area is made smaller and the stored data may be constantly outputted at fast speed. The semiconductor memory device includes a memory...
7102957 Reduction of fusible links and associated circuitry on memory dies  
The number of fusible links and other circuit components required to provide memory cell redundancy are reduced by sharing physical memory locations among address banks that store memory addresses....
7102956 Reduction of fusible links and associated circuitry on memory dies  
The number of fusible links and other circuit components required to provide memory cell redundancy are reduced by sharing physical memory locations among address banks that store memory addresses....
7102955 Reduction of fusible links and associated circuitry on memory dies  
The number of fusible links and other circuit components required to provide memory cell redundancy are reduced by sharing physical memory locations among address banks that store memory addresses....
7099211 Flash memory device capable of reducing test time and test method thereof  
A flash memory device includes a memory cell array arranged in rows and columns; a pad configured to be supplied with a high voltage from the exterior during a stress test operation; a column...
7099179 Conductive memory array having page mode and burst mode write capability  
Conductive memory array having page mode and burst mode write capability. The conductive memory array includes two-terminal memory plugs and driver circuits configured to write information to the...
7095658 Flash memory data bus for synchronous burst read page  
Memory device is described that utilizes a reduced number of sense amplifiers to sense the data bits of a selected column page. The sense amplifiers are multiplexed and the read data values...
7089350 Methods of sanitizing a flash-based data storage device  
A data storage device includes one or more non-volatile, blockwise erasable data storage media and a mechanism for sanitizing the media in response to a single external stimulus or in response to a...
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