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8164970 |
Third dimensional memory with compress engine
An integrated circuit and method for modifying data by compressing the data in third dimensional memory technology is disclosed. In a specific embodiment, an integrated circuit is configured to...
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8120989 |
Concurrent multiple-dimension word-addressable memory architecture
An N-dimension addressable memory. The memory includes an N-dimension array of bit cells and logic configured to address each bit cell using N-Dimension Addressing (NDA), where N is at least two...
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8120990 |
Flexible memory operations in NAND flash devices
A flash memory device having at least two bank, where the each bank has an independently configurable page size and core controller. The core controller is local to each bank, and governs memory...
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8107291 |
Method of programming flash memory device
A method of programming data in a flash memory device is disclosed. The memory device includes a memory cell array which in turn includes at least one block, and the block in turn includes a...
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8107294 |
Read mode for flash memory
A method for reading a nonvolatile memory array including an array of memory cells, each memory cell including a substrate, a control gate, a charge storage element, a source region and a drain...
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8102710 |
System and method for setting access and modification for synchronous serial interface NAND
The invention includes a system and method of modifying a setting of a NAND flash memory device using serial peripheral interface (SPI) communication from a master to the NAND flash memory device....
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8085574 |
Nonvolatile ferroelectric memory and control device using the same
A nonvolatile ferroelectric memory immediately outputs data stored in a page buffer without performing a cell access operation when a page buffer is accessed. Since a block page address region and...
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8068377 |
Semiconductor memory device to reduce off-current in standby mode
A semiconductor memory device capable of reducing off-current in a standby mode is provided. The semiconductor memory device includes an enable signal generating unit configured to receive a...
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8045416 |
Method and memory device providing reduced quantity of interconnections
Methods, devices and systems for reducing the quantity of external interconnections of a memory device are disclosed. Implementation of one such method, device and system includes inputting over an...
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8036037 |
***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST*** Method of programming flash memory device
A method of programming data in a flash memory device is disclosed. The memory device includes a memory cell array which in turn includes at least one block, and the block in turn includes a...
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7990798 |
Integrated circuit including a memory module having a plurality of memory banks
An integrated circuit including a memory module having a plurality of memory banks is disclosed. One embodiment provides an even number of at least four memory banks. Each memory bank has a...
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7965546 |
Synchronous page-mode phase-change memory with ECC and RAM cache
Phase-change memory (PCM) cells store data using alloy resistors in high-resistance amorphous and low-resistance crystalline states. The time of the memory cell's set-current pulse can be 100 ns,...
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7940582 |
Integrated circuit that stores defective memory cell addresses
An integrated circuit including an array of memory cells, a circuit, volatile storage, and non-volatile storage. The circuit is configured to detect defective memory cells in the array of memory...
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7885141 |
Non-volatile memory device and method for setting configuration information thereof
Provided are a nonvolatile memory device and a method for setting configuration information of the nonvolatile memory device. The nonvolatile memory device can include a nonvolatile memory cell...
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7876611 |
Compensating for coupling during read operations in non-volatile storage
Capacitive coupling from storage elements on adjacent bit lines is compensated by adjusting voltages applied to the adjacent bit lines. An initial rough read is performed to ascertain the data...
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7872941 |
Nonvolatile memory device and method of operating the same
A nonvolatile memory device comprises a page buffer unit, first to kth logic combination units, and a control unit. The page buffer unit includes first to Nth page buffer blocks. N and k are...
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7859914 |
Non-volatile memory device, non-volatile memory system and control method for the non-volatile memory device in which driving ability of a selector transistor is varied
The control method includes a step of varying driving ability of a selector transistor which selects a diffusion layer in a selected memory cell and a diffusion layer of at least one non-selected...
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7830720 |
Methods of programming non-volatile semiconductor memory devices using different program verification operations and related devices
A method of programming a non-volatile memory device includes receiving data to be programmed into memory cells of the memory device, programming the memory cells with the data, and selectively...
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7813187 |
Multi-bit flash memory device and program method thereof
A method for programming a flash memory device including a plurality of memory cells, each storing multi-bit data, includes reading data from selected memory cells. An error of the read data is...
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7774577 |
Memory device, memory controller and memory system
An image memory, image memory system, and memory controller that are capable of efficiently accessing a rectangular area of two-dimensionally arrayed data are provided. The memory device has: a...
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7764545 |
Address replacing circuit and semiconductor memory apparatus having the same
An address replacing circuit includes a sub-bank region selecting unit that allows a first sub-bank region or a second sub-bank region to be selectively activated, in response to a row address and...
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7729200 |
Memory device, memory controller and memory system
The memory device has: a plurality of banks, each of which has a memory cell array having a plurality of page areas that are selected by row addresses respectively, and each of which is selected by...
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7724575 |
Page-buffer and non-volatile semiconductor memory including page buffer
In one aspect a non-volatile memory device is provided which is operable in a programming mode and a read mode. The memory device includes a memory cell array which includes a plurality of...
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7719893 |
Nonvolatile memory and apparatus and method for deciding data validity for the same
Provided are a nonvolatile memory and an apparatus and method for deciding data validity for the same, in which validity of data stored in the nonvolatile memory can be decided. The nonvolatile...
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7706183 |
Read mode for flash memory
A method for reading a nonvolatile memory array including an array of memory cells, each memory cell including a substrate, a control gate, a charge storage element, a source region and a drain...
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7697359 |
Flash memory device and refresh method thereof
A method for refreshing a flash memory device includes providing first and second refresh fields that include a plurality of memory blocks, and determining, when there is a request for a refresh, a...
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7692947 |
Nonvolatile ferroelectric memory and control device using the same
A nonvolatile ferroelectric memory immediately outputs data stored in a page buffer without performing a cell access operation when a page buffer is accessed. Since a block page address region and...
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7668040 |
Memory device, memory controller and memory system
The memory device has: a plurality of banks, each of which has a memory cell array having a plurality of page areas that are selected by row addresses respectively, and each of which is selected by...
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7619944 |
Method and apparatus for variable memory cell refresh
Devices allow a system using a memory array, or the memory itself, to more efficiently control refresh intervals. This reduces standby current and the overhead associated with refresh operations....
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7616520 |
Integrated circuit device and electronic instrument
An integrated circuit device having a display memory which stores data for at least one frame from among image information displayed in a display panel which has a plurality of scan lines and a...
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7606111 |
Synchronous page-mode phase-change memory with ECC and RAM cache
Phase-change memory (PCM) cells store data using alloy resistors in high-resistance amorphous and low-resistance crystalline states. The time of the memory cell's set-current pulse can be 100 ns,...
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7606091 |
Method for non-volatile memory with reduced erase/write cycling during trimming of initial programming voltage
High performance non-volatile memory devices have the programming voltages trimmed for individual types of memory pages and word lines. A group of word lines within each erasable block of memory...
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7590027 |
Nonvolatile semiconductor memory device
A nonvolatile semiconductor device includes a plurality of word lines, a plurality of bit lines, a plurality of memory cell arrays having a plurality of electrically reprogrammable memory cells...
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7586784 |
Apparatus and methods for programming multilevel-cell NAND memory devices
Methods and apparatus are provided. A first data value is read from a first memory cell and is stored. An attempt is made to add a second data value to the first memory cell. If the attempt to add...
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7583559 |
Two transistor wordline decoder output driver
A wordline decoder scheme for a memory device is generally described. In one example, a memory device includes a distributed logical NOR gate to decode addressing signals to generate wordline...
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7580322 |
High speed programming for nonvolatile memory
A nonvolatile memory device is programmed by selectively scanning input data bits to detect data bits to be programmed, and programming the detected data bits. The detected data bits may be...
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7577059 |
Decoding control with address transition detection in page erase function
Circuits and methods are provided for controlling multi-page erase operations in flash memory. The page address of each address of a multi-page erase operation is latched in wordline decoders. A...
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7542365 |
Apparatus and method for accessing a synchronous serial memory having unknown address bit field size
An apparatus and method are provided for accessing a serial memory without knowing the required number of address bits. The apparatus comprises a pull circuit, a data out control circuit and a...
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7535792 |
Data transmission control device, and data transmission control method
A data transmission control device includes: a memory control unit that is connected to a DRAM, and accesses to the DRAM in accordance with a read/write request from various devices that request...
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7525870 |
Methods for optimizing page selection in flash-memory devices
The present invention discloses methods for storing data in a flash-memory storage device, the method including the steps of: receiving, by the device, primary data to be stored in the device and...
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7515831 |
System and method for auto-configuring a telecommunication device with an embedded controller
The present invention is a telecommunication device with an auto-configurable capability that supports both serial and parallel data interfaces. The telecommunication device can transfer...
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7505358 |
Synchronous semiconductor memory device
A synchronous semiconductor memory device can perform an internal operation for an input address with reliability regardless of the frequency of a system clock. The semiconductor memory device...
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7471576 |
Method of transferring data in an electrically programmable memory
A method is provided for transferring data in a memory that includes memory cells forming memory pages, and a page buffer that includes a register, with signal lines selectively transferring data...
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7466623 |
Pseudo SRAM capable of operating in continuous burst mode and method of controlling burst mode operation thereof
A pseudo SRAM which can perform read and write operations of data in a continuous burst mode in such a manner that it continuously generates burst row and column address signals, which gradually...
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7453731 |
Method for non-volatile memory with linear estimation of initial programming voltage
In a non-volatile memory, a selected page on a word line is successively programmed by a series of voltage pulses of a staircase waveform with verifications in between the pulses until the page is...
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7440338 |
Memory control circuit and memory control method
A memory control circuit that controls m (=L/k) memories (first to mth memories), each of which has a k-bit width, the m memories storing data having a data width (D bits) of an integral multiple...
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7437501 |
Combining the address-mapping and page-referencing steps in a memory controller
A method and apparatus for parallelizing address-mapping and page referencing in a memory controller. The page referencing may apply an input address to two separate content addressable memory...
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7433246 |
Flash memory device capable of storing multi-bit data and single-big data
There is provided a flash memory device capable of manipulating multi-bit and single-bit data. The flash memory device can include a memory cell array with a plurality of memory blocks. The flash...
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7400549 |
Memory block reallocation in a flash memory device
A non-volatile memory device has the pages of a certain memory block reallocated to other blocks in order to increase decrease disturb and increase reliability. Each of the reallocation blocks that...
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7400534 |
NAND flash memory and data programming method thereof
A semiconductor integrated circuit device includes even-numbered bit lines, odd-numbered bit lines, cell source lines, first memory elements electrically connected between the even-numbered bit...
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