|
Match
|
Document |
Document Title |
|
|
8185754 |
Time-based storage access and method of power savings and improved utilization thereof
The invention provides a method and system for time-based storage access, the method includes associating a plurality of storage volumes with specific periods of time during which they can be...
|
|
|
8179728 |
Interleaving charge pumps for programmable memories
Systems and methods, including computer software for performing operations enable interleaving of charging operations in a charging pump. A first charge pump is charged to a predetermined level,...
|
|
|
8179738 |
Internal power supply control circuit of semiconductor memory
An internal power supply control circuit of a semiconductor memory includes a periodic signal generating unit that generates a periodic signal to generate a permission signal to intermittently...
|
|
|
8174866 |
Semiconductor storage device
A semiconductor storage device includes: a memory cell array that includes a plurality of memory cells having a cell transistor formed on a well subjected to application of a predetermined...
|
|
|
8169839 |
Flash backed DRAM module including logic for isolating the DRAM
A memory device for use with a primary power source including: non-volatile memory; volatile memory; an interface for connecting to a backup power source; isolation logic for controlling access to...
|
|
|
8164935 |
Memory modules and methods for modifying memory subsystem performance
Methods and memory modules adapted for use in computer systems to generate different voltages for core supply (VDD) and input/output supply (VDDQ) inputs to memory components of the computer memory...
|
|
|
8164969 |
Ultra-low power hybrid circuits
The present invention provides a solution to avoid the robustness problems of sub-threshold circuits by switching small parts of circuits to nominal-voltage only when they are being used, and...
|
|
|
8154938 |
Memory array power domain partitioning
An integrated circuit containing a nonvolatile memory circuit which contains memory segments and sense amplifier banks individually powered by a power decoder circuit. A method of accessing a...
|
|
|
8149641 |
Active cycle control circuit for semiconductor memory apparatus
An active cycle control circuit for a semiconductor memory apparatus is configured to precharge a word line corresponding to a read cycle, and activate a word line corresponding to a refresh...
|
|
|
8149642 |
Semiconductor memory device
A semiconductor memory device includes a first power switch for interrupting supply of a first power voltage to a first node in a standby mode, and a second power switch connected between the first...
|
|
|
8149632 |
Output circuit for a semiconductor memory device and data output method
An outputting transistor circuit of a push-pull structure has an outputting PMOS transistor and an outputting NMOS transistor connected in series between a first power supply and a grounded power...
|
|
|
8144536 |
Semiconductor memory and system
A word driver supplies a high level voltage to a word line when a memory cell is accessed and supplies low level voltage which is a negative voltage to the word line when the memory cell isn't...
|
|
|
8139436 |
Integrated circuits, systems, and methods for reducing leakage currents in a retention mode
An integrated circuit includes at least one memory array for storing data. A first switch is coupled with the memory array. A first power line is coupled with the first switch. The first power line...
|
|
|
8130586 |
Semiconductor memory device and method of controlling the same
An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the...
|
|
|
RE43222 |
Semiconductor integrated circuit device
A semiconductor integrated circuit device with reduced consumption current is provided. A first step-down circuit stationarily forms internal voltage lower than supply voltage supplied through an...
|
|
|
8130588 |
Semiconductor memory device having power saving mode
A semiconductor memory device includes a memory cell array arranged in rows and columns, a row decoder and a control circuit. The row decoder drives word lines connected to the memory cell array by...
|
|
|
8122233 |
Information processing device
An information processing device, including: a processing unit; a peripheral circuit module; and a boot address register, wherein the information processing device comprises a first operation mode...
|
|
|
8116718 |
Power management for a mobile communication device and method for use therewith
A communication device includes a voice data and RF integrated circuit (IC) that includes a memory module that stores a plurality of applications corresponding to a plurality of uses of the...
|
|
|
8117519 |
Memory apparatus and method using erasure error correction to reduce power consumption
An error correction circuit coupled to a plurality of memory cells in a memory device includes an error correcting code (“ECC”) generator and an ECC controller. The ECC generator is coupled to the...
|
|
|
8111561 |
Bulk bias voltage generating device and semiconductor memory apparatus including the same
A bulk bias voltage generating device is configured to generate a first bulk bias voltage in a deep power down mode and a second bulk bias voltage in a normal mode. The first bulk bias voltage...
|
|
|
8111575 |
Semiconductor device
There is provided a semiconductor device including: a temperature sensor detecting temperature; an inner circuit operating when supplied with a power supply voltage from a power supply line; a...
|
|
|
8102631 |
Computer power supply and standby voltage discharge circuit thereof
A computer power supply includes a standby voltage output terminal to output a standby voltage, a power connector connected to the standby voltage output terminal, and a standby voltage discharge...
|
|
|
8085614 |
Source control circuit and semiconductor memory device using the same
A source control circuit comprises a control signal generating unit for generating a standby signal which is enabled in a standby condition, and a switching unit connected between a power line for...
|
|
|
8077500 |
Volatile memory elements with soft error upset immunity
Memory elements are provided that exhibit immunity to soft error upset events when subjected to high-energy atomic particle strikes. The memory elements may each have ten transistors. To overcome...
|
|
|
8072834 |
Line driver circuit and method with standby mode of operation
A line driver circuit can include an integrated circuit substrate of a first conductivity type having at least a first and a second well of a second conductivity type formed therein. The second...
|
|
|
8068376 |
Low leakage high stability memory array system
Systems design and methods are provided for maintaining the memory array stability while reducing power consumption in the form of leakage current in a memory array. One embodiment discloses a...
|
|
|
8068378 |
Clock and power fault detection for memory modules
A system, method and apparatus for clock and power fault detection for a memory module is provided. In one embodiment, a system is provided. The system includes a voltage detection circuit and a...
|
|
|
8068377 |
Semiconductor memory device to reduce off-current in standby mode
A semiconductor memory device capable of reducing off-current in a standby mode is provided. The semiconductor memory device includes an enable signal generating unit configured to receive a...
|
|
|
8054120 |
Integrated circuit operable in a standby mode
An integrated circuit, comprises a wakeup terminal; a supply voltage terminal configured to receive a supply voltage; and a power control circuit. The power control circuit comprises an enable...
|
|
|
8049556 |
Multiple circuit blocks with interblock control and power conservation
A mobile telephone is provided that includes a plurality of circuit blocks and adapted to cut off the supply of power source voltage to any one of the circuit blocks. The mobile telephone also...
|
|
|
8040721 |
Creating short program pulses in asymmetric memory arrays
The present invention provides methods and apparatus for adjusting voltages of bit and word lines to create short programming pulses to program a memory cell. The invention may include setting a...
|
|
|
8031548 |
Voltage stabilization circuit and semiconductor memory apparatus using the same
A voltage stabilization circuit includes a control signal generating unit to generate a control signal that is enabled when a supply voltage is unstable and a voltage level maintaining unit for...
|
|
|
8026757 |
Current mirror circuit, in particular for a non-volatile memory device
A current mirror circuit is provided with a first current mirror including first and second mirror transistors sharing a common control terminal; the first mirror transistor has a conduction...
|
|
|
8027217 |
Supply voltage distribution system with reduced resistance for semiconductor devices
A supply voltage distribution system for distributing a supply voltage through a semiconductor device, the supply voltage distribution system comprising: a first supply voltage distribution line...
|
|
|
8018788 |
Static memory device and static random access memory device
A static memory device includes a bit cell connected to an internal voltage line, and a power supply control circuit connected between the internal voltage line and a power supply voltage, wherein...
|
|
|
8014224 |
Semiconductor device
There is provided a semiconductor device supplied with internal power generated by an internal power generation circuit to perform a stable operation and, also, suppress power consumption. A...
|
|
|
8014223 |
Semiconductor device
A semiconductor device including a plurality of semiconductor elements, a substrate on which the plurality of semiconductor elements are mounted, the substrate also having a plurality of terminals...
|
|
|
8015426 |
System and method for providing voltage power gating
A system and method for providing voltage power gating. The system includes a device for providing voltage power gating. The device includes logic circuitry, a mechanism for receiving a control...
|
|
|
8009502 |
Systems, methods and devices for power control in mass storage devices
Power-backup capabilities are provided by implementing a variety of different methods, systems and devices. According to one such implementation, an energy storage circuit is powered using a...
|
|
|
8004920 |
Power saving memory apparatus, systems, and methods
Some embodiments include a voltage generator to generate a voltage to apply to a line used to access a memory cell of a memory device in which the voltage is applied to the line when the memory...
|
|
|
8004924 |
Voltage regulator for memory
A circuit includes a first negative feed back loop coupled to a virtual Vvdd power rail and a true Vdd power rail. A second negative feed back loop is coupled to the virtual Vvss power rail and a...
|
|
|
8004922 |
Power island with independent power characteristics for memory and logic
A power island for a system-on-a-chip (SoC) includes a first segment, a second segment, and a supply line. The first segment includes a hardware device and operates the hardware device at first...
|
|
|
8001408 |
Dual voltage switching circuit
A dual voltage switching circuit includes a first resistor and two transistors. Each transistor has a first terminal, a second terminal, and a third terminal. The first terminals are connected to a...
|
|
|
7995417 |
Semiconductor memory circuit
The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power...
|
|
|
7996695 |
Circuits and methods for sleep state leakage current reduction
A circuit for reducing sleep state current leakage is described. The circuit includes a hardware unit selected from at least one of a latch, a flip-flop, a comparator, a multiplexer, or an adder....
|
|
|
7995398 |
Structures and methods for reading out non-volatile memories
Non-differential sense amplifier circuitry for reading out Non-Volatile Memories (NVMs) and its operating methods are disclosed. Such non-differential amplifier circuitry requires exceptionally low...
|
|
|
7990797 |
State of health monitored flash backed dram module
A device includes: non-volatile memory; a controller in communication with the non-volatile memory, wherein the controller is programmed to move data from a volatile memory to the non-volatile...
|
|
|
7986568 |
Interleaving charge pumps for programmable memories
Systems and methods, including computer software for performing operations enable interleaving of charging operations in a charging pump. A first charge pump is charged to a predetermined level,...
|
|
|
7983098 |
Adaptive regulator for idle state in a charge pump circuit of a memory device
An apparatus and method for improving the performance of an electronic device is disclosed. An idle voltage state is introduced by an adaptive voltage generator when providing or removing a high...
|
|
|
7983107 |
Flash backed DRAM module with a selectable number of flash chips
A memory device for use with a primary power source and a backup power source, includes: volatile memory; an interface for connecting to a backup power source; a plurality of ports, each of which...
|