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7619947 Integrated circuit having a supply voltage controller capable of floating a variable supply voltage  
An integrated circuit includes a supply voltage controller operable to receive a plurality of control signals and at least one circuit supply voltage and to output at least one variable supply...
7619464 Current comparison based voltage bias generator for electronic data storage devices  
An electronic data storage system uses current comparison to generate a voltage bias. In at least one embodiment, a voltage bias generator, that includes a current differential amplifier, generates...
7616517 Config logic power saving method  
A circuit which includes an IP cell having a function select input signal line, combinatorial logic having an output connected to the function select input signal line of the IP cell, a...
7613060 Methods, circuits, and systems to select memory regions  
Embodiments for selecting regions of memory are described. For example, in one embodiment a memory device having an array of memory cells includes an array selection block. The array selection...
7606087 Semiconductor memory device and over driving method thereof  
A semiconductor memory device may include a power line, an over driver, and/or an internal voltage driver. The power line may be connected to at least one sense amplifier. The at least one sense...
7599241 Enhanced write abort mechanism for non-volatile memory  
In a non-volatile memory (NVM) device having a controller and a non-volatile memory array controlled by the controller a voltage supervisor circuit monitors an output of a voltage supply powering...
7593280 Semiconductor memory device operating with a lower voltage for peripheral area in power saving mode  
A semiconductor memory device reduces power consumption during a refresh operation. The semiconductor memory device comprises a voltage generator, a sensing controller, an output driver and a data...
7583552 Method and system for providing independent bank refresh for volatile memories  
A memory system is provided. The memory system includes a volatile memory having a number of banks, each bank having a number of rows, and a memory controller configured to direct the volatile...
7577054 Memory with word-line driver circuit having leakage prevention transistor  
In a semiconductor memory having a plurality of word lines and bit lines and memory cells arranged at the positions of intersection thereof, a word driver circuit that drives the word line has a...
7577053 Memory including deep power down mode  
A memory includes an input pad for receiving an input signal and a first circuit. The first circuit is configured to receive a first signal in response to the input signal and receive a second...
7577052 Power switching circuit  
A power control circuit for an integrated circuit module includes at least one switch device coupled between a supply voltage and a power node of the integrated circuit module; and a switch control...
7576561 Device and method of configuring a device having programmable logic  
A method of configuring a device having programmable logic is disclosed. The method comprises storing instructions in the device; selecting between one of the instructions stored in the device and...
7570537 Memory cells with power switch circuit for improved low voltage operation  
Static random access memory (SRAM) cells and methods of operation are provided which may be used to provide improved writeability and stability to support low voltage operation of memory devices....
7567477 Bias sensing in sense amplifiers through a voltage-coupling/decoupling device  
Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices...
7564732 Internal voltage generation circuit for semiconductor device  
Provided is an internal voltage generation circuit for generating an internal voltage used in a semiconductor device. The internal voltage generation circuit includes a standby internal voltage...
7558143 Programmable logic device with power-saving architecture  
A programmable logic device (PLD) such as a field programmable gate array (FPGA) has a power-down mode of operation that reduces power consumption during standby or idle periods for the PLD. In one...
7551509 Power circuits for reducing a number of power supply voltage taps required for sensing a resistive memory  
A resistive memory device requires a power supply having a reduced number of voltage taps and reduced power consumption. In accordance with one exemplary embodiment, one or more voltages used by a...
7551508 Energy efficient storage device using per-element selectable power supply voltages  
An energy efficient storage device using per-element selectable power supply voltages provides energy conservation in storage devices while maintaining a particular performance level. The storage...
7548477 Method and apparatus for adapting circuit components of a memory module to changing operating conditions  
A method adapts circuit components of a memory module to changing operating conditions within a predefined range. According to one embodiment, a memory module provides a sensor arrangement and a...
7548157 Battery backed service indicator aids for field maintenance  
A self-contained backup power source such as a battery is provided for components within an electrically powered device such as a storage controller, photocopier or the like, to maintain diagnostic...
7539074 Protection circuit with antifuse configured as semiconductor memory redundancy circuitry  
A semiconductor device includes a fuse part including an antifuse that is connected between a first common node to which a high voltage that is higher than an internal boost voltage is applied and...
7535370 Removable memory media with integral indicator light  
A flash memory module includes an integral indicator light. The module alternatively includes a plurality electrical contacts which electrically interface to a host digital device. The module...
7522466 DRAM power bus control  
A dynamic random access memory (DRAM) is provided that has separate array and peripheral power busing to isolate array noise from peripheral circuits such as delay lock loops during row activations...
7518898 Semiconductor memory device with strengthened power and method of strengthening power of the same  
In a semiconductor memory device the power level of which is strengthened by using data input/output pads in a no connection state, and a method of strengthening the power of the semiconductor...
7505350 Voltage reset circuits for a semiconductor memory device using option fuse circuit  
Control circuits for a voltage regulator of a semiconductor memory device include an option fuse circuit and a fusing control circuit. The option fuse circuit includes a plurality of fuses and a...
7499359 Temperature sensor instruction signal generator and semiconductor memory device having the same  
A temperature sensor instruction signal generator, which may drive a temperature sensor, and a semiconductor memory device including the same. The temperature sensor instruction signal generator...
7495986 Semiconductor memory device, and method of controlling the same  
An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the...
7495974 Delay selecting circuit for semiconductor memory device  
A delay selection circuit for use in a semiconductor memory device prevents a tAA from increasing at a read operation due to a delayed command type of signal. The delay selection circuit includes a...
7487287 Time efficient embedded EEPROM/processor control method  
In an embedded system with a processor and an EEPROM that provides an EEPROM BUSY signal if the EEPROM is in a write mode, a block-before-write subroutine is used to hold the processor before a...
7480199 Method for low power refresh of a dynamic random access memory using a slower refresh rate than a normal refresh rate  
A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory...
7474581 Memory synchronization method and refresh control circuit  
Rank numbers specified by a second counter are refreshed in sequence by using a count value of a first counter which is initialized by a synchronous reset signal and counts timing for performing...
7463543 Lock-out device and semiconductor integrated circuit device including the same  
A lock-out device is provided that determines whether to lock out a chip or not according to the result of operation voltage drop detected at a plurality of positions in a semiconductor integrated...
7450456 Temperature determination and communication for multiple devices of a memory module  
The temperature for multiple devices of a memory module are determined. In one example a memory module includes a printed circuit board, a plurality of memory chips on the printed circuit board,...
7447085 Multilevel driver  
The present disclosure includes various method, device, and system embodiments for multilevel driving of rowlines and/or wordlines. One such method embodiment includes supplying a first power...
7443758 Circuit and method of generating high voltage for programming operation of flash memory device  
Provided is a high voltage generator for a flash memory device including a voltage pumping unit configured to generate a high voltage in response to a pumping clock signal, a transistor having a...
7440354 Memory with level shifting word line driver and method thereof  
A memory includes a bit cell array including a plurality of word lines and address decode circuitry having an output to provide a predecode value. The address decode circuitry includes a first...
7440352 Semiconductor memory device capable of selectively refreshing word lines  
A semiconductor memory device comprises a plurality of memory cells connected to a plurality of word lines grouped in word line sets. Each of the word line sets is connected to a word line enable...
7436732 Internal power supply generating circuit without a dead band  
An internal power supply generating circuit has a control circuit for controlling a control node voltage of a driver circuit thereof. During an overdrive duration, the control node voltage is set...
7430149 Semiconductor device  
There is provided a semiconductor device supplied with internal power generated by an internal power generation circuit to perform a stable operation and, also, suppress power consumption. A...
7430148 Volatile memory elements with boosted output voltages for programmable logic device integrated circuits  
Integrated circuits are provided that have memory elements. The memory elements produce output signals. The integrated circuits may be programmable logic device integrated circuits containing...
7414897 Internal voltage generator capable of regulating an internal voltage of a semiconductor memory device  
An internal voltage generator maintains stable level of an internal voltage without increasing physical area. The internal voltage generator includes an active level detector for detecting a level...
7408834 Flash controller cache architecture  
A buffer cache interposed between a non-volatile memory and a host may be partitioned into segments that may operate with different policies. Cache policies include write-through, write back and...
7408830 Dynamic power supplies for semiconductor devices  
This invention discloses a power supply management circuit which comprises at least one switching circuit coupled between a power supply and a power recipient circuit, and at least one voltage...
7408829 Methods and arrangements for enhancing power management systems in integrated circuits  
Methods and arrangements to configure power management systems for integrated circuits are provided herein. A group of IC components that are functionally distinct or have mutually exclusive and/or...
7404093 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***
System and method for saving and restoring a processor state without executing any instructions from a first instruction set  
A CPU ( 1 ) automatically preserves the CPU context in a computer memory ( 5 ) that remains powered-up when the CPU is powered down in sleep mode. By means of the preserved CPU context, the CPU is...
7403426 Memory with dynamically adjustable supply  
In some embodiments, a memory array is provided with cells that when written to or read from, can have modified supplies to enhance their read stability and/or write margin performance. Other...
7397719 Volatile semiconductor memory  
A volatile semiconductor memory includes a self-test controller detecting a defect of a memory cell, and an address storage storing a defective address indicating an address of a defective memory...
7395466 Method and apparatus to adjust voltage for storage location reliability  
According to embodiments of the present invention, an integrated circuit such as a processor includes a counter to count an actual number of unreliable storage locations in the processor cache, at...
7395445 Controller for power supplies  
A state machine implemented controller is provided in which a logic core 20 is reconfigurable in response to state data held within a memory 22 . Thus, on transition from one state to a next...
7390262 Non-volatile memory storing critical data in a gaming machine  
A method and apparatus of dynamically storing critical data of a gaming machine by allocating and deallocating memory space in a gaming machine is disclosed. One or more embodiments describe...
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