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7390262 Non-volatile memory storing critical data in a gaming machine  
A method and apparatus of dynamically storing critical data of a gaming machine by allocating and deallocating memory space in a gaming machine is disclosed. One or more embodiments describe...
7388800 Memory control device having less power consumption for backup  
When it is detected that the voltage of a main power supply is reduced below a predetermined value during a normal operation, a power controller switches a power supply for a DRAM from the main...
7380048 System and method for managing data in memory for reducing power consumption  
A system or method to partition data in a memory based at least in part to a data type, and to refresh the memory based at least in part to the data type.
7379370 Semiconductor memory  
After a refresh operation, a word control circuit holds the selection state of a word line selection signal line selected in each memory block corresponding to a refresh address. Further, in...
7376039 Circuit and method for preserving data in sleep mode of semiconductor device using test scan chain  
A data storage circuit and a data preservation method for preserving data when a semiconductor device is in a sleep mode using a test scan chain are provided, where the data storage circuit...
7376040 Backup circuit for holding information in a storage circuit when power cut-off occurs  
A backup circuit that can be fabricated by the standard CMOS process and has a small circuit scale. The backup circuit ( 10 ) is disposed between a digital circuit ( 20 ) including a storage...
7372723 State save-on-power-down using GMR non-volatile elements  
The semiconductor industry seeks to reduce the risk of traditional volatile storage devices with improved non-volatile storage devices. The increased demand for a significantly advanced, efficient,...
7366048 Bulk bias voltage level detector in semiconductor memory device  
There is provided a bulk bias voltage VBB level detector in a semiconductor memory device capable of improving tWR fail generated at a low temperature by compensating a temperature variance. The...
7362641 Method and system for low power refresh of dynamic random access memories  
A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory...
7355919 Semiconductor storage device and refresh control method therefor  
A dynamic semiconductor storage device in which the power supply current during the standby time is diminished to decrease the power consumption and to suppress the chip area from increasing....
7353329 Memory buffer device integrating refresh logic  
Apparatus and method to carry out refresh operations on rows of memory cells within a memory device independently of a memory controller during times when there is no activity on a memory bus...
7350018 Method and system for using dynamic random access memory as cache memory  
A cache memory system and method includes a DRAM having a plurality of banks, and it also includes 2 SRAMs each having a capacity that is equal to the capacity of each bank of the DRAM. In...
7345947 Memory array leakage reduction circuit and method  
Embodiments of the invention provide techniques for reducing standby power consumption due to leakage currents in memory circuits. In some embodiments, systems are provided with one or more...
7339411 Semiconductor integrated circuit having noise detect circuits detecting noise on power supply nets  
A processor or a semiconductor integrated circuit has circuit blocks performing signal processing, internal power supply nets, noise detecting circuits corresponding to each circuit block that...
7333386 Extraction of a binary code based on physical parameters of an integrated circuit through programming resistors  
An integrated cell for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between...
7327598 High performance, low leakage SRAM device and a method of placing a portion of memory cells of an SRAM device in an active mode  
An SRAM device and a method of placing a portion of memory cells of an SRAM device in an active mode is provided. In one embodiment, the SRAM device includes a hierarchical grouping of memory cells...
7313048 Reset detection circuit in semiconductor integrated circuit  
A reset detection circuit for a logic circuit and a RAM includes a first determining circuit, a second determining circuit and a reset signal generating circuit. The first determining circuit...
7307907 SRAM device and a method of operating the same to reduce leakage current during a sleep mode  
An SRAM device and a method of operating an SRAM device. In one embodiment, the SRAM device includes (1) an SRAM array coupled to row peripheral circuitry by a word line and coupled to column...
7301846 Method and apparatus for increasing computer memory performance  
A method and apparatus for providing power to a memory array of a computer's memory subsystem, and more particularly power at a level greater than that available through the computer motherboard so...
7298664 Internal power supply voltage generating circuit with reduced leakage current in standby mode  
An internal power supply voltage generating circuit of semiconductor memory devices configured such that only a predetermined internal power driver is driven but the remaining internal power...
7292496 Semiconductor memory circuit  
The present invention provides a semiconductor memory circuit capable of reducing current consumption at non-operation in a system equipped with a plurality of chips that share the use of a power...
7254083 Software management methods for automotive computing devices  
Methods and systems for operating automotive computing devices are described. In one embodiment, a small amount of static RAM (SRAM) is incorporated into an automotive computing device. The SRAM is...
7254085 Static random access memory device and method of reducing standby current  
A semiconductor storage device includes first and second additional FETs disposed in parallel on one of potential lines for supplying first and second drive potentials to each SRAM memory cell. The...
7251183 Static random access memory having a memory cell operating voltage larger than an operating voltage of a peripheral circuit  
A static memory cell, composed of cross-coupled MOS transistors having a relatively high threshold voltage, is equipped with MOS transistors for controlling the power supply line voltage of the...
7227804 Current source architecture for memory device standby current reduction  
A memory device ( 200 ) can include a memory cell block ( 202 ), a standby current source ( 206 ), an active current source ( 208 ), and a clamping device ( 212 ). In a standby mode, a standby...
7227803 Apparatus for reducing data corruption in a non-volatile memory  
The loss of data and/or the corruption of data that may occur in flash memory when a reset signal is received during a memory write cycle is prevented by delaying reset signals sent to the flash...
7224634 Hardware security device for magnetic memory cells  
The present invention provides a special structure of magnetic elements, e.g. MRAM elements, as a security device for IC's containing magnetic memory cells. In an example embodiment, the structure...
7219263 Method and system for minimizing memory corruption  
A system and method for minimizing memory corruption at power up and/or reset is provided. The system includes, a digitally controlled potentiometer between an adapter and the memory; and a voltage...
7218567 Method and apparatus for the protection of sensitive data within an integrated circuit  
Methods and apparatus for the protection of memory within an integrated circuit (IC) are provided for various phases of operation of the IC. Various portions of sensitive data may be contained...
7203118 Semiconductor storage device and mobile electronic device  
When an input voltage determining circuit 24 determines that an input voltage exceeds a prescribed voltage, a control circuit 25 of a positive polarity power selector circuit 22 turns on a...
7184354 Memory device reduced power consumption in power down mode  
A memory device capable of reducing power consumption when the operation mode is a deep power down mode, includes an external power source voltage line through which an external power source...
7173869 Regulating voltages in semiconductor devices  
The present invention provides a method and apparatus for regulating voltages in semiconductor devices. The method and apparatus includes providing a first voltage level using a voltage regulator,...
7167407 Dynamic semiconductor memory device and power saving mode of operation method of the same  
A dynamic semiconductor memory device includes a memory cell array including a plurality of memory cells connected between a plurality of word lines and a plurality of bit line pairs. A mode...
7167386 Ferroelectric memory and operating method therefor  
A ferroelectric memory capable of improving disturbance resistance in a non-selected cell by increasing the ratio between voltages applied to ferroelectric capacitors of a selected cell and the...
7161851 Method and apparatus for generating multiple system memory drive strengths  
A system and method for generating multiple drive strengths for one or more output signals of a memory controller operable to control a memory subsystem. The system includes a state machine...
7161866 Memory device tester and method for testing reduced power states  
A memory device tester capable of testing for proper operation of reduced power states in memory devices. The memory device tester can include a processor or a state machine, each configured to...
7154801 Protection circuit of a memory module and the method thereof  
A protection circuit of the memory module and method thereof are provided. The protection circuit includes: a first voltage comparing unit, which compares a reference voltage signal with a voltage...
7152187 Low-power SRAM E-fuse repair methodology  
A low power E-fuse repair methodology substantially removes system latency during memory and/or E-fuse farm module power-down in a device that employs E-fuse farm technology. The method maintains...
7120076 Semiconductor memory device  
There is disclosed a semiconductor memory device which comprises a plurality of bit line pairs each having first and second bit lines arranged in a first direction, a cell array having a plurality...
7116240 Method and apparatus for controlled persistent ID flag for RFID applications  
A Radio-Frequency Identification (RFID) transponder is provided. The RFID transponder may include a basic ID flag circuit having a VDD voltage node, an output voltage node, and a capacitor coupled...
7102954 Semiconductor integrated circuit device having logic circuit and dynamic random access memory on the same chip  
In a memory circuit, a transistor formed in the same process as that of a logic transistor is used for peripheral circuitry except for a region to be supplied with high voltage. Thus, the...
7085946 Backup memory control unit with reduced current consumption having normal self-refresh and unsettled modes of operation  
A backup memory control unit can reduce the current consumption when a memory (SDRAM) is inactive by providing the memory with an unsettled mode in which no power is supplied to the memory. It...
7085187 Semiconductor storage device  
A semiconductor storage device in which the chip area is prevented from increasing to reduce the leakage current during low power (power down) time caused by shorting across bit and word lines due...
7079441 Methods and apparatus for implementing a power down in a memory device  
A power down is implemented in a memory device capable of performing a read operation in which data and a data strobe signal are supplied as outputs. The power down techniques includes generating a...
7036004 Power up initialization for memory  
An improved Flash memory device with a synchronous interface has been detailed that enhances initialization of the Flash memory device. In the prior art, initialization of synchronous Flash memory...
7023720 Ferroelectric memory device  
A ferroelectric memory device having a function of preventing destruction of data stored in an unselected memory cell. The ferroelectric memory device includes a protection circuit for protecting...
7020040 Utilizing an ACPI to maintain data stored in a DRAM  
A method and related apparatus for utilizing an ACPI to maintain data stored in a DRAM includes a processor, a DRAM, a south bridge chipset, and a rechargeable battery device. The south bridge...
7009419 Method and apparatus for selecting an encryption integrated circuit operating mode  
A method and circuit for preventing external access to secure data of an integrated circuit while supporting DFT is disclosed. In accordance with the method the integrated circuit is automatically...
6988175 Flash memory management method that is resistant to data corruption by power loss  
A method for managing page-based data storage media such as flash media, a system that uses that method, and a computer-readable storage medium bearing code for implementing the method. New data...
6973004 Memory device including backup memory for saving data in standby mode  
A semiconductor device that quickly saves data stored in an area to which power is supplied intermittently. Power is supplied intermittently to a first area. Power is supplied continuously to a...