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7613853 |
Output buffer circuit capable of synchronous and asynchronous data buffering using sensing circuit, and method and system of same
An improved output buffer having single ended as well as differential signaling capabilities, providing symmetrical outputs for differential output configurations for both synchronous and...
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7613064 |
Power management modes for memory devices
Embodiments of power management modes for memory devices are disclosed.
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7613060 |
Methods, circuits, and systems to select memory regions
Embodiments for selecting regions of memory are described. For example, in one embodiment a memory device having an array of memory cells includes an array selection block. The array selection...
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7609581 |
Semiconductor memory device
A semiconductor memory device includes a memory cell array provided in a cell array area and including a plurality of memory cells, a source potential line which applies a source potential to the...
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7606106 |
Semiconductor memory device
A semiconductor memory device operates by using a fixed power and a variable power. The device includes a plurality of word lines which select rows of a memory cell array, a plurality of word line...
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7606105 |
Deep power down mode control circuit
A deep power down mode control circuit is provided. The deep power down mode control circuit includes a deep power down signal generator for outputting a deep power down signal in response to a...
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7606104 |
Semiconductor memory device and electric power supply method
A semiconductor device includes a first and a second memory cell array each including a plurality of electrically reprogrammable memory cells arranged in the form of a matrix, the first memory cell...
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7606101 |
Circuit and method for controlling a clock synchronizing circuit for low power refresh operation
A method and apparatus is provided for idling a clock synchronizing circuit during at least a portion of time during execution of a refresh operation in a memory device. In a memory device...
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7606095 |
Semiconductor memory device having a precharge voltage supply circuit capable of reducing leakage current between a bit line and a word line in a power-down mode
A precharge voltage supply circuit and a semiconductor memory device using the same are described. The precharge voltage supply circuit includes a first voltage supplier configured to reduce a...
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7606087 |
Semiconductor memory device and over driving method thereof
A semiconductor memory device may include a power line, an over driver, and/or an internal voltage driver. The power line may be connected to at least one sense amplifier. The at least one sense...
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7606061 |
SRAM device with a power saving module controlled by word line signals
An SRAM device include: a latch unit for retaining data; one or more pass gate transistors controlled by a word line for coupling the latch unit to a bit line and a complementary bit line; and a...
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7602664 |
Circuit and method of generating voltage of semiconductor memory apparatus
A circuit for generating a voltage of a semiconductor memory apparatus includes a control unit that outputs a driving control signal in response to an enable signal and a burn-in signal, a first...
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7599240 |
Internal voltage generator of semiconductor memory device
An internal voltage generator of a semiconductor memory device controls generating an internal voltage according to an increase of the internal voltage during an active mode, to thereby decrease...
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7596048 |
Memory system and method of controlling the same
One aspect in accordance with the present invention provides a memory system receiving a power supply from a host device. The memory system includes a non-volatile semiconductor memory and a...
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7596012 |
Write-assist and power-down circuit for low power SRAM applications
Described herein are methods and apparatuses for write-assist voltage generation and power-down voltage scaling for static random access memory (SRAM) cells. According to various embodiments, an...
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7589993 |
Semiconductor memory device with memory cells operated by boosted voltage
A memory using an SRAM memory cell intended for low-voltage operation is designed to decrease the threshold value of MOS transistors constituting the memory cell without substantial decrease in the...
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7586807 |
Semiconductor memory device
A semiconductor memory device includes a row control circuit block and a column control circuit block each performing an access control over a memory cell array, a data I/O circuit block...
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7583556 |
Switching circuit for CMOS circuit
A controlling circuit for controlling on-off switching of a power supply for a CMOS circuit includes a CMOS circuit ( 20 ) and a switch ( 30 ). The CMOS circuit includes a first circuit ( 50 ) for...
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7583538 |
Semiconductor memory and read method of the same
A semiconductor memory including a memory cell which is a MOSFET formed on an SOI substrate. The memory cell has a gate electrode connected to a word line, a drain region connected to a bit line,...
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7580318 |
Address buffer circuit and method for controlling the same
An address buffer circuit for a semiconductor memory device wherein an address buffer is enabled (to output an internal address signal) in response to a first level of a control signal and, but is...
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7580312 |
Power saving system and method for use with a plurality of memory circuits
A power saving system and method are provided. In use, at least one of a plurality of memory circuits is identified that is not currently being accessed. In response to the identification of the at...
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7580303 |
Semiconductor memory having a precharge voltage generation circuit for reducing power consumption
A precharge voltage generating circuit outputs any of a plurality of kinds of precharge voltages in accordance with an ambient temperature. A precharge circuit supplies the precharge voltage to a...
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7577054 |
Memory with word-line driver circuit having leakage prevention transistor
In a semiconductor memory having a plurality of word lines and bit lines and memory cells arranged at the positions of intersection thereof, a word driver circuit that drives the word line has a...
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7577053 |
Memory including deep power down mode
A memory includes an input pad for receiving an input signal and a first circuit. The first circuit is configured to receive a first signal in response to the input signal and receive a second...
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7577052 |
Power switching circuit
A power control circuit for an integrated circuit module includes at least one switch device coupled between a supply voltage and a power node of the integrated circuit module; and a switch control...
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7574553 |
Digital component power savings in a host device and method
A control arrangement, for example, in a digital component that forms part of a system, draws an input current for its operation and is configured for monitoring an interface for any one of a group...
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7573775 |
Setting threshold voltages of cells in a memory block to reduce leakage in the memory block
In one embodiment, a memory block includes one or more bit lines that each include two or more cells. Each cell in each bit line has a distance from a sense amplifier coupled to the bit line, and...
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7571296 |
Memory controller-adaptive 1T/2T timing control
Circuits, methods, and apparatus that adaptively control 1 T and 2 T timing for a memory controller interface. An embodiment of the present invention provides a first memory interface as well as...
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7567478 |
Leakage optimized memory
A method of power optimization in a memory is disclosed. The method generally includes the steps of (A) dividing a plurality of bit cells in a design of the memory into (i) a plurality of first...
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7567477 |
Bias sensing in sense amplifiers through a voltage-coupling/decoupling device
Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices...
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7564732 |
Internal voltage generation circuit for semiconductor device
Provided is an internal voltage generation circuit for generating an internal voltage used in a semiconductor device. The internal voltage generation circuit includes a standby internal voltage...
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7564728 |
Semiconductor memory device and its driving method
A semiconductor memory device controls the voltage level of an equalization signal to be a boost voltage VPP for a predetermined time period and then to be an external power supply voltage VDD,...
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7558143 |
Programmable logic device with power-saving architecture
A programmable logic device (PLD) such as a field programmable gate array (FPGA) has a power-down mode of operation that reduces power consumption during standby or idle periods for the PLD. In one...
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7558130 |
Adjustable drive strength apparatus, systems, and methods
Apparatus, methods, and systems are disclosed, such as those involving a multi-die device having a common bus to indicate a state of each of a die of a multi-die device and that provides the state...
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7555659 |
Low power memory architecture
A memory architecture and circuits for minimizing current leakage in the memory array. Subdivisions of the memory array each have local power grids that can be selectively connected to power...
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7554841 |
Circuit for storing information in an integrated circuit and method therefor
A circuit has a storing portion, a write portion and a read portion. In one embodiment, read portion has a transistor which has a substantially thinner gate oxide than the transistors in the...
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7551508 |
Energy efficient storage device using per-element selectable power supply voltages
An energy efficient storage device using per-element selectable power supply voltages provides energy conservation in storage devices while maintaining a particular performance level. The storage...
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7551505 |
Memory refresh method and apparatus
An integrated circuit includes one or more memory array segments configured to store information and a refresh controller. Each memory array segment has a plurality of memory cells arranged in rows...
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7549066 |
Automatic power savings stand-by control for non-volatile memory
A non-volatile memory array such as a flash memory array may include a power savings circuit to control a stand-by mode of the non-volatile memory array. The power savings circuit may cause a...
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7548481 |
Method and apparatus for dynamic power adjustment in a memory subsystem
An aspect of the invention relates to a method of dynamically adjusting power consumption of a random access memory (RAM) coupled to a processor. Frequency of a memory clock signal coupled to the...
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7548480 |
Circuit and method for supplying power to sense amplifier in semiconductor memory apparatus
A circuit for supplying power to a sense amplifier in a semiconductor memory apparatus includes: a compensation controlling unit configured to generate a compensation control signal to determine...
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7548477 |
Method and apparatus for adapting circuit components of a memory module to changing operating conditions
A method adapts circuit components of a memory module to changing operating conditions within a predefined range. According to one embodiment, a memory module provides a sensor arrangement and a...
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7548157 |
Battery backed service indicator aids for field maintenance
A self-contained backup power source such as a battery is provided for components within an electrically powered device such as a storage controller, photocopier or the like, to maintain diagnostic...
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7545668 |
Mushroom phase change memory having a multilayer electrode
An integrated circuit includes a first electrode including at least two electrode material layers and a resistivity changing material including a first portion and a second portion. The first...
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7529146 |
Semiconductor device
A semiconductor device may include a first logic unit for performing a logic operation with respect to a plurality of first control signals, each of which indicates whether a corresponding one of a...
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7525864 |
Memory data inversion architecture for minimizing power consumption
A method for conserving power in a device is disclosed. The method generally includes the steps of (A) storing a plurality of data items in a plurality of bit cells in the device such that a...
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7518922 |
NAND type flash memory
A NAND type flash memory included with a memory cell array composed of a plurality of electronically rewritable memory cells arranged in a matrix shape, and a data inversion control section which...
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7518898 |
Semiconductor memory device with strengthened power and method of strengthening power of the same
In a semiconductor memory device the power level of which is strengthened by using data input/output pads in a no connection state, and a method of strengthening the power of the semiconductor...
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7512734 |
Adaptive storage system
A storage controller for a host device comprises a control module that receives data storing and data retrieving requests from the host device. A disk drive that is controlled by the control module...
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7508730 |
Semiconductor memory devices having control circuitry to avoid recovering a charge pump when executing consecutive sections of a continuous operation command and methods of operating the same
A semiconductor device includes a memory cell array and a command interface that is configured to receive a command from outside of the semiconductor memory device. The command interface is further...
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