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7548477 |
Method and apparatus for adapting circuit components of a memory module to changing operating conditions
A method adapts circuit components of a memory module to changing operating conditions within a predefined range. According to one embodiment, a memory module provides a sensor arrangement and a...
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7549066 |
Automatic power savings stand-by control for non-volatile memory
A non-volatile memory array such as a flash memory array may include a power savings circuit to control a stand-by mode of the non-volatile memory array. The power savings circuit may cause a...
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7548480 |
Circuit and method for supplying power to sense amplifier in semiconductor memory apparatus
A circuit for supplying power to a sense amplifier in a semiconductor memory apparatus includes: a compensation controlling unit configured to generate a compensation control signal to determine...
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7545668 |
Mushroom phase change memory having a multilayer electrode
An integrated circuit includes a first electrode including at least two electrode material layers and a resistivity changing material including a first portion and a second portion. The first...
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7529146 |
Semiconductor device
A semiconductor device may include a first logic unit for performing a logic operation with respect to a plurality of first control signals, each of which indicates whether a corresponding one of a...
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7525864 |
Memory data inversion architecture for minimizing power consumption
A method for conserving power in a device is disclosed. The method generally includes the steps of (A) storing a plurality of data items in a plurality of bit cells in the device such that a...
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7518922 |
NAND type flash memory
A NAND type flash memory included with a memory cell array composed of a plurality of electronically rewritable memory cells arranged in a matrix shape, and a data inversion control section which...
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7518898 |
Semiconductor memory device with strengthened power and method of strengthening power of the same
In a semiconductor memory device the power level of which is strengthened by using data input/output pads in a no connection state, and a method of strengthening the power of the semiconductor...
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7512734 |
Adaptive storage system
A storage controller for a host device comprises a control module that receives data storing and data retrieving requests from the host device. A disk drive that is controlled by the control module...
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7508730 |
Semiconductor memory devices having control circuitry to avoid recovering a charge pump when executing consecutive sections of a continuous operation command and methods of operating the same
A semiconductor device includes a memory cell array and a command interface that is configured to receive a command from outside of the semiconductor memory device. The command interface is further...
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7505359 |
Integrated semiconductor memory device with clock generation
A memory device can be operated in a first operating state and a second operating state, where read access to memory cells can be performed in the first operating state. The memory device includes...
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7502977 |
Method and apparatus for reconfigurable memory
A reconfigurable memory in an integrated circuit includes an array of memory cells and a memory controller. The array of memory cells in the reconfigurable memory are tested to determine if they...
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7499359 |
Temperature sensor instruction signal generator and semiconductor memory device having the same
A temperature sensor instruction signal generator, which may drive a temperature sensor, and a semiconductor memory device including the same. The temperature sensor instruction signal generator...
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7498835 |
Implementation of low power standby modes for integrated circuits
A PLD ( 200 ) includes a power management unit (PMU 210 ) that selectively implements one or more different power-reduction techniques in response to power configuration signals (PC). By...
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7499310 |
Bit line voltage supply circuit in semiconductor memory device and voltage supplying method therefor
There is provided a bit line voltage supply circuit for reducing leakage current flowing from bit lines to a memory cell without substantially deteriorating the performance of a semiconductor...
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7495986 |
Semiconductor memory device, and method of controlling the same
An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the...
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7495981 |
Internal voltage generator
An internal voltage generator includes an output node, a bit line precharge voltage generating unit for generating a bit line precharge voltage, and a voltage drop block for dropping a voltage...
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7495982 |
Internal voltage generator
An internal voltage generation device includes a plurality of output nodes; a bit line precharge voltage generation unit for generating a bit line precharge voltage; a first voltage drop unit for...
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7492640 |
Sensing with bit-line lockout control in non-volatile memory
In sensing a group of cells in a multi-state nonvolatile memory, multiple sensing cycles relative to different demarcation threshold levels are needed to resolve all possible multiple memory...
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7489540 |
Bitcell with variable-conductance transfer gate and method thereof
A memory device comprises a bit cell comprising a bit storage device, a first word line, a second word line, and a first transfer gate to connect the bit storage device to a bit line. The first...
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7489553 |
Non-volatile memory with improved sensing having bit-line lockout control
In sensing a group of cells in a multi-state nonvolatile memory, multiple sensing cycles relative to different demarcation threshold levels are needed to resolve all possible multiple memory...
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7489588 |
Semiconductor memory device having a main amplifier equipped with a current control circuit in a burst read operation
A column circuit that amplifies signals read from a sense amplifier array SAA to local input/output lines LIO in sub-amplifiers SAMP to transfer the amplified signals to main input/output lines MIO...
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7489587 |
Semiconductor memory device capable of controlling clock cycle time for reduced power consumption
Some embodiments of the invention include a delay locked loop having a delay line for delaying an input signal. The input signal is generated from a first signal. A delay controller controls the...
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7486108 |
Charge recycling power gate
A charge recycling power gate and corresponding method are provided for using a charge sharing effect between a capacitive load of a functional unit and a parasitic capacitance of a charge...
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7483330 |
Power efficient memory and cards
A memory with an internal detection mechanism to detect the presence of either an external component of an external voltage on some no connect pins, allowing a change in the configuration of the...
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7484129 |
Physiologic event monitoring device having robust internal control
Categories are established for use in physiological monitoring devices and these categories are prioritized such that data indicative of a critical event self-triggers a communication to an...
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7483329 |
Flash card and controller with integrated voltage converter for attachment to a bus that can operate at either of two power-supply voltages
A dual-voltage secure digital (SD) card can be inserted into a legacy host or a newer host. Legacy hosts drive a high voltage such as 3.3 volts onto the power line of the SD bus, while newer hosts...
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7480199 |
Method for low power refresh of a dynamic random access memory using a slower refresh rate than a normal refresh rate
A method and system for operating a DRAM device in either a high power, full density mode or a low power, half density mode. In the full density mode, each data bit is stored in a single memory...
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7474146 |
Electronic device with standby function, standby power supply system and method thereof
A standby power supply system in an electronic device including a power-consuming circuit is provided. The standby power supply comprises a signal sensor, a standby power source, a switch circuit,...
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7468930 |
Apparatus and method for reducing the leakage current of memory cells in the energy-saving mode
The energy consumption of a static memory cell, which may be connected to a first bit line and a second bit line of a bit line pair by means of transistors, is reduced in an energy-saving mode of...
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7468929 |
Apparatus for SRAM array power reduction through majority evaluation
A mechanism for reducing the amount of power or energy consumed by an SRAM array when the SRAM array is being accessed is provided. Logic is provided that identifies a polarity of a row of memory...
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7466620 |
System and method for low power wordline logic for a memory
A method of reducing power consumption of a memory is provided. A request is received to access a memory device, including a decoder, a plurality of wordline drivers and a plurality of wordlines....
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7460429 |
Circuit and method for reducing power in a memory device during standby modes
A memory device responsive to standby mode commands for reducing internal operational power on a memory device is disclosed. The memory device includes a circuit for reducing power during a standby...
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7453756 |
Method for powering an electronic device and circuit
A circuit and method efficiently powers a static storage element during a low voltage mode of operation. The static storage element is powered at a first voltage level in an active mode of the...
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7450456 |
Temperature determination and communication for multiple devices of a memory module
The temperature for multiple devices of a memory module are determined. In one example a memory module includes a printed circuit board, a plurality of memory chips on the printed circuit board,...
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7450465 |
Read command triggered synchronization circuitry
A memory READ command triggered clock synchronization mode turns on a clock synchronization circuit only for memory READ operations. The clock synchronization circuit achieves a signal lock with...
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7447099 |
Leakage mitigation logic
Leakage current from a circuit for handling data is reduced using leakage control circuit operable in a leakage reduction mode. The data handling circuit comprises data handling logic operable to...
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7447083 |
Semiconductor memory device having low power consumption type column decoder and read operation method thereof
The present invention relates to a semiconductor memory device having a low power consumption type column decoder and read operation method thereof. In accordance with the semiconductor memory...
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7447101 |
PG-gated data retention technique for reducing leakage in memory cells
A method of forming a memory cell includes coupling a first transistor between a supply rail of a memory cell and a node operable to accept a supply voltage. The method further includes coupling a...
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7443758 |
Circuit and method of generating high voltage for programming operation of flash memory device
Provided is a high voltage generator for a flash memory device including a voltage pumping unit configured to generate a high voltage in response to a pumping clock signal, a transistor having a...
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7443752 |
Semiconductor memory device amplifying data
A semiconductor memory device includes an I/O line, a first sense amplifier connected to the first I/O line to amplify a signal applied on the first I/O line in response to a first control signal,...
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7443759 |
Reduced-power memory with per-sector ground control
A reduced-power memory (such as for a cache memory system of a processor or a microprocessor) provides per-sector ground control to advantageously reduce power consumption. Selective power control...
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7440354 |
Memory with level shifting word line driver and method thereof
A memory includes a bit cell array including a plurality of word lines and address decode circuitry having an output to provide a predecode value. The address decode circuitry includes a first...
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7440352 |
Semiconductor memory device capable of selectively refreshing word lines
A semiconductor memory device comprises a plurality of memory cells connected to a plurality of word lines grouped in word line sets. Each of the word line sets is connected to a word line enable...
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7436712 |
Nonvolatile memory device including circuit formed of thin film transistors
A transistor is arranged for electrically isolating a sense amplifier formed of a thin film transistor from a data line electrically coupled to the sense amplifier. When a write driver drives the...
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7433257 |
Semiconductor memory device
When a memory cell is inactive, a memory cell power supply voltage control circuit decreases the power supply voltage supplied to the memory cell down to a memory cell holding voltage, thereby...
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7430149 |
Semiconductor device
There is provided a semiconductor device supplied with internal power generated by an internal power generation circuit to perform a stable operation and, also, suppress power consumption. A...
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7430148 |
Volatile memory elements with boosted output voltages for programmable logic device integrated circuits
Integrated circuits are provided that have memory elements. The memory elements produce output signals. The integrated circuits may be programmable logic device integrated circuits containing...
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7428164 |
Semiconductor memory device
When threshold voltages of constituent transistors are reduced in order to operate an SRAM circuit at a low voltage, there is a problem in that a leakage current of the transistors is increased...
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7426147 |
Power supply voltage control circuit
A power supply voltage control circuit supplying a power supply voltage to a memory cell array, including word lines extending along row direction, bit lines extending along column direction, plate...
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