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5337278 Low-power decoder for selecting redundant memory cells  
To avoid unnecessary power dissipation, a decoder for selecting redundant memory cells in a memory device provides, for each section of the memory device, a first node and a second node that are...
5337285 Method and apparatus for power control in devices  
A power control circuit to minimize power consumption of CMOS circuits by disabling/enabling the clock input to the CMOS circuit. A phase locked loop (PLL) or delay locked loop (DLL) drives a...
5332929 Power management for programmable logic devices  
A programmable circuit is provided with a number of current regulating circuits, such as sense amplifiers, by which the user can regulate the amount of current drawn by any of a number of circuit...
5331601 DRAM variable row select  
A memory device circuit that alters the input refresh addresses to access fewer memory cells to save power, or to address more memory cells to decrease the refresh time. The circuit contains a...
5331599 Dynamically switchable reference voltage generator  
An integrated circuit memory which includes a subcircuit for generating a programmable reference voltages on-chip from an external high-voltage supply line. Depending on the mode of operation...
5329491 Nonvolatile memory card with automatic power supply configuration  
A nonvolatile memory card includes a power supply input for receiving a device power supply voltage for the memory card and a plurality of memories arranged in an array. Each of the plurality of...
5324992 Self-timing integrated circuits having low clock signal during inactive periods  
An integrated circuit function unit operating in a data dependent manner in logic operations of variable lengths of time is provided with a clock signal having a pulse width determined by the...
5323354 Semiconductor memory device including arrangements to facilitate battery backup  
A multi-port memory is provided which is capable of being backed up by a battery to provide a resume function for a digital processor. In a preferred embodiment, a resume function can be provided...
5319601 Power supply start up circuit for dynamic random access memory  
A power supply circuit for a DRAM has a power-on detection circuit which detects when an external power supply potential reaches a predetermined potential and produces first and second detection...
5315557 Semiconductor memory device having self-refresh and back-bias circuitry  
A semiconductor memory device includes a refresh timer for generating a refresh clock pulse, a binary counter for generating a predetermined number of signals of different frequencies and a circuit...
5307318 Semiconductor integrated circuit device having main power terminal and backup power terminal independently of each other  
A semiconductor integrated circuit device in which an internal circuit thereof is held by a backup power source when a main power source is disconnected comprises a comparator 29 for comparing a...
5303190 Static random access memory resistant to soft error  
A static random access memory (30), resistant to soft error from alpha particle emissions has a high density array of memory cells (44) coupled to word lines (73 and 74) and bit line pairs (68),...
5298816 Write circuit for CMOS latch and memory systems  
A write assist circuit for CMOS inverter-type memory cells and latches having means for choking current flow from a voltage level source to power supply terminals of a group of such memory cells or...
5297098 Control apparatus for data storage apparatus  
A storage control apparatus for controlling memory elements having a data hold mode is provided with a switching circuit for switching a first voltage for a normal operation mode and a second...
5291452 Sensing amplifier circuit for data readout from a semiconductor memory device  
In a semiconductor memory device, two sense amplifiers are provided on one output signal line for reading data stored in a memory cell. The sense amplifiers are connected in parallel to each other....
5291454 Circuit for decreasing current consumption in data output circuit in case one of two supply voltages fails  
An improved output buffer circuit applicable to dynamic random access memories (DRAms) is disclosed. First power supply voltage Vcc1 is supplied to a conventional output main amplifier 3ai. Second...
5287320 Timing coinciding circuit simultaneously supplying two power supply voltages applied in different timing  
An improved DRAM includes a main circuit and an output driver circuit, respectively, energized by externally applied two power supply voltages. The DRAM includes a timing coinciding circuit for...
5282170 Negative power supply  
A negative power supply for generating and supplying a regulated negative potential to control gates of selected memory cells via wordlines in an array of flash EEPROM memory cells during flash...
5280452 Power saving semsing circuits for dynamic random access memory  
A sensing circuit for a dynamic random access memory structure is disclosed having first and second bit lines, one of the bit lines being a reference bit line which is held at a precharge voltage...
5278796 Temperature-dependent DRAM refresh circuit  
A temperature sensing circuit allows a DRAM array to use less power than would normally be possible due to the reduced refresh rate based on the temperature of the DRAM array. The temperature...
5276652 Static random access memory including a simplified memory cell circuit having a reduced power consumption  
A static random access memory includes a plurality of memory cells each constituted by 5 elements. One memory cell is connected to a single bit line through a single access gate transistor....
5272676 Semiconductor integrated circuit device  
The self-refresh operation of one round of a RAM using dynamic memory cells is accomplished on the basis of the periodic pulses which are formed by an oscillating circuit substantially having no...
5272677 Semiconductor memory device equipped with step-down power voltage supply system for sense amplifier circuit arrays  
A dynamic random access memory device includes a plurality of memory cell plates each having memory cells and a sense amplifier circuit array selectively coupled with the memory cells, and the...
5267203 Sense amplifier control circuit of a semiconductor memory device  
A sense amplifier control circuit for controlling the voltage applied to a sense amplifier and a memory cell by setting the voltage as a given level (in this case, 4 V) is provided. The sense...
5263001 Low power consumption word line driver  
Disclosed is a low power consumption word line driver that satisfactorily operates even with the threshold voltage variations. A load FET comprises a depletion FET (J5) and enhancement FET (J6)....
5262998 Dynamic random access memory with operational sleep mode  
A dynamic memory device exhibits a sleep mode of operation, entered in response to a single externally-applied signal which need not be cycled. While in this sleep mode, the device does not respond...
5262993 Semiconductor memory having redundancy circuit with means to switch power from a normal memory block to a spare memory block  
In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on...
5263000 Drain power supply  
A drain power supply for generating and supplying a regulated positive potential to drain regions of selected memory cells via bit lines in an array of flash EEPROM memory cells during programming...
5251178 Low-power integrated circuit memory  
In accordance with one embodiment of the invention, an integrated circuit memory capable of receiving address signals has a plurality of array banks. Each array bank has a plurality of memory cells...
5251179 Apparatus and method for extending battery life  
An electrical product uses a small battery, which is permanently soldered into the product, to protect certain critical circuits such as volatile memory when primary power is removed. The life of...
5247655 Sleep mode refresh apparatus  
A circuit for waking a microprocessor from a sleep mode and providing it with its microprocessor clock long enough for a refresh, direct memory access (DMA) or master cycle operation to be done by...
5239511 Low power redundancy circuit for a memory device  
The invention relates to a low power redundancy circuit used in memory device and comprises operation control fuse circuit 47, an OR gate 48, a switching circuit 56, a fuse circuit 45, and a...
5235548 Memory with power supply intercept in redundancy logic  
A low-power SRAM with redundant rows in each of the subarrays. Conventional redundancy logic permits defective rows to be electrically replaced by redundant rows. In addition, power supply...
5229942 Control system for remote power up  
Automotive vehicle test equipment includes a controller which controls power supplied to a test circuit. The controller monitors a sleep mode switch which determines whether the controller enters a...
5229966 Current control circuit for dynamic memory  
As latch circuit is supplied with a readout control signal for reading out data and a reference voltage for determining "1" or "0" of address data. The latch circuit latches address data for...
5226014 Low power pseudo-static ROM  
A pseudo-static ROM circuit which uses cross-coupled sense amplifiers to provide rapid accesses to ROM stored data, yet because of a special bit line precharger and dummy load arrangement...
5226007 Automatic shutoff for memory load device during write operation  
The present invention is directed to semiconductor memories which can operate at faster speeds with reduced power dissipation. In a preferred embodiment, load devices of a memory array, such as a...
5220672 Low power consuming digital circuit device  
A method is provided for decreasing the power consumption of a sequential digital circuit having a plurality of states being determined from the current state and the input conditions and entered...
5208774 Semiconductor memory device with low power consumption output data selector  
A static random access memory device has read-out bit lines for propagating read-out data bits to a selector circuit, and logic gates are coupled between the read-out bit lines and the selector...
5208781 Memory device with standby function  
A memory device includes a memory, an address latch, a built-in incrementer, and an address decoder. The address decoder has a mapping register which assigns the memory to a predetermined address....
5197034 Floating gate non-volatile memory with deep power down and write lock-out  
A non-volatile memory is described. The memory includes a memory array that includes a main block and a boot block. The memory also includes a control input for receiving a control signal. The...
5193198 Method and apparatus for reduced power integrated circuit operation  
A battery-powered electronic system in which ICs of low and high voltage specifications can be operated simultaneously by a single low voltage power supply, wherein prolongation of battery life,...
5193073 On chip voltage regulator for common collection matrix programmable memory array  
A programmable memory includes a voltage regulator (32) which is disposed between the supply voltage and the matrix supply line (10) for programmable memory cells. Each of the memory cells is...
5191554 Low-voltage low-power static RAM  
A low-power low-voltage CMOS six-transistor static random access memory (SRAM), which can operate on a power supply voltage which is less than the sum of the NMOS and PMOS threshold voltages, does...
5187564 Application of laminated interconnect media between a laminated power source and semiconductor devices  
A flat geometry interconnect media connects the electrodes of a laminated power source in electrical contact with positive and negative power input terminals on a planar substrate. The interconnect...
5175706 Programming voltage generator circuit for programmable memory  
Electrically programmable memories often include an internal circuit for establishing a programming voltage Vpp higher than the supply voltage. This circuit is formed by a charge pump followed by a...
5172342 Portable semiconductor memory unit  
A portable semiconductor memory unit comprises a semiconductor memory requiring different voltages for reading and writing. A single supply voltage is supplied to the portable semiconductor memory...
5146427 High speed semiconductor memory having a direct-bypass signal path  
In a semiconductor memory, a latch circuit is arranged between the outputs of a sense amplifier and the inputs of a data output buffer. First pass-gates are arranged between the outputs of the...
5144585 Supply voltage converter for high-density semiconductor memory device  
A supply voltage converter circuit for use in reduced geometry high-density semiconductor memory devices, capable of reducing current consumption to as small a value as possible and achieving...
5144586 Apparatus and method for connecting electronic modules containing integrated circuits and backup batteries  
Method and apparatus for connecting a data storage module to an external circuit. The method includes connecting a power supply terminal between the module and the external circuit before signal...