Matches 601 - 650 out of 947 < 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 >
Match Document Document Title
5663687 LSI with built-in clock generator-controller for operation with low power dissipation  
The invention provides an LSI with a built-in clock generator-controller which minimizes power dissipation of an entire system and reduces production of a skew between an external system clock...
5663920 Semiconductor memory word line driver circuit  
A driving circuit having an output terminal includes an input terminal coupled to a first control signal; a first transistor having a current path connected between a pumping voltage and the output...
5661751 System and technique for power management of a universal asynchronous receiver/transmitter by automatic clock gating  
A clock control unit is provided that controls the gating of a clock signal received by an internal baud generator of a universal asynchronous receiver/transmitter (UART) circuit during an active...
5661691 Simple layout low power data line sense amplifier design  
A data-line sense amplifier circuit for the sensing, amplifying and writing of digital data to and from a set of I/O lines from a bit line sense amplifying circuit is described. The data-line sense...
5654929 Refresh strategy for DRAMs  
An improved method of accessing dynamic random access memory (DRAM) banks during refresh cycles contemplates sequentially accessing DRAM banks which do not share common filtering capacitors. In...
5646902 Static random access memory device with low power dissipation  
A static random access memory device having a power-down timer for generating a power-down signal in response to a plurality of address transition detecting signals and data input detecting...
5646900 Sense amplifier including MOS transistors having threshold voltages controlled dynamically in a semiconductor memory device  
N channel sense amplifier transistors have their backgate potentials set to a backgate precharge potential higher than a potential intermediate between an operation power supply potential and a...
5644773 Sense amplifier timing method and apparatus for peak power reduction  
An apparatus and method for enabling multiple sense amps in a burst read memory is described. The sense amps are divided into two sets which are then enabled at slightly different times. The time...
5634106 Power saving system and method for refreshing a computer memory by switching between interval refresh and self-refresh operations  
A micro-computer system using a DRAM can refresh the DRAM in a certain interval cycle to maintain the memory contents or refresh the DRAM memory even when the system is set into the standby mode...
5631872 Low power consumption semiconductor dynamic random access memory device by reusing residual electric charge on bit line pairs  
A data refresh is indispensable for a semiconductor dynamic random access memory device, and electric charges are recycled from bit line pairs for a row of memory cell arrays to power supply lines...
5630090 Apparatus for and methods of providing a safe-stop mode for a microprocessor operating in a PSRAM-memory environment  
A microprocessor circuit including a microprocessor device and pseudo-static RAM memory further includes a switching circuit which is coupled to an NMI signal port and to a RESET signal port of the...
5630143 Microprocessor with externally controllable power management  
A processing unit includes a plurality of subcircuits and circuitry for generating clock signals thereto. Detection circuitry detects the assertion of a control signal and disabling circuitry is...
5627788 Memory unit with bit line discharger  
An apparatus and method for managing a memory is disclosed. A discharging unit discharges overcharged bit lines in memory. The discharging unit discharges the bit lines after a predetermined time...
5623450 Conditional recharge for dynamic logic  
A system and method is disclosed for saving power dissipated during the recharge of large arrays, such a domino SRAMS, by activating only the recharge circuits for the parts of the array that was...
5621693 Semiconductor memory device  
A power source potential VDD and a ground potential GND are supplied to a memory cell which belongs to a selected column. The power source potential VDD and an intermediate potential V p are...
5619466 Low-power read circuit and method for controlling a sense amplifier  
A read circuit for a memory cell includes a sense amplifier and an equilibrate circuit. The sense amplifier is coupled to the memory cell via a pair of data lines, and amplifies the data signals...
5617348 Low power data translation circuit and method of operation  
A low power circuit (10) for translating logical addresses or input data to corresponding physical addresses or output data respectively. The circuit (10) includes an input latch (12), content...
5617362 Semiconductor memory device having extended data out function  
A DRAM includes an output terminal, a memory cell array having a plurality of memory cells, a row decoder, a column decoder, an input/output circuit, a data extending circuit, an output buffer...
5604711 Low power high voltage switch with gate bias circuit to minimize power consumption  
A memory circuit with a low power programming voltage switch for reduced leakage current during a read operation. The apparatus includes a high voltage switch which, in a programming mode receives...
5604707 Semiconductor memory device responsive to hierarchical internal potentials  
A semiconductor memory device includes a semiconductor substrate, a plurality of memory blocks, first and second substrate potential generating circuits and a select circuit. The semiconductor...
5596758 Memory protecting device for use in compact electronic apparatus equipped with an external power supply  
A main power supply is connected to a memory through a diode which is provided in such a manner as to allow the current to flow from the main power supply to the memory. An external power supply...
5596545 Semiconductor memory device with internal self-refreshing  
A semiconductor memory device with internal self-refreshing is provided. The invented memory device has a programmable internal oscillator for controlling a self-refreshing time period. The...
5581500 Memory cell with power supply induced reversed-bias pass transistors for reducing off-leakage current  
A memory cell is disclosed. The memory cell operating within a power supply range that induces the pass transistor(s) of the memory cell to be reversed biased when the memory cell is not being...
5579524 Optimized power supply system for computer equipment  
A power supply system for a general purpose computer has plural power supplies for powering selected groups of components. One of the power supplies serves the keyboard and its controller, and the...
5572478 Power supply unit for an IC memory card  
A power supply unit including DC-DC converter using a thin and planar inductor arranged in an IC memory card incorporating an EEPROM memory chip, wherein a voltage is adjusted by a dropping...
5570313 Memory insensitive to disturbances  
The invention concerns a memory cell insensitive to disturbances. The memory cell, that contains information in the form of two complementary logical levels (X, C(X)), each logical level being...
5566120 Apparatus and method for controlling transistor current leakage  
A circuit for reducing current leakage in a logic circuit such as a write driver circuit in a memory array is disclosed. The current leakage reducing circuit includes a data line configured to be...
5565791 Method and apparatus for disabling unused sense amplifiers  
A programmable circuit includes: (a) a plurality of programmable cells; (b) a sense amplifier for detecting states of the plurality of programmable cells; (c) a programmable unit for receiving a...
5563839 Semiconductor memory device having a sleep mode  
The present invention provides a computer memory device having a sleep mode characterized by extremely low current consumption and relatively large turn on delay. The invention includes circuitry...
5563837 Semiconductor memory device with reduced consumption power and refreshing method of the same  
A semiconductor memory device having a reduced consumption power at a periodic self-refreshing operation and a refreshing method of this semiconductor memory device, in which a supply voltage to an...
5560020 Power saving processing system  
A data processing system which has a processor which issues a key sensing signal when waiting for the input of data; a discriminator connected to the processor for judging whether a key sensing...
5555528 Dynamic random access memory persistent page implemented as processor register sets  
The sense amplifier registers (SARs) servicing the arrays of a dynamic random access memory (DRAM) located on a semiconductor chip with a processor are all maintained at full power while unaccessed...
5550781 Semiconductor apparatus with two activating modes of different number of selected word lines at refreshing  
A memory cartridge having a plurality of dynamic memory units includes an access conversion circuit which converts a static access signal into its inverted signal and an access control circuit...
5550775 Semiconductor device for generating high voltage potentials  
A semiconductor device comprises: a signal of high voltage not less than the power voltage; a first transistor for transmitting the high voltage signal; a second transistor for electrically...
5544120 Semiconductor integrated circuit including ring oscillator of low current consumption  
A semiconductor integrated circuit includes a bias voltage regulation circuit having variable resistors which are provided between voltage output circuits of higher and lower potential sides and...
5544110 Sense amplifier for semiconductor memory device having pull-up and pull-down driving circuits controlled by a power supply voltage detection circuitry  
There is disclosed a sense amplifier for a semiconductor memory device comprising a cross coupled latch for sense-amplifying data signals on bit lines, a pull-up driver connected between the cross...
5541885 High speed memory with low standby current  
A semiconductor device, having an active operation mode wherein a large amount of current is consumed and a standby operation mode wherein a very small amount of current is consumed, comprises...
5535168 Method and apparatus for selectively erasing memory to extend battery life  
Memory (120) in a device (100) that includes a power source (105) is erased when an alarm triggering event is detected. An alarm signal is provided that is used to determine whether the memory...
5535174 Random access memory with apparatus for reducing power consumption  
A random access memory (RAM) having an array of memory cells the signal lines to which are activatable by corresponding current sources. The memory is divided into "pages", and control pulses are...
5532945 Power budgetting in a computer system having removable devices  
A computer system with power budgeting for removable devices is disclosed comprising a nonvolatile memory that contains a power resource table for storing a power consumption indication for at...
5526319 Memory with adiabatically switched bit lines  
A semiconductor memory is described incorporating an energy conserving cyclic power source for charging and discharging the bit line with a minimum voltage across the switches. The invention...
5526322 Low-power memory device with accelerated sense amplifiers  
An AND array for an erasable programmable logic device (EPLD) includes word-line transition detectors for indicating high-to-low word-line transitions. Such transitions are a condition precedent...
5526318 Semiconductor memory with power-on reset controlled latched row line repeaters  
An integrated circuit memory is disclosed which has its memory array divided into blocks, or sub-arrays. Between each sub-array is placed a row line repeater which communicates the row line from...
5524097 Power saving sense amplifier that mimics non-toggling bitline states  
A sense amplifier of the present invention provides power savings of between 30% to 70% for typical usage of a programmable logic device. In one embodiment, this sense amplifier includes circuitry...
5521877 Serial random access memory device capable of reducing peak current through subword data register  
In a semiconductor memory device comprising a plurality of memory cells which are arranged on a cell area defined by a first number of column signal lines and a second number of row signal lines, a...
5504908 Power saving control system for computer system  
A power saving control system for a computer system including a CPU, is provided with a mode selecting circuit for selectively operating the CPU in a first mode with relatively high performance and...
5502682 Semiconductor integrated circuit for controlling power source  
A semiconductor integrated circuit for controlling a power source with which a power source potential on the basis of different external power source potentials, for example, 5 V and 3 V, can...
5500817 True tristate output buffer and a method for driving a potential of an output pad to three distinct conditions  
The invention is a circuit and method for providing a true tristate output at an output pad of a serial access memory device. The invention drives three distinct potentials to the output pad, two...
5499210 Low power consumption semiconductor memory  
A low power consumption semiconductor memory device that can read stored data at a faster access time, while minimizing power consumption is provided. In accordance with the logic states on a pair...
5495453 Low power voltage detector circuit including a flash memory cell  
A voltage detector circuit for detecting when an input voltage exceeds a trip-point voltage. The voltage detector circuit includes a nonvolatile memory cell having a select gate coupled to the...
Matches 601 - 650 out of 947 < 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 >