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Match Document Document Title
8184493 Semiconductor memory device and system  
A semiconductor memory device includes a memory cell array including primary word lines and one or more redundant word lines, a timing signal generating circuit configured to generate a refresh...
8184495 Semiconductor memory device for controlling operation of delay-locked loop circuit  
A semiconductor memory device for controlling an operation of a delay-locked loop (DLL) circuit includes a DLL circuit that receives an external clock signal and that performs a locking operation...
8180500 Temperature sensing system and related temperature sensing method  
A temperature sensing system, which comprises: a temperature analyzing circuit, for sensing temperature and generating an analyzing result in response to the sensed temperature; and a control unit,...
8174866 Semiconductor storage device  
A semiconductor storage device includes: a memory cell array that includes a plurality of memory cells having a cell transistor formed on a well subjected to application of a predetermined...
8174921 Semiconductor memory device having shared temperature control circuit  
A semiconductor memory device includes a plurality of memory banks; a plurality of temperature sensing circuits, and a shared control circuit. The temperature sensing circuits correspond to the...
8174917 Semiconductor memory for disconnecting a bit line from sense amplifier in a standby period and memory system including the semiconductor memory  
Each memory block has a plurality of memory cells, and word lines and bit lines connected to the memory cells. Precharge switches connect the bit lines to a precharge line. A switch control circuit...
8169852 Memory control circuit, control method, and storage medium  
A circuit configured to change a mode of a plurality of memory devices having a power saving mode includes a command queue configured to hold memory access, and a cancellation unit configured to...
8169847 Semiconductor memory apparatus and refresh control method of the same  
A semiconductor memory apparatus and refresh control method are presented. The semiconductor memory apparatus includes a memory cell block composed of a multiplicity of floating body cell (FBC)...
8164967 Systems and methods for refreshing non-volatile memory  
Systems and methods are disclosed for managing a non-volatile memory (“NVM”), such as a flash memory. To prevent data errors due to leakage effects, the NVM may be refreshed. For example, a res...
8164965 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency  
A logic circuit operates write receivers in a dynamic random access memory device in either a low-power mode, high write latency mode or a high-power mode, low write latency mode. The logic circuit...
8159885 Refresh control circuit and semiconductor memory device and memory system including the same  
A semiconductor memory device includes a refresh control circuit and a memory cell array. The refresh control circuit generates an internal auto refresh control signal based on a chip select signal...
8161249 Method and apparatus for multi-port arbitration using multiple time slots  
An apparatus includes a programmable device that has an interface and command ports that can each receive commands, each command requesting an information transfer through the interface. A...
8154941 Non-volatile semiconductor memory device and method of writing data therein  
A device includes a memory cell array and a control circuit, the memory cell array including word-lines, bit-lines, and memory cells arranged at the intersections of the word-lines and the...
8154939 Control method for nonvolatile memory and semiconductor device  
In a nonvolatile memory, the threshold is restored to a state before changing, without increasing number of writing undesirably. In a system including a nonvolatile memory, a random number...
8154940 Method of reducing current of memory in self-refreshing mode and related memory  
The present invention provides a method of reducing current of a memory in a self-refreshing mode and a related memory. The memory includes a word line driver and a controller, and the word line...
8149641 Active cycle control circuit for semiconductor memory apparatus  
An active cycle control circuit for a semiconductor memory apparatus is configured to precharge a word line corresponding to a read cycle, and activate a word line corresponding to a refresh...
8144539 Semiconductor memory device for self refresh and memory system having the same  
A semiconductor memory device includes a memory core unit including a memory cell array including a plurality of memory cells and a sense amplifier to sense and amplify data of the plurality of...
8139399 Multiple cycle memory write completion  
A memory system that reduces the memory cycle time of a memory cell by performing an incomplete write operation. The voltage on a storage node of the memory cell does not reach a full supply...
8139435 Data storage apparatus and control method of data storage apparatus  
In a data storage apparatus having data storage means, if it is judged that a condition of transitioning the data storage apparatus into a power saving state is established, it is controlled so...
8139433 Memory device control for self-refresh mode  
To ensure that a memory device operates in self-refresh mode, the memory controller includes (1) a normal-mode output buffer for driving a clock enable signal CKE onto the memory device's CKE input...
8136156 Module with a controller for a chip card  
In a module with a controller for a chip card, the controller having first and second I/O pads for data input and output, and the module having one I/O pad. Both of the first and second I/O pads of...
8130586 Semiconductor memory device and method of controlling the same  
An internal voltage generator when activated, generates an internal voltage to be supplied to an internal circuit. Operating the internal voltage generator consumes a predetermined amount of the...
8130564 Semiconductor memory device capable of read out mode register information through DQ pads  
A semiconductor memory device is provided that is capable of reading out mode register information stored in a register adapted for LPDDR2 (Low Power DDR2), through DQ pads. The semiconductor...
8130585 System and method for hidden-refresh rate modification  
A system and method for modifying a hidden-refresh rate for dynamic memory cells includes monitoring a control signal from a processor and performing a hidden-refresh of dynamic data at a first...
RE43223 Dynamic memory management  
In a method, system and apparatus for management of dynamic memory in battery-powered devices, information is stored in dynamic memory, such as SDRAM chips. Chip partitioning minimizes the number...
8120971 Internal source voltage generating circuit of semiconductor memory device  
An internal source voltage generating circuit includes a comparison voltage generator which receives reference and internal source voltages, outputs to a second node a comparison voltage...
8122188 Method of controlling refresh operation in multi-port DRAM and a memory system using the method  
A multi-port memory system includes a shared memory bank, and a refresh controller coupled to the shared memory bank, and configured to selectively apply refresh commands from multiple processors...
8116162 Dynamic signal calibration for a high speed memory controller  
Within an integrated circuit comprising a memory controller, a method can include, responsive to determining that the memory controller is performing a refresh operation, calculating a new tap...
8116161 System and method for refreshing a DRAM device  
The present invention provides a system and method for refreshing a DRAM device without interrupting or inhibiting read and write operations of the DRAM device. The system may includes refresh...
8117519 Memory apparatus and method using erasure error correction to reduce power consumption  
An error correction circuit coupled to a plurality of memory cells in a memory device includes an error correcting code (“ECC”) generator and an ECC controller. The ECC generator is coupled to the...
8112577 Concurrently communicating refresh and read/write commands with a memory device  
Disclosed are, inter alia, methods, apparatus, computer-readable media, mechanisms, and means for communicating with a memory device, such as by a memory controller, a refresh command at least...
8111575 Semiconductor device  
There is provided a semiconductor device including: a temperature sensor detecting temperature; an inner circuit operating when supplied with a power supply voltage from a power supply line; a...
8111574 Circuit and method for controlling self-refresh cycle  
The present invention relates to a circuit and a method for controlling a self-refresh cycle of a dynamic random access memory or DRAM. A cell voltage is directly detected so that a self-refresh...
8107310 Semiconductor memory device and method for operating the same  
A semiconductor memory device includes a bank having a plurality of mats, an address counting unit configured to receive an auto-refresh command consecutively applied at predetermined intervals...
8102715 Power-off apparatus, systems, and methods  
Apparatus, methods, and systems are disclosed, including those that are to prevent a bias voltage from rising to a higher level than a storage node voltage as the bias voltage transitions to a...
8098537 Data refresh for non-volatile storage  
Techniques are disclosed to refresh data in a non-volatile storage device often enough to combat erroneous or corrupted data bits, but not so often as to interfere with memory access or to cause...
8094512 Semiconductor memory device with individual and selective refresh of data storage banks  
A conventional semiconductor memory device may be in need of a special refresh sequence if it is desired to reduce the current consumption in connection with a refresh operation. With this in view,...
8089804 Non-volatile semiconductor memory device using weak cells as reading identifier  
A non-volatile semiconductor memory is configured to monitor for onset of a read disturbance (e.g., due to soft programming) and to carry out operations to protect data therein. A non-volatile...
8085572 Semiconductor memory apparatus  
A semiconductor memory apparatus includes a unit cell with a transistor having a floated body and a capacitor for storing charges; a word line for activating the unit cell; and a bit line for...
8082413 Detection circuit for mixed asynchronous and synchronous memory operation  
A memory access mode detection circuit and method for detecting and initiating memory access modes for a memory device. The memory access mode detection circuit receives the memory address signals,...
8081533 Semiconductor memory device  
A semiconductor memory device is provided between a refresh request circuit and a command decoder, and includes a refresh synchronous circuit for deactivating a refresh request if an external...
8077535 Memory refresh apparatus and method  
A system and method are provided. The system and method simulate a DRAM memory circuit using an interface circuit connected to a plurality of other DRAM memory circuits. In response to the receipt...
8077536 Method of operating semiconductor memory device with floating body transistor using silicon controlled rectifier principle  
A method of maintaining the data state of a semiconductor dynamic random access memory cell is provided, wherein the memory cell comprises a substrate being made of a material having a first...
8077537 Memory device, memory controller and memory system  
Provided is a memory device in which the decrease of the effective bandwidth caused by the refresh operation of the memory device has been solved, a memory controller of the memory device, and a...
8074081 Method for replacing contents of a data storage unit  
A data storage device includes a plurality of data storage units, a physical random number generator with a noise source based on a physical noise process, for generating a random number, and a...
8072829 Dynamic semiconductor memory with improved refresh mechanism  
Various embodiments for implementing refresh mechanisms in dynamic semiconductor memories that allow simultaneous read/write and refresh operations. In one embodiment, the invention provides a...
8068376 Low leakage high stability memory array system  
Systems design and methods are provided for maintaining the memory array stability while reducing power consumption in the form of leakage current in a memory array. One embodiment discloses a...
RE42976 Semiconductor memory device with reduced data access time  
A memory device includes at least two cell blocks connected to a global bit line for outputting data in response to an instruction; at least one global bit line connection unit for selectively...
8068375 Semiconductor device and method of refreshing the same  
A semiconductor device according to the present invention has an address scrambling circuit for performing address scrambling operation of an address and a redundancy judging circuit for judging...
8064282 Method of accessing synchronous dynamic random access memory, memory control circuit, and memory system including the same  
An access area is set within an address space of a dynamic random access memory by arranging two or more complete columns of blocks, in which blocks of memory cells are arranged within an entirety...
Matches 1 - 50 out of 1912 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 >