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7633822 Circuit and method for controlling sense amplifier of a semiconductor memory apparatus  
A sense amplifier control unit include: a control unit that detects a variation in the level of an external voltage and outputs a delay time selection signal on the basis of the result of the...
7630223 Memory device and method of arranging signal and power lines  
A memory device and method for arranging signal and power lines includes a plurality of sub-memory cell arrays having a plurality of memory cells, a plurality of sense amplifiers to sense and...
7616497 NOR flash memory and related read method  
A NOR flash memory is disclosed including a memory cell, sense amplifier output driver, and control circuit. A sense period for a sense operation performed by the sense amplifier is made...
7613024 Local digit line architecture and method for memory devices having multi-bit or low capacitance memory cells  
A DRAM array includes for each column a pair of complimentary digit lines that are coupled to a sense amplifier. Each of the global digit lines is selectively coupled to a plurality of local digit...
7609572 Semiconductor memory device  
In a semiconductor memory device, with respect to low voltage application, technique of controlling a gate voltage of a shared MOS transistor increasing sense speed and increasing data read speed...
7606082 Semiconductor circuit, inverter circuit, semiconductor apparatus, and manufacturing method thereof  
The semiconductor circuit includes a voltage-controlled semiconductor device (N)N, the resistance value of which is controllable with a high voltage, the drain terminal of the N can be connected to...
7606087 Semiconductor memory device and over driving method thereof  
A semiconductor memory device may include a power line, an over driver, and/or an internal voltage driver. The power line may be connected to at least one sense amplifier. The at least one sense...
7586803 Semiconductor memory device with reduced sense amplification time and operation method thereof  
A semiconductor memory device is capable of swiftly sensing data loaded on local I/O lines and transferring the sensed data to a global I/O line, thereby reducing an operating time of a sense...
7573755 Data amplifying circuit for semiconductor integrated circuit  
A data amplifying circuit for a semiconductor integrated circuit including a controller configured to generate a control signal for adjusting an amplification step in response to a test signal, and...
7573769 Enable signal generator counteracting delay variations for producing a constant sense amplifier enable signal and methods thereof  
A sense amplifier enable signal generator has two stages. Each stage offsets transistor performance variation in the other stage to produce an enable signal output relatively immune from the...
7567477 Bias sensing in sense amplifiers through a voltage-coupling/decoupling device  
Voltage coupling/decoupling devices are provided within DRAM devices for improving the bias sensing of sense amplifiers and thus the refresh performance. The voltage coupling/decoupling devices...
7564271 Sense amplifier and electronic apparatus using the same  
A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying...
7564729 Differential and hierarchical sensing for memory circuits  
A memory circuit includes multiple word lines, multiple pairs of complementary bank bit lines, multiple block select lines, and multiple of block circuits. Each of the block circuits includes a...
7561484 Reference-free sampled sensing  
Systems and methods for extending the usable lifetime of memory cells by utilizing reference-free sampled sensing. A stimulus component applies a plurality of different stimuli to a plurality of...
7554867 Capacitor boost sensing  
A memory cell for storing a charge that gives rise to a cell voltage representing a bit value, the memory cell being capable of having the cell voltage boosted to a boost value at a time following...
7548480 Circuit and method for supplying power to sense amplifier in semiconductor memory apparatus  
A circuit for supplying power to a sense amplifier in a semiconductor memory apparatus includes: a compensation controlling unit configured to generate a compensation control signal to determine...
7542348 NOR flash memory including bipolar segment read circuit  
A bipolar segment read circuit is applied for reading NOR flash memory such that cell current is converted to voltage by discharging bit line, which voltage is amplified by the bipolar segment read...
7535783 Apparatus and method for implementing precise sensing of PCRAM devices  
A precision sense amplifier apparatus includes a current source configured to introduce an adjustable reference current through a reference leg; a current mirror configured to mirror the reference...
7525835 Method and apparatus for reduced power cell  
The invention relates to reduced power cells. Some embodiments of the invention provide a memory circuit that has a storage cell. The storage cell contains several electronic components and an...
7522462 Sense amplifier and semiconductor memory device with the same  
A sense amplifier includes: NMOS transistors, drains thereof being coupled to output nodes, gates thereof being coupled to the output nodes, sources thereof being coupled in common to the ground...
7502269 Semiconductor memory device capable of controlling drivability of overdriver  
A semiconductor memory device capable of controlling a drivability of an overdriver is provided. The semiconductor memory device includes: a first power supply for supplying a normal driving...
7492655 Memory device having high speed sense amplifier comprising pull-up circuit and pull-down circuits with drivability for each  
A sense amplifier is constructed to reduce the occurrence of malfunctions in a memory read operation, and thus degraded chip yield, due to increased offset of the sense amplifier with further...
7489588 Semiconductor memory device having a main amplifier equipped with a current control circuit in a burst read operation  
A column circuit that amplifies signals read from a sense amplifier array SAA to local input/output lines LIO in sub-amplifiers SAMP to transfer the amplified signals to main input/output lines MIO...
7489576 Semiconductor storage device  
A semiconductor storage device has first and second cell arrays including a plurality of memory cells to store data, a sense amplifier selectively connected with either one of the first and second...
7483306 Fast and accurate sensing amplifier for low voltage semiconductor memory  
A memory sensing circuit and method that can achieve both a wide read margin and a fast read time. Roughly described, a target cell draws a target cell current from a first node when selected. The...
7477559 Sense amplifier for low-voltage applications  
A sense amplifier for reading a memory cell is provided. The sense amplifier includes a first input branch for applying a biasing voltage to the memory cell through regulation means and for...
7477561 Semiconductor memory device  
A semiconductor memory device includes a memory cell array including memory cells, word lines which select the memory cells, bit lines which transfer data of the memory cells, a sense amplifier...
7468900 Semiconductor memory device having a bitline amplified to a positive voltage and a negative voltage  
In order to omit a reset transistor between a storage node and a cell plate line of a memory cell, a cell plate line is fixed to a potential substantially equal to a ground potential and a bit line...
7466616 Bit line sense amplifier and method thereof  
A bit line sense amplifier and method thereof are provided. The example bit line sense amplifier may include a sense amplifying circuit coupled between a first bit line and a second bit line. The...
7460388 Semiconductor memory device  
A semiconductor memory device includes first and second global bit lines; first, second, third and fourth local bit lines; first, second, third and fourth hierarchical switches for respectively...
7457181 Memory device and method of operating the same  
A memory device has a global input/output line pair configured for data transfer. The memory device includes a sense amplifier, a detecting unit and a detect control signal generating unit. The...
7450455 Semiconductor memory device and driving method thereof  
A semiconductor memory device prevents deterioration of refresh operation caused by sensing noise and a driving method thereof. First pull-down and second pull-down voltages which are different...
7450431 PMOS three-terminal non-volatile memory element and method of programming  
A PMOS transistor is programmed as a non-volatile memory element by operating the PMOS transistor in accumulation mode. This facilitates merging the source and drain regions to form a...
7443751 Programmable sense amplifier multiplexer circuit with dynamic latching mode  
Multiplexer control logic is provided for a semiconductor memory device that combines the function of programmable disconnect-state with a dynamic or dynamic latching mode that operates during...
RE40552 Dynamic random access memory using imperfect isolating transistors  
Apparatus and methods for controlling the sensing of bit lines which facilitates the distribution of bit line charging current to be distributed any time, and facilitates the fast raising of the...
7443752 Semiconductor memory device amplifying data  
A semiconductor memory device includes an I/O line, a first sense amplifier connected to the first I/O line to amplify a signal applied on the first I/O line in response to a first control signal,...
7430150 Method and system for providing sensing circuitry in a multi-bank memory device  
A method and system for providing a multi-bank memory is described. The method and system include providing a plurality of banks. Each of the plurality of banks includes at least one array...
7426150 Sense amplifier overdriving circuit and semiconductor device using the same  
A sense amplifier overdriving circuit includes a first voltage driver which supplies an internal voltage from an internal voltage terminal to a sense amplifier in response to a first enabling...
7408813 Block erase for volatile memory  
A system and method for erasing a block of data in a plurality of memory cells includes clamping one of a digit line and an I/O line in a sensing circuit of a memory device to a fixed logic level....
7405988 Method and apparatus for systematic and random variation and mismatch compensation for multilevel flash memory operation  
Method and means for random or systematic mismatch compensation for a memory sensing system are disclosed. A sense amplifier includes a bulk voltage source to set the bulk of the sensing transistor...
7394295 Sense amplifier  
The invention relates to a sense amplifier comprising the following element: a first current mirror unit coupled to a high voltage source, outputting a first current and a second current according...
7388787 Reference current generator  
In a reference current generator, a current mirror has a referent branch with a first current flowing thereon and a mirror branch to produce a second current by mirroring the first current, a first...
7385867 Memory device and operating method thereof  
A method of operating a memory device adapted for determining a program/erase state of a memory cell in the memory device. The method includes applying a drain operation voltage to a drain of the...
7385866 Load-balanced apparatus of memory  
A memory device is provided. The device comprises a sense amplifier having a cell input terminal and a reference input terminal, a first sub-array coupled to the cell input terminal through a first...
7382671 Method for detecting column fail by controlling sense amplifier of memory device  
Disclosed is a method for detecting a column fail by controlling a sense amplifier of a memory device. The method includes the steps of enabling a word line of a memory cell of the memory device,...
7376026 Integrated semiconductor memory having sense amplifiers selectively activated at different timing  
An integrated semiconductor memory includes a memory cell array in which first sense amplifiers are arranged on a right-hand side of the memory cell array and second sense amplifiers are arranged...
7375999 Low equalized sense-amp for twin cell DRAMs  
Embodiments of the invention provide a method and apparatus for accessing a twin cell memory device. In one embodiment, a twin memory cell is accessed using a first bitline and a second bitline....
7375544 Semiconductor apparatus having logic level decision circuit and inter-semiconductor apparatus signal transmission system  
In a signal transmission system between a plurality of semiconductor apparatuses, a logic level decision circuit deciding a logic level of an input signal in accordance with which of two reference...
7366047 Method and apparatus for reducing standby current in a dynamic random access memory during self refresh  
A dynamic random access memory including a first dynamic random access memory cell, a second dynamic random access memory cell to be refreshed, a sense amplifier, and a control circuit. The control...
7362638 Semiconductor memory device for sensing voltages of bit lines in high speed  
The present invention relates to a semiconductor memory device for sensing voltages of bit lines in high speed. The semiconductor memory device for sensing voltages of bit lines in high speed...
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